MILITARY DATA SHEET Original Creation Date: 03/13/96 Last Update Date: 07/30/96 Last Major Revision Date: 03/13/96 MN54F109-X REV 1A0 DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to F74 data sheet) by connecting the J and K inputs. Asynchronous Inputs: LOW input to SD sets Q to HIGH level LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH Industry Part Number NS Part Numbers 54F109 54F109DM 54F109DMQB 54F109FMQB 54F109LMQB Prime Die M109 Processing Subgrp Description MIL-STD-883, Method 5004 1 2 3 4 5 6 7 8A 8B 9 10 11 Quality Conformance Inspection MIL-STD-883, Method 5005 1 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 MILITARY DATA SHEET MN54F109-X REV 1A0 Features - Guaranteed 4000V minimum ESD protection. 2 MILITARY DATA SHEET MN54F109-X REV 1A0 (Absolute Maximum Ratings) (Note 1) Storage Temperature -65 C to +150 C Ambient Temperature under Bias -55 C to +125 C Junction Temperature under Bias -55 C to +175 C Vcc Pin Potential to Ground Pin -0.5V to +7.0V Input Voltage (Note 2) -0.5V to +7.0V Input Current (Note 2) -30 mA to +5.0mA Voltage Applied to Output in HIGH State (with Vcc=0V) Standard Output TRI-STATE Output Current Applied to Output in LOW State (Max) -0.5V to Vcc -0.5V to +5.5V twice the rated Iol(mA) Note 1: Note 2: Absolute Maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Commercial Military Supply Voltage Military Commercial 0 C to +70 C -55 C to +125 C +4.5V to +5.5V +4.5V to +5.5V 3 MILITARY DATA SHEET MN54F109-X REV 1A0 Electrical Characteristics DC PARAMETER (The following conditions apply to all the following parameters, unless otherwise specified.) DC: VCC 4.5V to 5.5V, Temp range: -55C to 125C SYMBOL PARAMETER CONDITIONS NOTES PINNAME MIN MAX UNIT SUBGROUPS IIH Input High Current VCC=5.5V, VM=2.7V, VINH=5.5V, VINL=0.0V 1, 3 INPUTS 20 uA 1, 2, 3 IBVI Input High Current VCC=5.5V, VM=7.0V, VINH=5.5V, VINL=0.0V 1, 3 INPUTS 100 uA 1, 2, 3 IIL Input LOW Current VCC=5.5V, VM=0.5V, VINH=5.5V 1, 3 J,K, CP -0.6 mA 1, 2, 3 IIL3 Input LOW Current VCC=5.5V, VM=0.5V, VINH=5.5V 1, 3 SET/CLR -1.8 mA 1, 2, 3 VOL Output LOW Voltage VCC=4.5V, VIH=2.0V, IOL=20mA, VINH=5.5V, VIL=0.8V 1, 3 OUTPUTS 0.5 V 1, 2, 3 VOH Output HIGH Voltage VCC=4.5V, VIH=2.0V, IOH=-1.0mA, VINH=5.5V 1, 3 OUTPUTS 2.5 V 1, 2, 3 IOS Short Circuit Current VCC=5.5V, VINL=0.0V, VM=0.0V 1, 3 OUTPUTS -60 -150 mA 1, 2, 3 VCD Input Clamp Diode Voltage VCC=4.5V, IM=-18mA, VINH=5.5V 1, 3 INPUTS -1.2 V 1, 2, 3 ICC Supply Current VCC=5.5V, VINL=0.0V, VINH=5.5V 1, 3 VCC 17.0 mA 1, 2, 3 ICEX Output HIGH Leakage Current VCC=5.5V, VINL=0.0V, VINH=5.5V, VM=5.5V 1, 3 OUTPUTS 250 uA 1, 2, 3 4 MILITARY DATA SHEET MN54F109-X REV 1A0 Electrical Characteristics AC PARAMETER (The following conditions apply to all the following parameters, unless otherwise specified.) AC: CL=50pf, RL=500 OHMS, TR=2.5ns, TF=2.5ns, SEE AC FIGS SYMBOL tpLH(1) tpHL(1) PARAMETER Propagation Delay Propagation Delay CONDITIONS NOTES VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C PINNAME MIN MAX UNIT SUBGROUPS 2, 4 CPn to Qn/Qn 3.8 7.0 ns 9 2, 4 CPn to Qn/Qn 3.8 9.0 ns 10, 11 2, 4 CPn to Qn/Qn 4.4 8.0 ns 9 2, 4 CPn to Qn/Qn 4.4 10.5 ns 10, 11 tpLH(2) Propagation Delay CDn/SDn to Qn/Qn VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 2, 4 3.2 7.0 ns 9 tpLH(2) Propagation Delay CDn/SDn to Qn/Qn VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 2, 4 3.2 9.0 ns 10, 11 tpHL(2) Propagation Delay CDn/SDn to Qn/Qn VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 2, 4 3.5 9.0 ns 9 tpHL(2) Propagation Delay CDn/SDn to Qn/Qn VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 2, 4 3.5 11.5 ns 10, 11 ts(H) Setup Time (HIGH) VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 Jn/Kn to CPn 3.0 ns 9, 10, 11 ts(L) Setup Time VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 Jn/Kn to CPn 3.0 ns 9 5 Jn/Kn to CPn 4.0 ns 10, 11 VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 Jn/Kn to CPn 1.0 ns 9, 10, 11 (LOW) th(H/L) Hold Time or LOW) tw(H) Pulse Width (HIGH) VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C, TR=1.0ns, TF=1.0ns 5 CPn 4.0 ns 9, 10, 11 tw(L) Pulse Width (LOW) VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C, TR=1.0ns, TF=1.0ns 5 CPn 5.0 ns 9, 10, 11 tw (L) Pulse Width (LOW) VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C, TR=1.0ns, TF=1.0ns 5 CDn or SDn 4.0 ns 9, 10, 11 tREC Recovery Time VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 CDn/SDn 2.0 to CP ns 9, 10, 11 fMAX Maximum Count Frequency VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C, TR=1.0ns, TF=1.0ns 5 100 MHZ 9 5 70 MHZ 10, 11 Note 1: Note 2: Note 3: Note 4: Note 5: (HIGH Screen tested 100% on each device at +25C, +125C & -55C temperature, subgroups A1, 2, 3, 7 & 8. Screen tested 100% on each device at +25C temperature only, subgroup A9. Sample tested (Method 5005, table 1) on each MFG. lot at +25C, +125C & -55C temperature, subgroups A1, 2, 3, 7 & 8. Sample tested (Method 5005, Table 1) on each MFG. lot at +25C subgroup A9, and periodically at +125C & -55C temperature, subgroups 10 & 11. Guaranteed but not tested. (DESIGN CHARACTERIZATION ONLY). 5