HFA1103 S E M I C O N D U C T O R 200MHz, Video Op Amp with High Speed Sync Stripper November 1996 Features Description • Removes Sync Signal From Component Video The HFA1103 is a high-speed, wideband, fast settling current feedback op amp with a sync stripping function. The HFA1103 is a basic op amp with a modified output stage that enables it to strip the sync from a component video signal. The output stage has an open emitter NPN transistor that prevents the output from going low during the sync pulse. Removing the sync signal benefits digitizing systems because only the active video information is applied to the A/D converter. This enables the full dynamic range of the A/D converter to be used to process the video signal. The HFA1103 includes inverting input bias current adjust pins (pins 1 and 5) for adjusting the output offset voltage. • Low Residual Sync . . . . . . . . . . . . . . . . . . . . 8mV (Typ) • -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 200MHz • Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 600V/µs • Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . . 9ns • Excellent Gain Flatness, 32MHz . . . . . . . . . . . . . ±0.1dB • Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . <12ns Applications Ordering Information • RGB Video Sync Stripping • RGB Video Distribution Amplifier for Workstations and PC Networks PART NUMBER (BRAND) TEMP. RANGE (oC) PKG. NO. PACKAGE • Video Conferencing Systems HFA1103IP -40 to 85 8 Ld PDIP E8.3 • RGB Video Monitor Preamp HFA1103IB (H1103I) -40 to 85 8 Ld SOIC M8.15 • Fiberoptic Receivers Pinout Sync Stripper Waveforms HFA1103 (PDIP, SOIC) TOP VIEW BAL 1 -IN 2 +IN 3 V- 4 + V+ 0 to +0.7V 0 to +0.7V 8 NC 7 V+ 6 OUT 5 BAL 0 to -0.3V COMPONENT (RGB) VIDEO INPUT HFA1103 OUTPUT Application Schematic +5V 4.7K RB HFA1103 VIN 2K + - RIN 75 RG 750 RF 750 VOUT RT 75 RL 75 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1996 3-533 RT 75 File Number 3957.2 HFA1103 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Output Current (50% Duty Cycle). . . . . . . . . . . . . . . . . . . . . . 60mA Thermal Resistance (Typical, Note 1) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 750Ω, RL = 50Ω, Unless Otherwise Specified TEMP (oC) MIN TYP MAX UNITS 25 - 8 10 mV Full - - 12 mV 25 - 10 30 mV Full - - 40 mV Full - 10 - µV/oC 25 39 45 - dB Full 35 - - dB 25 - 5 40 µA Full - - 65 µA 25 - 5 50 µA Full - - 60 µA -IBIAS Adjust Range (Notes 4, 6) 25 100 200 - µA Non-Inverting Input Resistance 25 25 50 - kΩ Inverting Input Resistance 25 - 16 30 Ω Input Capacitance 25 - 2 - pF Input Common Mode Range Full ±2.5 ±3.0 - V PARAMETER TEST CONDITIONS DC CHARACTERISTICS Residual Sync (Note 2) VIN = -300mV, AV = +1 Output Offset Voltage (Notes 3, 5) Output Offset Voltage Drift (Note 3) VOS PSRR Non-Inverting Input Bias Current Inverting Input Bias Current ∆VS = ±1.25V +IN = 0V -IN = 0V Input Noise Voltage 100kHz 25 - 4 - nV/√Hz +Input Noise Current 100kHz 25 - 18 - pA/√Hz -Input Noise Current 100kHz 25 - 21 - pA/√Hz 25 - 500 - kΩ TRANSFER CHARACTERISTICS AV = +2, Unless Otherwise Specified Open Loop Transimpedance -3dB Bandwidth VOUT = 1.0VP-P, AV = +2 25 - 200 - MHz Gain Flatness To ±0.1dB 25 - 32 - MHz Full 1 - - V/V 25, 85 2.5 3.0 - V -40oC 1.75 2.5 - V Minimum Stable Gain OUTPUT CHARACTERISTICS AV = +2, Unless Otherwise Specified Output Voltage (Note 3) 3-534 HFA1103 Electrical Specifications VSUPPLY = ±5V, AV = +2, RF = 750Ω, RL = 50Ω, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS Output Current Linearity Near Zero TRANSIENT RESPONSE TEMP (oC) MIN TYP MAX UNITS 25, 85 50 60 - mA -40oC 35 50 - mA 25 - 0.01 - % AV = +2, Unless Otherwise Specified Rise Time VOUT = 2.0V Step 25 - 2 - ns Overshoot VOUT = 2.0V Step 25 - 10 - % Slew Rate AV = +2, VOUT = 0 to 2V, +2V to 0V 25 - 600 - V/µs 0.1% Settling VOUT = 2V to 0V 25 - 9 - ns Overdrive Recovery Time 2X Overdrive 25 - 12 - ns Supply Voltage Range Full ±4.5 - ±5.5 V Supply Current (No Load) 25 - 11 16 mA Full - - 23 mA POWER SUPPLY CHARACTERISTICS NOTES: 2. The residual sync is specified at the output of a doubly terminated circuit (see page 1 of this data sheet). 3. Since the HFA1103 has an open emitter NPN output stage, this measurement is only valid for positive values. 4. The -IBIAS current can be used to adjust the offset voltage to zero, but -IBIAS does not flow bidirectionally because the HFA1103 output stage is an open emitter NPN transistor. 5. VOS includes the error contribution of IBSN at RF = 750Ω. 6. This is the minimum change in inverting input bias current when a BAL pin is connected to V- through a 50Ω resistor. Test Circuit DUT VIN + VOUT - RIN 50Ω RF 750Ω RG 750Ω RL 50Ω FIGURE 1. TEST CIRCUIT Application Information Offset Adjustment The HFA1103 allows for adjustment of the inverting input bias current to null the output offset voltage. -IBIAS flows through RF , so any change in bias current forces a corresponding change in output voltage. The amount of adjustment is a function of RF . With RF = 750Ω, the typical adjust range is 150mV. For offset adjustment connect a 10kΩ potentiometer between pins 1 and 5 with the wiper connected to V-. PC Board Layout The frequency performance of these amplifiers depends a great deal on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value chip (0.1µF) capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Output capacitance, such as that resulting from an improperly terminated transmission line will degrade the frequency response of the amplifier and may cause oscillations. In most cases, the oscillation can be avoided by placing a resistor in series with the output. 3-535 HFA1103 Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input. The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to pin 2, and connections to pin 2 should be kept as short as possible. TOP LAYOUT VH 1 OUT +IN An example of a good high frequency layout is the Evaluation Board shown in Figure 3. VL V- V+ GND Evaluation Board The HFA1100 series evaluation board may be used for the HFA1103 with minor modifications. The evaluation board may be ordered using part number HFA11XXEVAL. Please note that an HFA1103 sample is not included with the evaluation board and must be ordered separately. BOTTOM LAYOUT The layout and schematic of the board are shown below: 500Ω 500Ω 50Ω VH 1 8 2 7 0.1µF 10µF +5V 50Ω IN 10µF 3 6 OUT 4 5 VL 0.1µF FIGURE 3. EVALUATION BOARD ARTWORK Typical Application GND GND -5V A circuit which performs the sync stripper and DC restore functions is shown in Figure 4. Please reference Harris Application Note AN9514, titled “Video Amplifier with Sync Stripper and DC Restore”, for details on this circuit. FIGURE 2. EVALUATION BOARD SCHEMATIC The standard output of a VM700 video measurement set is shown in Figure 5. The output, after passing through the Applications Schematic shown on the first page of this data sheet, is shown in Figure 6. TO SYNC SEPARATOR S/H CONTROL + - C1 0.1µF VIN OPT. +5VDC -5V + IC2 IC1b R6 750 - - R4 1K R8 6.8K R7 750 R3 10K R2 10K IC1a R1 1K IC1a + IC1b = CA5260 DUAL AMP IC2 = 74HC4053 SWITCH IC3 = HFA1103 VIDEO OP AMP +5V R5 1K IC3 R11 75 VOUT + C2 47µF R10 75 R9 10K FIGURE 4. VIDEO AMPLIFIER WITH SYNC STRIPPER AND DC RESTORE 3-536 R12 75 HFA1103 VOLTS IRE:FLT 100.0 0.6 0.4 50.0 0.2 0.0 0.0 -0.2 -50.0 -40.0 -30.0 525 LINE NTSC -20.0 -10.0 0.0 10.0 MICROSECONDS FIGURE 5. OUTPUT OF VM700 VIDEO MEASUREMENT SET VOLTS IRE:FLT 100.0 0.6 0.4 50.0 0.2 0.0 0.0 -0.2 -50.0 -40.0 525 LINE NTSC -30.0 -20.0 -10.0 0.0 10.0 MICROSECONDS FIGURE 6. OUTPUT OF HFA1103 SYNC STRIPPER CONFIGURED AS ON THE FIRST PAGE OF THIS DATA SHEET 3-537 HFA1103 Die Characteristics DIE DIMENSIONS: SUBSTRATE POTENTIAL (Powered Up): 63 mils x 44 mils x 19 mils 1600µm x 1130µm x 483µm Floating (Recommend Connection to V-) PASSIVATION: METALLIZATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ Type: Metal 1: AlCu (2%)/TiW Thickness: Metal1: 8kÅ ±0.4kÅ TRANSISTOR COUNT: Type: Metal 2: AlCu (2%) Thickness: 16kÅ ±0.8kÅ 50 Metallization Mask Layout HFA1103 BAL NC -IN V+ +IN OUT V- NC BAL All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. 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