NTMS5P02R2 Product Preview Power MOSFET -5.4 Amps, -20 Volts P–Channel Enhancement–Mode Single SO–8 Package http://onsemi.com Features • High Density Power MOSFET with Ultra Low RDS(on) • • • • • Providing Higher Efficiency Miniature SO–8 Surface Mount Package – Saves Board Space Diode Exhibits High Speed with Soft Recovery IDSS Specified at Elevated Temperature Drain–to–Source Avalanche Energy Specified Mounting Information for the SO–8 Package is Provided –5.4 AMPERES –20 VOLTS 0.033 @ VGS = –4.5 V Single P–Channel D Applications • Power Management in Portable and Battery–Powered Products, i.e.: Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones G MAXIMUM RATINGS Please See the Table on the Following Page S 8 1 SO–8 CASE 751 STYLE 13 MARKING DIAGRAM & PIN ASSIGNMENT N.C. Gate 8 2 7 3 E5P02 LYWW Source Source 1 4 6 5 Drain Drain Drain Drain Top View E5P02 L Y WW = Device Code = Assembly Location = Year = Work Week ORDERING INFORMATION Device NTMS5P02R2 Package Shipping SO–8 2500/Tape & Reel This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Semiconductor Components Industries, LLC, 2001 February, 2001 – Rev. 0 1 Publication Order Number: NTMS5P02R2/D NTMS5P02R2 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–to–Source Voltage VDSS –20 V Drain–to–Gate Voltage (RGS = 1.0 m) VDGR –20 V Gate–to–Source Voltage – Continuous VGS ±10 V Thermal Resistance – Junction–to–Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ 25°C Continuous Drain Current @ 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4.) RθJA PD ID ID PD ID IDM 50 2.5 –7.05 –5.62 1.2 –4.85 –28 °C/W W A A W A A Thermal Resistance – Junction–to–Ambient (Note 2.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ 25°C Continuous Drain Current @ 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4.) RθJA PD ID ID PD ID IDM 85 1.47 –5.40 –4.30 0.7 –3.72 –20 °C/W W A A W A A Thermal Resistance – Junction–to–Ambient (Note 3.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ 25°C Continuous Drain Current @ 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4.) RθJA PD ID ID PD ID IDM 159 0.79 –3.95 –3.15 0.38 –2.75 –12 °C/W W A A W A A TJ, Tstg –55 to +150 °C Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C (VDD = –20 Vdc, VGS = –5.0 Vdc, Peak IL = –8.5 Apk, L = 10 mH, RG = 25 Ω) EAS 360 mJ Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Operating and Storage Temperature Range 1. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds. 2. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t = steady state. 3. Minimum FR–4 or G–10 PCB, t = Steady State. 4. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%. http://onsemi.com 2 NTMS5P02R2 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) * Symbol Characteristic Min Typ Max Unit –20 – – –15 – – – – – – – –0.2 –1.0 –10 – – – –100 – – 100 –0.65 – –0.9 2.9 –1.25 – – – 0.026 0.037 0.033 0.048 gFS – 15 – Mhos Ciss – 1375 1900 pF Coss – 510 900 Crss – 200 380 td(on) – 18 35 OFF CHARACTERISTICS V(BR)DSS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = –250 µAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = –16 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = –16 Vdc, VGS = 0 Vdc, TJ = 125°C) (VDS = –20 Vdc, VGS = 0 Vdc, TJ = 25°C) IDSS Gate–Body Leakage Current (VGS = –10 Vdc, VDS = 0 Vdc) IGSS Gate–Body Leakage Current (VGS = +10 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C µAdc nAdc nAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = –250 µAdc) Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–State Resistance (VGS = –4.5 Vdc, ID = –5.4 Adc) (VGS = –2.5 Vdc, ID = –2.7 Adc) RDS(on) Forward Transconductance (VDS = –9.0 Vdc, ID = –5.4 Adc) Vdc mV/°C Ω DYNAMIC CHARACTERISTICS Input Capacitance (VDS = –16 16 Vdc, Vd VGS = 0 Vdc, Vd f = 1.0 MHz) Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 5. and 6.) Turn–On Delay Time (VDD = –16 Vdc, ID = –1.0 Adc, VGS = –4.5 4 5 Vdc, Vdc RG = 6.0 Ω) Rise Time Turn–Off Delay Time Fall Time Turn–On Delay Time (VDD = –16 Vdc, ID = –5.4 Adc, VGS = –4.5 4 5 Vdc, Vdc RG = 6.0 Ω) Rise Time Turn–Off Delay Time Fall Time Total Gate Charge (VDS = –16 Vdc, VGS = –4.5 Vdc, ID = –5.4 5 4 Adc) Ad ) Gate–Source Charge Gate–Drain Charge ns tr – 25 50 td(off) – 70 125 tf – 55 100 td(on) – 22 – tr – 70 – td(off) – 65 – tf – 90 – Qtot – 20 35 Qgs – 4.0 – Qgd – 7.0 – VSD – – –0.95 –0.72 –1.25 – Vdc trr – 40 75 ns ta – 20 – tb – 20 – QRR – 0.03 – ns nC BODY–DRAIN DIODE RATINGS (Note 5.) Diode Forward On–Voltage (IS = –5.4 Adc, VGS = 0 V) (IS = –5.4 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = –5.4 5 4 Adc, Ad VGS = 0 Vdc, Vd dIS/dt = 100 A/µs) Reverse Recovery Stored Charge 5. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%. 6. Switching characteristics are independent of operating junction temperature. * Handling precautions to protect against electrostatic discharge is mandatory. http://onsemi.com 3 µC NTMS5P02R2 –8 V –2.3 V –4.5 V –3.7 V –3.1 V 10 12 TJ = 25°C –ID, DRAIN CURRENT (AMPS) –ID, DRAIN CURRENT (AMPS) 12 –2.1 V 8 –2.7 V –2.5 V 6 –1.9 V 4 –1.7 V 2 0 VGS = –1.3 V 0 0.25 0.5 0.75 1 1.25 1.5 1.75 –VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) VDS ≥ –10 V 10 8 6 100°C 4 1 ID = –5.4 A TJ = 25°C 0.06 0.04 0.02 0 10 RDS(on), DRAIN–TO–SOURCE RESISTANCE () 0.08 2 4 6 8 –VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) 2.5 1.5 2 –VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) 3 Figure 2. Transfer Characteristics 0.05 TJ = 25°C VGS = –2.5 V 0.04 VGS = –2.7 V 0.03 VGS = –4.5 V 0.02 0.01 2 Figure 3. On–Resistance versus Gate–To–Source Voltage 4 8 10 6 –ID, DRAIN CURRENT (AMPS) 12 Figure 4. On-Resistance versus Drain Current and Gate Voltage 10,000 1.6 VGS = 0 V 1.4 ID = –5.4 A VGS = –4.5 V –IDSS, LEAKAGE (nA) RDS(on), DRAIN–TO–SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN–TO–SOURCE RESISTANCE () Figure 1. On–Region Characteristics 0 TJ = –55°C 2 0 2 25°C 1.2 1 TJ = 150°C 1000 TJ = 125°C 0.8 0.6 –50 –25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 100 150 2 Figure 5. On–Resistance Variation with Temperature 4 8 14 16 18 6 10 12 –VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) 20 Figure 6. Drain–To–Source Leakage Current versus Voltage http://onsemi.com 4 4000 VGS = 0 V C, CAPACITANCE (pF) Ciss TJ = 25°C 3000 Crss 2000 Ciss 1000 Coss Crss 0 10 5 0 5 10 15 20 –VGS –VDS 5 20 QT 4 –VGS –VDS 3 Q1 16 12 Q2 8 2 ID = –5.4 A TJ = 25°C 1 4 0 0 0 4 12 8 16 20 24 Qg, TOTAL GATE CHARGE (nC) –VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) VDS = 0 V –VGS , GATE–TO–SOURCE VOLTAGE (VOLTS) NTMS5P02R2 Figure 8. Gate–To–Source and Drain–To–Source Voltage versus Total Charge GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation t, TIME (ns) VDD = –16 V ID = –5.4 A VGS = –4.5 V –IS, SOURCE CURRENT (AMPS) 1000 td(off) tf tr 100 td(on) 10 1 10 5 4 3 2 1 0 100 VGS = 0 V TJ = 25°C 0.2 RG, GATE RESISTANCE (OHMS) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current DRAIN–TO–SOURCE DIODE CHARACTERISTICS ID , DRAIN CURRENT (AMPS) 100 VGS = 20 V SINGLE PULSE TC = 25°C 1 ms 10 di/dt IS 10 ms trr 1 ta RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 tb TIME 0.25 IS tp dc 0.1 1 –VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS) 10 100 IS VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Diode Reverse Recovery Waveform http://onsemi.com 5 NTMS5P02R2 TYPICAL ELECTRICAL CHARACTERISTICS Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE 10 1 0.1 D = 0.5 0.2 0.1 0.05 Normalized to θja at 10s. Chip 0.02 0.01 0.0163 Ω 0.0652 Ω 0.1988 Ω 0.0307 F 0.1668 F 0.5541 F 0.6411 Ω 0.9502 Ω 0.01 1.9437 F 72.416 F SINGLE PULSE Ambient 0.001 1.0E–05 1.0E–04 1.0E–03 1.0E–02 1.0E–01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 t, TIME (s) Figure 13. Thermal Response INFORMATION FOR USING THE SO–8 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self–align when subjected to a solder reflow process. 0.060 1.52 0.275 7.0 0.155 4.0 0.024 0.6 0.050 1.270 inches mm SOLDERING PRECAUTIONS • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 6 NTMS5P02R2 TYPICAL SOLDER HEATING PROFILE temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177–189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones and a figure for belt speed. Taken together, these control settings make up a heating “profile” for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 14 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems, but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows STEP 1 PREHEAT ZONE 1 RAMP" 200°C 150°C STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" DESIRED CURVE FOR HIGH MASS ASSEMBLIES STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 170°C 160°C 140°C 100°C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 14. Typical Solder Heating Profile http://onsemi.com 7 STEP 7 COOLING 205° TO 219°C PEAK AT SOLDER JOINT 150°C 100°C 50°C STEP 6 VENT NTMS5P02R2 PACKAGE DIMENSIONS SO–8 CASE 751–07 ISSUE V –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 STYLE 13: PIN 1. 2. 3. 4. 5. 6. 7. 8. INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 N.C. SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. 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