3.3V/5V PECL/ECL 3GHz DUAL DIFFERENTIAL 2:1 MULTIPLEXER ECL Pro™ SY100EP56V FINAL FEATURES ■ Dual, fully differential 2:1 PECL/ECL multiplexer ■ Guaranteed AC parameters over temperature/ voltage: • > 3GHz fMAX (toggle) • < 100ps within device skew • < 230ps rise/fall times • < 500ps propagation delay ■ Flexible power supply: 3.0V to 5.5V ■ Wide operating temperature range: –40°C to +85°C ■ VBB reference for AC-coupled and single-ended applications ■ Both channels have independent input select or common select control ■ 100k PECL/ECL compatible logic ■ Available in 20-pin TSSOP package ECL Pro™ DESCRIPTION The SY100EP56V is a high-speed, low-skew, fully differential Dual PECL/ECL 2:1 multiplexer. This device is a pin-for-pin, plug-in replacement to the MC10/100EP56DT. Two separate 2:1 multiplexers (Channel 0 and Channel 1) with dedicated select control pins (SEL0 and SEL1) are implemented in a 20-pin TSSOP package. The signal-path inputs (D0a, D0b and D1a, D1b) accept differential signals as low as 150mV pk-pk. For applications that require common select control for both channels A & B, a common select pin (COM_SEL) is available. All I/O pins are 100k PECL/ECL logic compatible. AC–performance is guaranteed over the industrial –40°C to +85°C temperature range and 3.0V to 5.5V supply voltage range. This device will operate in PECL/LVPECL or ECL/ LVECL mode. The 500ps max (400 typ) propagation delay is matched for all signal and logic select paths: D-to-QOUT, SEL-to-QOUT, and COM_SEL-to-QOUT. Two VBB output reference pins (approx equal to VCC –1.4V) are available for AC–coupled or single-ended applications. The SY100EP56V is part of Micrel’s high-speed, Precision Edge timing and distribution family. For applications that require a different I/O combination, consult the Micrel website at www.micrel.com, and choose from a comprehensive product line of high-speed, low skew fanout buffers, translators, and clock dividers. PIN CONFIGURATION/BLOCK DIAGRAM D0a 1 /D0a 2 VBB0 3 1 20 VCC 19 Q0 18 /Q0 0 D0b 4 17 SEL0 /D0b 5 16 COM_SEL D1a 6 15 SEL1 /D1a 7 VBB1 8 D1b 9 1 14 VCC CROSS REFERENCE TABLE 13 Q1 0 12 /Q1 /D1b 10 11 VEE Micrel Semiconductor ON Semiconductor SY100EP56VK4I MC100EP56DT SY100EP56VK4ITR MC100EP56DTR2 20-pin TSSOP Package ECL Pro is a trademark of Micrel, Inc. 1 Rev.: C Amendment: /0 Issue Date: March 2003 ECL Pro™ SY100EP56V Micrel PIN DESCRIPTION Pin Pin Number Function D0a, /D0a D0b, /D0b 1, 2, 4, 5 Channel 0 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is controlled by SEL0, or COM_SEL. The signal inputs include internal 75kΩ pull-down resistors. Default condition is LOW when left floating. The input signal should be terminated externally. See “Termination” section D1a, /D1a D1b, /D1b 6, 7 9, 10 Channel 1 PECL/ECL differential signal inputs. Multiplexing of these two differential inputs is controlled by SEL1, or COM_SEL. The signal inputs include internal 75kΩ pull-down resistors. Default condition is a logic LOW when left floating. The input signal should be terminated externally. See “Termination” section VBB0, VBB1 3, 8 Channel 0 and Channel 1 reference output voltage. This reference is typically used to bias the unused inverting input for single-ended input applications, or as the termination point for AC– coupled differential input applications. VBB reference value is approximately VCC –1.4V, and tracks VCC 1:1. Maximum sink/source capability is 0.50mA. For single ended PECL inputs, connect to the unused input through a 50Ω resistor. Decouple the VBB pin with a 0.01µF capacitor. For PECL/ LVPECL inputs, the decoupling capacitor is connected to VCC, since PECL signals are referenced to VCC. Leave floating if not used. VEE 11 Negative Power Supply: For PECL/LVPECL applications, connect to GND. /Q1, Q1 12, 13 Channel 1 100KEP PECL/ECL compatible differential output. PECL/ECL termination is with a 50Ω resistor to VCC–2V. Unused output pairs may be left floating. Unused single-ended outputs must have a balanced load. For AC-coupled applications, the output stage emitter follower must have a DC current path to ground. See “Termination” section. SEL1, SEL0 15, 17 100KEP PECL/ECL compatible Channel 1 and Channel 0 MUX select control. See “MUX Select Truth Table.” Each pin includes an internal 75kΩ pull-down resistor. Default condition when left floating is LOW. COM_SEL 16 100KEP PECL/ECL compatible Channel 1 and Channel 0 Common MUX select control. This is the common select control pin for both Channels 0 and 1. Includes an internal 75kΩ pull-down resistor. Default condition when left floating is LOW. Leave floating when not used. /Q0, Q0 18, 19 Channel 0 100K EP PECL/ECL compatible differential output. PECL/ECL termination is with a 50Ω resistor to VCC –2V. Unused output pairs may be left floating. Unused single-ended outputs must have a balanced load. For AC–coupled applications, the output stage emitter follower must have a DC current path to ground. See “Termination” section. VCC 14, 20 Positive Power Supply: Both VCC pins must be connected to the same power supply externally. Bypass with 0.1µF//0.01µF low ESR capacitors. MUX SELECT TRUTH TABLE SEL0 SEL1 COM_SEL Q0, /Q0 Q1, /Q1 X X H a a L L L b b L H L b a H H L a a H L L a b 2 ECL Pro™ SY100EP56V Micrel ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Value Unit 6.0 V –6.0 to 0 +6.0 to 0 V V 50 100 mA ±0.5 mA VCC — VEE Power Supply Voltage VIN Input Voltage (VCC = 0V, VIN not more negative than VEE) Input Voltage (VEE = 0V, VIN not more positive than VCC) IOUT Output Current IBB VBB Sink/Source Current(2) TA Operating Temperature Range –40 to +85 °C Tstore Storage Temperature Range –65 to +150 °C θJA Package Thermal Resistance (Junction-to-Ambient) 115 75 65 °C/W θJC Package Thermal Resistance (Junction-to-Case) 21 °C/W –Continuous –Surge –Still-Air (single-layer PCB) –Still-Air (multi-layer PCB) –500lfpm (multi-layer PCB) Note 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. Note 2. Due to the limited drive capability, the VBB reference should only be used for inputs from the same package device (i.e., do not use for other devices). DC ELECTRICAL CHARACTERISTICS(1) TA = –40°C Symbol VCC TA = +25°C TA = +85°C Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Power Supply Voltage (PECL) (LVPECL) (ECL) (LVECL) 4.5 3.0 –5.5 –3.8 5.0 3.3 –5.0 –3.3 5.5 3.8 –4.5 –3.0 4.5 3.0 –5.5 –3.8 5.0 3.3 –5.0 –3.3 5.5 3.8 –4.5 –3.0 4.5 3.0 –5.5 –3.8 5.0 3.3 –5.0 –3.3 5.5 3.8 –4.5 –3.0 Unit Condition V IEE Supply Current — 50 65 — 50 65 — 50 65 mA No Load IIH Input HIGH Current — — 150 — — 150 — — 150 µA VIN = VIH IIL Input LOW Current All Inputs 0.5 — — 0.5 — — 0.5 — — µA VIN = VIL Input Capacitance (TSSOP) — — — — 1.0 — — — — pF CIN Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. 3 ECL Pro™ SY100EP56V Micrel (100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1) VCC = 3.3V ±10%, VEE = 0V TA = –40°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition VIL Input LOW Voltage (Single-Ended) 1355 — 1675 1355 — 1675 1355 — 1675 mV VIH Input HIGH Voltage (Single-Ended) 2075 — 2420 2075 — 2420 2075 — 2420 mV VOL Outuput LOW Voltage 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV 50Ω to VCC–2V VOH Output HIGH Voltage 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV 50Ω to VCC–2V VBB Output Reference Voltage 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV 2.0 — VCC 2.0 — VCC 2.0 — VCC V Voltage(2) VIHCMR Input HIGH Common Mode Range Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at VCC = 3.3V. They vary 1:1 with VCC. Note 2. The VIHCMR range is referenced to the most positive side of the differential input signal. (100KEP) PECL DC ELECTRICAL CHARACTERISTICS(1) VCC = 5.0V ±10%, VEE = 0V TA = –40°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit VIL Input LOW Voltage (Single-Ended) 3055 — 3375 3055 — 3375 3055 — 3375 mV Condition VIH Input HIGH Voltage (Single-Ended) 3775 — 4120 3775 — 4120 3775 — 4120 mV VOL Outuput LOW Voltage 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV 50Ω to VCC–2V VOH Output HIGH Voltage 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV 50Ω to VCC–2V VBB Output Reference Voltage 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV VIHCMR Input HIGH Voltage(2) Common Mode Range 2.0 — VCC 2.0 — VCC 2.0 — VCC V Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters are at VCC = 5.0V. They vary 1:1 with VCC. Note 2. The VIHCMR range is referenced to the most positive side of the differential input signal. 4 ECL Pro™ SY100EP56V Micrel (100KEP) ECL/LVECL DC ELECTRICAL CHARACTERISTICS(1) VCC = 0V, VEE = –5.5V to –3.0V TA = –40°C Symbol Parameter Min. Typ. TA = +25°C Max. Min. Typ. TA = +85°C Max. Min. Typ. Max. Unit Condition VIL Input LOW Voltage –1945 — –1625 –1945 — –1625 –1945 — –1625 mV VIH Input HIGH Voltage –1225 — –880 — –880 — –880 mV VOL Outuput LOW Voltage –1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695 mV 50Ω to VCC–2V VOH Output HIGH Voltage –1145 –1020 mV 50Ω to VCC–2V VBB Output Reference Voltage –1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325 Voltage(2) Input HIGH Common Mode Range VIHCMR VEE +2.0 –895 –1225 –1145 –1020 0.0 –895 VEE +2.0 0.0 –1225 –1145 –1020 VEE +2.0 –895 0.0 mV V Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Note 2. The VIHCMR range is referenced to the most positive side of the differential input signal. AC ELECTRICAL CHARACTERISTICS VCC = 0V; VEE = –3.0V to –5.5V or VCC = 3.0V to 5.5V, VEE = 0V TA = –40°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit 3 — — 3 — — 3 — — GHz Frequency(1) fMAX Max. Toggle tPLH tPHL Propagation Delay (Differential) D to Q, /Q SEL to Q, /Q COM_SEL to Q, /Q 230 250 250 290 300 350 450 450 450 230 250 250 290 320 360 470 470 470 230 250 250 300 330 400 500 500 500 ps ps ps tSKEW Within-Device Skew(2) Q, /Q — 50 100 — 50 100 — 50 100 ps — — 200 — — 200 — — 200 ps Part-to-Part tJITTER Skew(2) Cycle-to-Cycle Jitter (rms) Condition — 0.2 <1 — 0.2 <1 — 0.2 <1 ps rms Random Jitter — — — — <1 — — — — ps rms Note 3 Deterministic Jitter @1.25Gbps @2.5Gbps — — — — — — — — <25 <50 — — — — — — — — pspk-pk Note 4 150 800 1200 150 800 1200 150 800 1200 mV — 120 170 — 130 180 — 150 230 ps VDIFF Input Voltage (Differential) tr, tf Output Rise/Fall Time Q, /Q (20% to 80%) Note 1. Measured with 750mV input signal, 50% duty cycle. Output swing ≥400mV. All loading with a 50Ω to VCC –2.0V. Note 2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. Note 3. RJ is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 2.5Gbps. Note 4. DJ is measured at 1.25Gbps and 2.5Gbps, with both K28.5 and 223–1 PRBS pattern. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range Package Marking SY100EP56VK4C K4-20-1 Commercial XEP56V SY100EP56VK4CTR(1) K4-20-1 Commercial XEP56V Note 1. Tape and Reel. Note 2. Recommended for new designs. Ordering Code 5 Package Type Operating Range Package Marking SY100EP56VK4I(2) K4-20-1 Industrial XEP56V SY100EP56VK4ITR(1, 2) K4-20-1 Industrial XEP56V ECL Pro™ SY100EP56V Micrel TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, VEE = GND, TA = 25°C, unless otherwise stated. Propagation Delay vs. Temperature Output Amplitude vs. Frequency 360 PROPAGATION DELAY (ps) 800 700 600 500 400 350 340 330 320 310 300 290 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 4000 3500 TEMPERATURE (°C) FREQUENCY (MHz) 1.5GHz Output 500MHz Output TA = 25°C VCC = 3.3V VEE GND VIN = 800mV /Q Output Swing (200mV/div.) Output Swing (200mV/div.) TA = 25°C VCC = 3.3V VEE GND VIN = 800mV Q /Q Q TIME (300ps/div.) TIME (100ps/div.) 2.5GHz Output 3.0GHz Output TA = 25°C VCC = 3.3V VEE GND VIN = 800mV TA = 25°C VCC = 3.3V VEE GND VIN = 800mV Output Swing (200mV/div.) Output Swing (200mV/div.) TA = 25°C VCC = 3.3V VIN = 800mV 280 3000 500 0 2500 100 TA = 25°C VCC = 3.3V VIN = 800mV 2000 200 1500 300 1000 OUTPUT AMPLITUDE (mV) 900 /Q Q TIME (60ps/div.) /Q Q TIME (55ps/div.) 6 ECL Pro™ SY100EP56V Micrel TERMINATION RECOMMENDATIONS +3.3V +3.3V ZO = 50Ω R1 130Ω R1 130Ω R2 82Ω R2 82Ω +3.3V ZO = 50Ω Vt = VCC —2V Figure 1. Parallel Termination–Thevenin Equivalent Note 1. For +5.0V systems: R1 = 82Ω, R2 = 130Ω. +3.3V +3.3V Z = 50Ω Z = 50Ω 50Ω 50Ω source destination 50Ω Rb C1 (optional) 0.01µF Figure 2. Three-Resistor “Y–Termination” Note 1. Power-saving alternative to Thevenin termination. Note 2. Place termination resistors as close to destination inputs as possible. Note 3. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 46Ω to 50Ω. For +5V systems, Rb = 110Ω. +3.3V +3.3V +3.3V R1 130Ω Q R1 130Ω +3.3V ZO = 50Ω 50Ω /Q VBB Vt = VCC —2V 0.01µF R2 82Ω R2 82Ω +3.3V Figure 3. Terminating Unused I/O Note 1. Unused output (/Q) must be terminated to balance the output. Note 2. Micrel's differential I/O logic devices include a VBB reference pin . Note 3. Connect unused input through 50Ω to VBB. Bypass with a 0.01µF capacitor to VCC, not GND, as PECL is referenced to VCC. Note 4. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω. 7 ECL Pro™ SY100EP56V Micrel 20 LEAD TSSOP (K4-20-1) ± .05 ± 0.002 ± .10 ± .004 + .10 – .00 + .004 – .000 ± .10 ± .004 + .10 – .00 + .004 – .000 Rev. 01 MICREL, INC. TEL 1849 FORTUNE DRIVE SAN JOSE, CA 95131 + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2003 Micrel, Incorporated. 8