ETC DSP56824EVMUM

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DSP56824EVMUM/D
Rev. 1.2, 07/99
DSP56824 Evaluation Module
Hardware Reference Manual
Motorola, Incorporated
Semiconductor Products Sector
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Austin TX 78735-8598
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© Copyright Motorola, Inc., 1999. All rights reserved.
This document contains information on a new product.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
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any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may
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Table of Contents
Chapter 1
Introduction
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1.1
1.2
1.3
DSP56824EVM Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
DSP56824EVM Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
DSP56824EVM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Chapter 2
Technical Summary
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.9.1
2.9.2
2.10
2.11
2.12
2.13
DSP56824 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Program and Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
SPI EEPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
SPI UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Voice CODEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Debug LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Appendix A
DSP56824EVM Schematics
Appendix B
DSP56824EVM Bill of Material
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Table of Contents
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List of Figures
1-1
Block Diagram of the DSP56824EVM. . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-2
DSP56824EVM Jumper Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-3
Connecting the DSP56824EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
2-1
Block Diagram of the External Memory Interface . . . . . . . . . . . . . . . . . . 2-3
2-2
Block Diagram of the SPI EEPROM Interface. . . . . . . . . . . . . . . . . . . . . 2-4
2-3
Block Diagram of the SPI UART Interface . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-4
Block Diagram of the SSI CODEC Interface . . . . . . . . . . . . . . . . . . . . . . 2-6
2-5
Block Diagram of the CODEC Analog Interface . . . . . . . . . . . . . . . . . . . 2-7
2-6
Block Diagram of the Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2-7
Block Diagram of the Debug LED Interface . . . . . . . . . . . . . . . . . . . . . 2-10
2-8
Block Diagram of the Parallel JTAG Interface. . . . . . . . . . . . . . . . . . . . 2-12
2-9
Block Diagram of the User Interrupt Interface . . . . . . . . . . . . . . . . . . . . 2-13
2-10
Block Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2-11
Block Diagram of the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
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List of Figures
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List of Tables
1-1
DSP56824EVM Default Jumper Options . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
2-1
SPI0 EEPROM Enable Connector Description . . . . . . . . . . . . . . . . . . . . 2-4
2-2
SPI1 UART Enable Connector Description . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-3
RS-232 Serial Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-4
SSI CODEC Enable Connector Description. . . . . . . . . . . . . . . . . . . . . . . 2-6
2-5
CODEC Input Signal Jumper Selection . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-6
CODEC Output Signal Jumper Selection . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-7
CODEC Output Load Jumper Selection . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2-8
Line Input Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2-9
Line Output Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2-10
Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2-11
JTAG Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2-12
Parallel JTAG Interface Disable Jumper Selection. . . . . . . . . . . . . . . . . 2-11
2-13
Parallel JTAG Interface Connector Description . . . . . . . . . . . . . . . . . . . 2-12
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List of Tables
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Preface
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This reference manual describes in detail the hardware on the DSP56824 Evaluation
Module (DSP56824EVM).
Audience
This manual is intended for Motorola DSP56824 application developers.
Organization
This manual is organized into two chapters and two appendixes, as follows:
•
Chapter 1, “Introduction,” provides an overview of the EVM and its features.
•
Chapter 2, “Technical Summary,” describes in detail the DSP56824EVM
hardware.
•
Appendix A,“DSP56824EVM Schematics,” contains the schematics of the
DSP56824EVM.
•
Appendix B,“DSP56824EVM Bill of Material,” provides a list of the materials
used on the DSP56824EVM board.
Suggested Reading
In addition to this manual, refer to the following site on the World Wide Web for more
documentation on the DSP56824 and the DSP56824EVM kit:
http://www.motorola.com/SPS/DSP/tools/docs/evm-824.html
Notation Conventions
Signal names used in this manual are indicated as active high signals or active low signals.
Active high signals (Logic One) will not have any special symbol attached to the signal
name, like A0 or RESET. However, active low signals (Logic Zero) will be noted with a
backslash character like WE\ or OE\.
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Hexadecimal values start with a “$” sign, (e.g., $0FF0 or $80.) Decimal values will not
have any symbol attached to the number, (e.g., 10 or 34.) Binary values will start with the
letter “b” attached to the number, (e.g., b1010 or b0011.)
Definitions, Acronyms and Abbreviations
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Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.
CODEC
COder/DECoder. A part used to convert analog signals to digital
(Coder) and digital signals to analog (Decoder).
DSP
Digital Signal Processor
EEPROM
Electrically Erasable Programmable Read only Memory
EVM
Evaluation Module
GPIO
General Purpose Input and Output on Motorola’s Family of DSPs
JTAG
Joint Test Action Group. A bus protocol/interface used for test and
debug.
OnCE™
On-Chip Emulation, a debug bus and port created by Motorola to
enable designers to create a low-cost hardware interface for a
professional quality debug environment.
IC
Integrated Circuit
PCB
Printed Circuit Board
PLL
Phase-Locked Loop
RAM
Random Access Memory
ROM
Read-Only Memory
SPI
Serial Port Interface. A port on Motorola’s Family of DSPs
SRAM
Static Random Access Memory
SSI
Synchronous Serial Interface. A port on Motorola’s Family of DSPs
UART
Universal Asynchronous Receiver/Transmitter
References
For additional inormation, please refer to the following documentation:
[1] DSP56800 Family Manual, Motorola
[2] DSP56824 Digitial Signal Processor User’s Manual, Motorola
[3] DSP56824 Digital Signal Processor Technical Data, Motorola
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Chapter 1
Introduction
The DSP56824Evaluation Module (EVM) is used to demonstrate the abilities of the
DSP56824 and provide a hardware tool allowing the development of applications that use
the DSP56824.
The DSP56824EVM is an evaluation module board that includes a DSP56824 part,
peripheral expansion connectors, external memory and a voice CODEC. The peripheral
expansion connectors are used for signal monitoring and user feature expandability.
The DSP56824EVM is designed for the following purposes:
•
To allow new users to become familiar with the features of the 56800 architecture.
The tools and examples provided with the DSP56824EVM facilitate evaluation of
the feature set and the benefits of the family.
•
To serve as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines then download the software to on-chip or
on-board RAM, and then run and debug the software using a debugger via the
JTAG/OnCETM port. The breakpoint features of the OnCE port enable the user to
easily specify break conditions and to execute user-developed software at full
speed, until the break conditions are satisfied. The ability to examine and modify
all user accessible registers, memory and peripherals through the OnCE port
greatly facilitates the task of the developer.
•
To serve as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the DSP's
peripherals. The OnCE port’s unobtrusive design means that all of the memory on
the board and on the DSP chip is available to the user.
1.1 DSP56824EVM Architecture
The DSP56824EVM is used to facilitate the evaluation of various features of the
DSP56824 part. The DSP56824EVM can be used to develop real-time software and
hardware products based on the DSP56824. The DSP56824EVM provides the features
necessary for a user to write and debug software, to demonstrate the functionality of that
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DSP56824EVM Configuration Jumpers
software, and to be able to interface with the customer’s application specific device(s).
The DSP56824EVM is flexible enough to allow the user to fully exploit the features of the
DSP56824. (See Figure 1-1.)
Reset
Logic
RESET
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Program
Memory
64K × 16-Bit
Address
Data and
Control
Data Memory
64K × 16-Bit
SPI #0
3.6864MHz
Crystal
SPI EEPROM
64K-Bit
XTAL/EXTAL
Peripheral
Expansion
Connector(s)
DSP56824
JTAG
Connector
MODE/IRQ
Logic
MODE/IRQ
JTAG
SPI #1
DSub
25-Pin
Parallel
JTAG
Interface
SSI
Power Supply
+3.3 Volts
VDD and GND
GPIO
SPI UART
and RS-232
Interface
DSub
9-Pin
Linear
CODEC
13-Bit
Stereo
Jacks
1/8”
GPIO
Debug
LEDs
Figure 1-1. Block Diagram of the DSP56824EVM
1.2 DSP56824EVM Configuration Jumpers
Six jumper groups (JG1-JG6) and three jumper connectors (J1, J2 and J5), as shown in
Figure 1-2, are used to configure various features on the DSP56824EVM board. Table 1-1
describes the default jumper group settings.
1-2
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DSP56824EVM Configuration Jumpers
2
J2
1
SPI1
12
JG6
11
P3
2
P2
12
J7
2
1
U9
P1
J2
1
GPIO
SPI1
11
JG6
DSP56824EVM
JTAG
2
J5
J6
14
17
18
Y1
U7
U1
U6
LED1
LED2
13
SSI
1
J1
1
2
9
10
10
14
13
1
2 4
3 2 1
JG2
RESET
JG4
U10
JG3
1
2
3
1 3
S/N
2
8
1
7
IRQB
J8
J3
Line Out
J4
Line In
S1
JG1
JG5
SPI0
9
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2
SSI
MODB
1
J1
2
J5
MODA
LED3
IRQA
S3
S2
JG1
2
1
SPI0
2K 300
1
JG2
JG5
JG4
3
3
JG3
1
3
4
A B
SEL MODE
Figure 1-2. DSP56824EVM Jumper Reference
Table 1-1. DSP56824EVM Default Jumper Options
Jumper
Group
Comment
Jumpers
Connections
JG1
Selects DSP’s Mode 3 operation upon exit from reset
1-2 and 3-4
JG2
Selects CODEC’s High Bandpass mode
2-3
JG3
Select CODEC output jack as mono on both (left and right) channels
1-2
JG4
CODEC input jack as mono
NC
JG5
Select CODEC output to 1.7 Volts peak @ 300 Ohm
1-2
JG6
Enable on-board Parallel Command Converter Interface
NC
J1
Selects SPI0 to use on-board EEPROM
1-2, 3-4, 5-6 and 7-8
J2
Selects SPI1 to use on-board UART
1-2, 3-4, 5-6 and 7-8
J5
Selects SSI to use on-board CODEC
1-2, 3-4, 5-6 and 7-8
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DSP56824EVM Connections
1.3 DSP56824EVM Connections
The interconnection diagram Figure 1-3 shows connections between the PC and the
external 12 Volt DC power supply to the DSP56824EVM board.
Parallel Extension
Cable
DSP56824EVM
Windows PC
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P1
P2
Connect Cable
to Parallel/Printer Port
External 2.1mm
7–12V Receptacle
Power Connector
Figure 1-3. Connecting the DSP56824EVM
Perform the following steps to connect the DSP56824EVM:
1. Connect the parallel extension cable to the parallel port of the host computer.
2. Connect the other end of the parallel extension cable to P2, shown in Figure 1-3, on
the DSP56824EVM board. This provides the connection that allows the host
computer to control the board.
3. Make sure the external 7–12 Volts DC, 500mA power supply is not plugged into a
120V AC power source.
4. Connect the 2.1mm output power plug from the external power supply into P1,
shown in Figure 1-3, on the DSP56824EVM board.
5. Apply power to the external power supply. The green “Power-ON” LED will
illuminate when power is correctly applied.
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Chapter 2
Technical Summary
The DSP56824EVM is designed as a versatile Digital Signal Processor (DSP)
development card for developing real-time software and hardware products to support a
new generation of applications in digital and wireless messaging, servo and motor control,
digital answering machines, feature phones, modems, and digital cameras. The power of
the 16-bit DSP56824 combined with the on-board 64K × 16-bit external program static
RAM (SRAM), 64K × 16-bit external data SRAM, 64K × 1-bit external electrically
erasable/programmable ROM (EEPROM), parallel JTAG interface, and Motorola’s
MC145483 13-bit linear voice CODEC, makes the DSP56824EVM ideal for developing
and implementing many messaging and audio processing algorithms, as well as for
learning the architecture and instruction set of the DSP56824 processor.
The main features of the DSP56824EVM include the following:
•
DSP56824, 16-bit DSP operating at 70MHz [U1]
•
External fast static RAM (FSRAM) memory [U6], configured as:
— 64K × 16-bit program memory with 0 wait states at 70MHz
— 64K × 16-bit data memory with 0 wait states at 70MHz
•
Serial 64K-bit SPI EEPROM for program and data storage [U7]
•
3.6864MHz crystal oscillator for DSP clock generation [Y1]
•
JTAG port interface connector for an external debug command converter [J8]
•
On-board Parallel JTAG Interface, with a connector for a PC printer port cable [P2]
•
SPI UART with RS-232 interface for easy connection to a host processor
[U9 and P3]
•
13-bit Linear CODEC for voice applications with line-in and line-out jack
connectors [U10, J4 and J3]
•
On-board power regulation from an external 9–12V AC/DC power supply input
[P1]
•
Light Emitting Diode (LED) power indicator [LED4]
•
Three on-board real-time user debugging LEDs [LED1-3]
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DSP56824
•
Power-On Reset with a user RESET push-button [S1]
•
Manual interrupt push-button for IRQA [S2]
•
Manual interrupt push-button for IRQB [S3]
•
Connector to disable the on-board SPI0 peripheral (EEPROM) and allow the user
to connect their own SPI or GPIO compatible peripheral [J1]
•
Connector to disable the on-board SPI1 peripheral (UART) and allow the user to
connect their own SPI or GPIO compatible peripheral [J2]
•
Connector to disable the on-board SSI peripheral (CODEC) and allow the user to
connect their own SSI or GPIO compatible peripheral [J5]
•
Connector for the DSP’s 16 GPIO signals [J7]
•
Connector for the DSP’s two IRQ and two Timer signals [J8]
2.1 DSP56824
The DSP56824EVM uses a Motorola DSP56824BU70 part, designated as U1 on the
board and in the schematics. This part will operate at a maximum speed of 70MHz. A full
description of the DSP56824, including functionality and user information, is provided in
the following documents:
•
DSP56824 Technical Data (DSP56824/D). Provides features list and specifications
including signal descriptions, DC power requirements, AC timing requirements
and available packaging.
•
DSP56824 User’s Manual (DSP56824UM/AD). Provides an overview description
of the DSP and detailed information about the on-chip components including the
memory and I/O maps, peripheral functionality, and control/status register
descriptions for each subsystem.
•
DSP56800 Family Manual (DSP56800FM/AD). Provides a detailed description of
the core processor including internal status and control registers and a detailed
description of the family instruction set.
Refer to these documents for detailed information about chip functionality and operation.
They can be found on the following site on the World Wide Web:
http://www1.dsp.motorola.com/docs/docs.html
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SPI EEPROM
2.2 Program and Data Memory
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The DSP56824EVM uses one bank of 128K × 16-bit Fast Static RAM (GSI GS72116,
labelled U6) for external memory expansion, as shown in the FSRAM block diagram in
Figure 2-1. This physical memory bank is split into two logical memory banks of
64K × 16-bits, one for program memory and the other for data memory. When the DSP’s
program strobe PS signal line is used along with the memory chip’s A0 signal line, half of
the memory chip is selected when program memory accesses are requested and the other
half of the memory chip is selected when data memory access are requested.
DSP56824
GS72116
A1-A16
A0-A15
A0
PS\
DQ1-DQ16
D0-D15
RD\
OE\
WR\
WR\
CE\
Figure 2-1. Block Diagram of the External Memory Interface
2.3 SPI EEPROM
The DSP56824EVM provides one 64K-bit serial EEPROM (Microchip Technology
25LC640, designated as U7) for nonvolatile program or data memory storage. (See
Figure 2-2.) This memory connects to the DSP56824’s Serial Port Interface (SPI) Port 0
through the SPI0 enable connector, J1. This connector allows SPI Port 0 to control the
on-board SPI EEPROM or to control an off-board SPI device. Table 2-1 lists the J1
pin-out.
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SPI UART
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DSP56824
EEPROM Enable
(SPI0 Port Connector)
J1
Serial EEPROM
MOSI0
SDI
MISO0
SDO
SCK0
CLK
PC3
CS\
Figure 2-2. Block Diagram of the SPI EEPROM Interface
Table 2-1. SPI0 EEPROM Enable Connector Description
J1
Pin #
DSP Signal
Pin #
EEPROM Signal
1
MISO0/PC0
2
SD1
3
MOSI0/PC1
4
SD0
5
SCK0/PC2
6
SCK
7
SS0/PC3
8
CS
9
GND
10
GND
2.4 SPI UART
The DSP56824EVM provides an RS-232 interface by the use of an SPI UART (MAXIM
MAX3100, designated as U9) and an RS-232 level converter, (MAXIM MAX563,
designated as U8). (See Figure 2-3.) The UART connects to the DSP56824’s SPI Port 1
through the SPI1 enable connector, J2. This connector allows SPI Port 1 to either control
the on-board SPI UART or to control an off-board SPI device. Table 2-2 lists the J2
pin-outs. The RS-232 level converter transitions the UART’s +3.3V signal levels to
RS-232 compatible signal levels and connects to the host’s serial port via connector P3.
Table 2-3 lists the P3 pin-out.
2-4
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
SPI UART
DSP56824
UART Enable
(SPI Port Connector)
J2
MAX3100
MAX563
DE9
Freescale Semiconductor, Inc...
SPI UART
MISO1
DOUT
MOSI1
DIN
SCK1
SCLK
PC7
CS\
IRQA\
IRQ\
RXD
RS-232
Level
Conversion
TXD
CTS\
RTS\
Figure 2-3. Block Diagram of the SPI UART Interface
Table 2-2. SPI1 UART Enable Connector Description
J2
.
Pin #
DSP Signal
Pin #
UART Signal
1
MISO1/PC4
2
DOUT
3
MOSI1/PC5
4
DIN
5
SCK1/PC6
6
SCLK
7
SS1/PC7
8
CS
9
IRQA
10
IRQ
11
GND
12
GND
Table 2-3. RS-232 Serial Connector Description
P3
Motorola
Pin #
Signal
Pin #
Signal
1
Jumper to 6
6
Jumper to 1
2
TXD
7
CTS
3
RXD
8
RTS
4
N/C
9
N/C
5
GND
Technical Summary
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2-5
Freescale Semiconductor, Inc.
Voice CODEC
2.5 Voice CODEC
The DSP56824EVM provides a 13-bit linear single-channel CODEC (Motorola
MC145483, designated as U10). The DSP56824 interfaces to the CODEC via the DSP’s
Synchronous Serial Interface (SSI) through the SSI enable connector, J5. This connector
allows the SSI Port to either control the on-board SSI CODEC or to control an off-board
SSI device. Table 2-4 lists the J5 pin-outs. The SSI port provides the CODEC’s clock,
frame synchronization and data without the use of glue logic. (See Figure 2-4.)
CODEC Enable
(SSI Port Connector)
DSP56824
MC145483
Freescale Semiconductor, Inc...
J5
STD
DR
SRD
DT
STCK
BCLKR, BCLKT, MCLK
STFS
FST, FSR
SRCK
SRFS
Figure 2-4. Block Diagram of the SSI CODEC Interface
Table 2-4. SSI CODEC Enable Connector Description
J5
2-6
Pin #
DSP Signal
Pin #
CODEC Signal
1
STD/PC8
2
DR
3
SRD/PC9
4
DT
5
STCK/PC10
6
BCLKR/BCLKT/MCLK
7
STFS/PC11
8
FST/FSR
9
SRCK/PC12
10
NC
11
SRFS/PC13
12
NC
13
GND
14
GND
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
Voice CODEC
The DSP56824EVM uses 1/8” stereo jacks for the CODEC’s analog signal input, J4, and
output, J3. (See Figure 2-5.)
1
2
Output Output Signal
Selector
Load
JG5
JG3
1
2
3
MC145483
1
2
Input Signal
Selector
JG4
J4
J3
PO-
Line
Input
TG,TI-
Line
Output
ROA
Freescale Semiconductor, Inc...
A
Figure 2-5. Block Diagram of the CODEC Analog Interface
The ring signal on the stereo input jack can be optionally selected as the input source via
jumper JG4. (See Table 2-5.)
Table 2-5. CODEC Input Signal Jumper Selection
JG4
Comment
NC (default)
1–2
Input signal from tip of stereo jack.
Input signal from tip and ring of stereo jack.
The ring signal on the stereo output jack can be optionally selected as the output source via
jumper JG3. (See Table 2-6.)
.
Table 2-6. CODEC Output Signal Jumper Selection
JG3
NC
1–2 (default)
Motorola
Comment
Output signal goes to tip of the stereo jack.
Output signal goes to tip and ring of the stereo jack.
Technical Summary
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2-7
Freescale Semiconductor, Inc.
Clock Source
The CODEC’s analog line output load drive can be selected between 300 and 2K Ohms by
using jumper JG5. (See Table 2-7.)
Table 2-7. CODEC Output Load Jumper Selection
JG5
Comment
1–2 (default)
1.7V peak @ 300 Ω load
2–3
0.8V peak @ 2K Ω load
Freescale Semiconductor, Inc...
Table 2-8 lists the stereo input pin-outs and Table 2-9 lists the output jack pin-outs.
Table 2-8. Line Input Connector Description
J4
Signal
Barrel
ANALOG GND
Tip
LINE IN
Ring
LINE IN (optional)
Table 2-9. Line Output Connector Description
J3
Signal
Barrel
ANALOG GND
Tip
LINE OUT
Ring
LINE OUT (optional)
2.6 Clock Source
The DSP56824EVM uses a 3.6864MHz crystal, Y1, connected to its External Crystal
Inputs, EXTAL and XTAL. The DSP56824 uses its internal PLL to multiply the input
frequency, by 19, to achieve its 70MHz maximum operating frequency. Additionally the
3.686MHz clock source is then buffered and used by the SPI UART for its clock source,
as shown in Figure 2-6.
2-8
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
Debug LEDs
DSP56824
XTAL
EXTAL
MAX3100
3.6864MHz
Freescale Semiconductor, Inc...
3.6864MHz
Osc IN
Figure 2-6. Block Diagram of the Clock Interface
2.7 Operating Mode
The DSP56824EVM provides a boot-up MODE selection jumper, JG1. This jumper is
used to select the operating mode of the DSP as it exits reset. Refer to the DSP56824
User’s Manual for a complete description of the chip’s operating modes. Table 2-10
shows the four modes of operation available on the DSP56824.
Table 2-10. Operating Mode Selection
Operating Mode
JG1
Comment
0
No jumpers
1
1–2
Bootstrap from SPI0 or SSI Port
2
3–4
Normal Expanded P:$E000
3
1-2 and 3-4
Bootstrap from byte-wide EPROM
Development P:$0000 (default)
2.8 Debug LEDs
Three on-board Light-Emitting Diodes (LEDs) are provided to allow real-time debugging
for user programs. These LEDs allow the programmer to monitor program execution
without having to stop the program during debugging, as shown in Figure 2-7. LED1 is
controlled by Port B’s General Purpose Input/Output (GPIO) signal line 8 (PB8). LED2 is
controlled by PB9. LED3 is controlled by PB10. Setting PB8, PB9 or PB10 to a logic 1
value will turn on the associated LED.
Motorola
Technical Summary
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2-9
Freescale Semiconductor, Inc.
Debug Support
DSP56824
+3.3V
User DEBUG LED1
PB8
User DEBUG LED2
PB9
Freescale Semiconductor, Inc...
User DEBUG LED3
PB10
Figure 2-7. Block Diagram of the Debug LED Interface
2.9 Debug Support
The DSP56824EVM provides an on-board Parallel JTAG Interface and a JTAG interface
connector for external command converter support. Two interface connectors are provided
to support each of these debugging approaches. These two connectors are designated the
JTAG, J8connector and the Host Parallel Interface Connector, P2.
2.9.1 JTAG Connector
The JTAG connector on the DSP56824EVM allows the connection of an external
command converter for downloading programs and working with the DSP56824’s
registers. This connector is used to communicate with an external command converter that
passes information and data back and forth with a host processor running a debugger
program. Table 2-11 shows the pin-out for this connector.
2-10
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
Debug Support
Table 2-11. JTAG Connector Description
Freescale Semiconductor, Inc...
J6
Pin #
Signal
Pin #
Signal
1
TDI
2
GND
3
TDO
4
GND
5
TCK
6
GND
7
NC
8
KEY
9
J_RESET
10
TMS
11
+3.3 Volts
12
NC
13
J_TRST
14
J_TRST
When this connector is used with an external command converter, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG6. Table 2-12 shows
the jumper selection options.
Table 2-12. Parallel JTAG Interface Disable Jumper Selection
JG6
No jumpers (default)
1–2
Comment
On-board Parallel JTAG Interface enabled
On-board Parallel JTAG Interface disabled
2.9.2 Parallel JTAG Interface Connector
The Parallel JTAG Interface Connector, P2, allows the DSP56824 to communicate with a
Parallel Printer Port on a Windows PC, as shown in Figure 2-8. By using P2, the user can
download programs and work with the DSP56824’s registers. Table 2-13 shows the
pin-out for connector P2. When using the parallel JTAG interface, the jumper at JG6
should be removed. (See Table 2-12.)
Motorola
Technical Summary
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2-11
Freescale Semiconductor, Inc.
Debug Support
Voltage Level
Conversion
DSP56824
DB25
TDI
TDI
TDO
TDO
TRST\
TRST\
TMS
TMS
TCK
TCK
Freescale Semiconductor, Inc...
RESET\
RESET
Figure 2-8. Block Diagram of the Parallel JTAG Interface
Table 2-13. Parallel JTAG Interface Connector Description
P2
2-12
Pin #
Signal
Pin #
Signal
1
NC
14
NC
2
RESET
15
Parallel ID
3
TMS
16
NC
4
TCK
17
NC
5
TDI
18
GND
6
TRST
19
GND
7
NC
20
GND
8
Parallel ID
21
GND
9
VCC
22
GND
10
NC
23
GND
11
TDO
24
GND
12
NC
25
GND
13
CONNECTED
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
Reset
2.10 External Interrupts
Two on-board push-button switches, S2 and S3, are provided for external interrupt
generation, as shown in Figure 2-9. S2 allows the user to generate a hardware interrupt for
signal line IRQA. S3 allows the user to generate a hardware interrupt for signal line IRQB.
These two switches allow the user to generate interrupts for their programs.
+3.3V
Freescale Semiconductor, Inc...
S2
DSP56824
IRQA
Pushbutton
IRQA\
+3.3V
S3
IRQB
Pushbutton
IRQB\
Figure 2-9. Block Diagram of the User Interrupt Interface
2.11 Reset
The DSP56824EVM provides a power-on reset function (Motorola MC34164, designated
as U2) for a clean and dependable RESET signal. Additional reset logic is provided to
support the RESET signals from the JTAG connector, the Parallel JTAG Interface, and the
user RESET push-button. (See Figure 2-10.)
+V
RESET
SWITCH
IN
RESET
OUT
POWER-ON-RESET
DSP_RESET\
JTAG_RESET\
PORT_RESET\
Figure 2-10. Block Diagram of the RESET Interface
Motorola
Technical Summary
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2-13
Freescale Semiconductor, Inc.
Power Supply
2.12 Power Supply
Freescale Semiconductor, Inc...
The main power input, 7–12 Volts AC/DC at 500mA, to the DSP56824EVM is through a
2.1mm coax power jack. The DSP56824EVM provides +3.3V DC voltage regulation for
the DSP, Program/Data SRAM memory, serial EEPROM, CODEC, parallel JTAG
interface, and supporting logic. (See Figure 2-11.) Power applied to the DSP56824EVM is
indicated with a Power-ON LED, LED4.
7-12V AC/DC
Power
Condition
7-12VDC
+3.3V
Regulator
3.3VDC
DSP56824
DSP56824EVM
Parts
Figure 2-11. Block Diagram of the Power Supply
2.13 Test Points
Four on-board ground test points are provided to facilitate voltage reference
measurements, TP1-TP4. These are located near the corners of the PCB to allow easy
access for oscilloscope probe ground straps.
2-14
DSP56824EVM Hardware Reference Manual
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Motorola
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
Appendix A
DSP56824EVM Schematics
Motorola
DSP56824EVM Schematics
For More Information On This Product,
Go to: www.freescale.com
A-1
A-2
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
Go to: www.freescale.com
1
2
3
A
TDI
TDO
TCK
TMS
TRST/DE\
RESET\
MODA/IRQA\
MODB/IRQB\
PC0/MISO0
PC1/MOSI0
PC2/SCK0
PC3/SS0\
PC4/MISO1
PC5/MOSI1
PC6/SCK1
PC7/SS1\
PC8/STD
PC9/SRD
PC10/STCK
PC11/STFS
PC12/SRCK
PC13/SRFS
PC14/TIO01
PC15/TIO2
D[0..15]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
10
15
19
32
42
60
68
75
89
50
46
48
47
49
51
53
52
82
83
84
85
86
87
88
91
92
93
94
95
96
97
98
99
26
27
28
29
30
33
34
35
36
37
38
39
40
41
44
45
U1
GND
GND
GND
GND
GND
GND
GND
GND
GND
TDI
TDO
TCK
TMS
TRST/DE
B
DSP56824BU70
RESET
MODA/IRQA
MODB/IRQB
PC0/MISO0
PC1/MOSI0
PC2/SCK0
PC3/SS0
PC4/MISO1
PC5/MOSI1
PC6/SCK1
PC7/SS1
PC8/STD
PC9/SRD
PC10/STCK
PC11/STFS
PC12/SRCK
PC13/SRFS
PC14/TIO01
PC15/TIO2
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
B
9
16
20
31
43
59
69
78
90
74
79
77
76
80
81
100
1
17
18
54
55
56
57
58
61
62
63
64
65
66
67
70
71
72
73
25
24
23
22
21
14
13
12
11
8
7
6
5
4
3
2
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
+3.3V
EXTAL
XTAL
CLKO
SXFC
WR\
RD\
PS\
DS\
PB[0..15]
A[0..15]
TP5
C
C
+3.3V
C3
0.01uF
B
Size
Title
C2
0.01uF
D a te:
D
TDI
TCK
TMS
DS\
PS\
RD\
WR\
J_TRST\
J_RESET\
R9
R8
R7
R6
R5
R4
R3
R2
R1
E
10K
10K
10K
10K
10K
10K
10K
10K
E
1
of 10
MD:OE314
Sheet
FAX: (512)895-4556
Designer: Development Tools
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6 5 0 1 W i l l i a m C a nnon Drive West
+3.3V
10K
Wireless Subscriber Division
DSP56824EVM.DSN
D
Tuesday, April 27, 1999
Document
Number
D S P56824 Processor
C1
820pF
2K
R10
Figure A-1. DSP56824 Processor
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CLKO
SXFC
EXTAL
XTAL
VDDPLL
VSSPLL
WR
RD
PS
DS
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
1
4
A
Freescale Semiconductor, Inc...
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
MOTOROLA
MOTOROLA
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
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1
2
3
4
A
J_TRST\
S1
+
+3.3V
C4
4.7uF
U_RESET\
R12
1K
2
GND
RESET
MC34164-3
IN
U2
Power-ON RESET Circuit
4
1
B
+3.3V
R11
10K
POR\
3.6864MHz
Y1
680K
R17
11
9
10
MC74HC08AD
U3C
8
C8
22pF
1
2
3.6864MHz
EXTAL
XTAL
TRST/DE\
J_RESET\
POR\
2
1
5
4
MC74HC08AD
U3B
S3
C
INTERRUPT B
S2
INTERRUPT A
2
4
JG1
1
3
C6
0.1UF
C5
0.1UF
IRQA_IN\
IRQB_IN\
MODE Select
3
+3.3V
P_RESET\
MC74HC08AD
U3A
C
B
Size
Title
6
VCC
+3.3V
1
2
5
11
14
3
6
10
13
15
U4
GND
Y0
Y1
Y2
Y3
VCC
10K
R16
10K
R13
8
4
7
9
12
16
IRQB_IN\
IRQA_IN\
MC74HC157AD
SEL
A0
A1
A2
A3
B0
B1
B2
B3
E
D a te:
D
10K
R15
10K
R14
MODA/IRQA\
MODB/IRQB\
MODB
MODA
RESET\
E
E
of 10
MD:OE314
Sheet 2
FAX: (512)895-4556
Designer: Development Tools
(512)895-3230
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6 5 0 1 W i l l i a m C a nnon Drive West
Wireless Subscriber Division
+3.3V
DSP56824EVM.DSN
Thursday, May 07, 1998
Document
Number
RESET, MODE and Crystal Oscillator
IRQA_IN\
IRQB_IN\
MODA
MODB
D
Figure A-2. RESET, MODE and Crystal Oscillator
B
MC74HC04AD
U5A
Crystal Oscillator
P_TRST\
MC74HC08AD
C7
22pF
13
12
U3D
TRST goes LOW with POR or TRST
RESET SWITCH
A
Freescale Semiconductor, Inc...
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
A-3
A-4
A
B
C
E
64Kx16-bit Program and 64Kx16-bit Data Memory
4
PS\
U6
A[0..15]
DSP56824EVM Hardware Reference Manual
Freescale Semiconductor, Inc...
D
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
3
5
4
3
2
1
44
43
42
27
26
25
24
21
20
19
18
22
41
17
6
39
40
RD\
WR\
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
7
8
9
10
13
14
15
16
29
30
31
32
35
36
37
38
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
11
33
VDD
VDD
OE
WE
CE
LB
UB
4
D[0..15]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
3
+3.3V
12
34
VSS
VSS
GS72116TP-12
2
2
Wireless Subscriber Division
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Austin, TX, 78735-8598
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MD:OE314
1
1
Title
Size
PROGRAM and DATA SRAM MEMORY
Document
Number
A
MOTOROLA
Date:
A
B
DSP56824EVM.DSN
Tuesday, April 27, 1999
C
Rev.
Designer: Development Tools
D
Figure A-3. Program and Data SRAM Memory
Sheet
3
of 10
E
1.1
MOTOROLA
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1
2
3
4
A
A
Title
1
6
5
2
Date:
C
4
3
7
8
+3.3V
D
E
4
E
of 10
MD:OE314
Sheet
FAX: (512)895-4556
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6501 William Cannon Drive West
Wireless Subscriber Division
DSP56824EVM.DSN
Tuesday, April 27, 1999
Document
Number
GND
WP
HOLD
VCC
25LC640/SN
CS
SCK
SI
SO
U7
D
Figure A-4. SPI0 Serial 64K EEPROM Memory
A
Size
C
SPI0 Serial 64K EEPROM MEMORY
10
9
6
8
5
PC2/SCK0
4
2
7
3
PC1/MOSI0
PC3/SS0\
1
J1
EEPROM Enable
(SPI0 HEADER)
PC0/MISO0
B
B
Freescale Semiconductor, Inc...
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
A-5
A-6
DSP56824EVM Hardware Reference Manual
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1
2
3
4
12
8
11
7
PC7/SS1\
6
10
5
PC6/SCK1
4
2
9
3
IRQA_IN\
1
PC5/MOSI1
J2
UART Enable
(SPI1 HEADER)
PC4/MISO1
A
A
6
IRQA
U9
GND
X2
X1
CTS
RTS
8
9
10
11
13
14
15
3.6864MHz
CTS
RTS
RX
TX
+3.3V
C11
0.1uF
C9
0.1uF
Date:
C
R2IN
T2OUT
R1IN
T1OUT
EN
GND
V-
C2-
C2+
MAX563CWN
R2OUT
T2IN
R1OUT
T1IN
SHDN
VCC
V+
C1-
C1+
U8
9
8
14
15
1
16
7
6
5
C12
0.1uF
C10
0.1uF
TXD
CTS
RXD
RTS
D
E
5
E
1
6
2
7
3
8
4
9
5
DE9S
P3
of 10
MD:OE314
Sheet
FAX: (512)895-4556
Designer: Development Tools
(512)895-3230
Austin, TX, 78735-8598
6501 William Cannon Drive West
Wireless Subscriber Division
DSP56824EVM.DSN
Tuesday, April 27, 1999
Document
Number
10
11
13
12
18
17
3
4
2
D
Figure A-5. SPI1 Serial UART for RS-232
A
TX
RX
C
SPI1 Serial UART for RS-232
M A X 3 1 0 0CEE
VCC
SHDN
IRQ
CS
SCLK
DIN
DOUT
Size
Title
16
7
4
SS1
+3.3V
3
1
MOSI1
SCK1
2
MISO1
B
B
Freescale Semiconductor, Inc...
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
MOTOROLA
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
Go to: www.freescale.com
1
2
3
LINE IN
J4
A
RING_IN
TIP_IN
2
3
1
JG4
R23
600
C16
1.0uF
Input Signal on RING Enable
1
2
4
A
+3.3VA
VAG
TI+
TI-
TG
HB
+3.3VA
16
10
20
5
19
18
17
MC145483DW
PDI
VAG
PO+
TI+
TI-
TG
HB
U10
13-Bit
+3.3VA
DR
DT
BCLKR
MCLK
BCLKT
FST
FSR
REF
PI
PORO-
0.1uF
C13
8
13
9
11
12
14
7
1
3
4
2
C
REF
PI
PORO-
Linear CODEC
C
FRST
R20
20K
B
Size
Title
DR
DT
CLK_CODEC
R19
20K
C14
0.1uF
1
3
5
7
9
11
13
C15
PC8/STD
PC9/SRD
PC10/STCK
PC11/STFS
PC12/SRCK
PC13/SRFS
2K Ohm
300 Ohm
68uF
D a te:
D
R18
20K
TIP_OUT
RING_OUT
3
1
2
J3
E
E
LINE OUT
6
of 10
MD:OE314
Sheet
FAX: (512)895-4556
Designer: Development Tools
(512)895-3230
Austin, TX, 78735-8598
6 5 0 1 W i l l i a m C a nnon Drive West
Wireless Subscriber Division
DSP56824EVM.DSN
Tuesday, April 27, 1999
Document
Number
JG3
Output Signal on RING Enable
13-BIT LINEAR CODEC (MC145483)
CODEC Enable
(SSI Port Connector)
2
4
6
8
10
12
14
J5
1
2
3
JG5
D
Figure A-6. 13-Bit Linear CODEC (MC145483)
C18
0.01uF
C17
1.0uF
B
R25
20K
R22
20K
1
2
3
R24
20K
R21
20K
JG2
High Band Pass Filter Enable
B
6
VCC
VSS
15
+
MOTOROLA
1
2
Freescale Semiconductor, Inc...
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
A-7
Motorola
A
B
C
D
E
Parallel JTAG Interface
4
4
DSP56824EVM Schematics
Freescale Semiconductor, Inc...
PORT_IDENT
P2
U11
2
4
6
8
1
14
2
PORT_RESET
3
P O R T _TMS
4
PORT_TCK
5
PORT_TDI
6
PORT_TRST\
7
PORT_DE
15
11
13
5
3
16
17
18
20
10
19
20
U12
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2Y3
2Y4
2Y1
2Y2
2A3
2A4
VCC
GND
1G
2G
18
16
14
12
2
4
6
8
9
7
15
17
11
13
5
3
1
19
20
1
19
R26
+3.3V
MC74AC244DW
10K
8
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2Y3
2Y4
2Y1
2Y2
2A3
2A4
VCC
1G
2G
GND
18
16
14
12
P _ R E S ET
TMS
TCK
TDI
9
7
15
17
P_TRST\
TDO
+3.3V
10
MC74AC244DW
21
9
3
PORT_VCC
3
22
10
23
11
R27
PORT_TDO
24
C37
0.1uF
On-Board
Command Converter
Disable
51
12
25
13
JG6
1
2
+3.3V
R28
PORT_CONNECT
51
DB25M
+3.3V
JTAG Connector
J6
R30
47K
2
TDI
TDO
TCK
U5B
3
P_RESET
4
P_RESET\
P_TRST\
P_TRST\
J_RESET\
R29
47K
+3.3V
MC74HC04AD
J_TRST\
2
4
6
8
10
12
14
2
KEY
TMS
J_TRST\
Wireless Subscriber Division
U5C
5
1
3
5
7
9
11
13
6 5 0 1 W i l l i a m C a nnon Drive West
6
Austin, TX, 78735-8598
1
(512)895-3230
MC74HC04AD
Title
Size
B
A
B
C
1
FAX: (512)895-4556
MD:OE314
Parallel JTAG Command Converter Interface and JTAG Connector
Document
Number
D a te:
DSP56824EVM.DSN
Monday, May 10, 1999
Rev.
Designer: Development Tools
D
A-8
Figure A-7. Parallel JTAG Command Converter Interface and JTAG Connector
Sheet
E
7
of 10
1.1
Motorola
A
B
C
DSP56824EVM Schematics
Freescale Semiconductor, Inc...
J7
PB0
PB2
PB4
PB6
PB8
PB10
PB12
PB14
4
1
3
5
7
9
11
13
15
17
E
PB[0..15]
PB1
PB3
PB5
PB7
PB9
PB11
PB13
PB15
2
4
6
8
10
12
14
16
18
D
J8
IRQA_IN\
IRQB_IN\
RESET\
PB[0..15]
4
1
3
5
7
PC14/TIO01
PC15/TIO2
+3.3V
2
4
6
8
TIMER, IRQ & RESET HEADER
GPIO HEADER
+3.3V
3
3
U5D
LED1
PB8
9
8
RED LED
MC74HC04AD
R31
R32
270
47K
R33
R34
270
47K
R35
R36
270
47K
PB8
U5E
LED2
PB9
11
10
YELLOW LED
MC74HC04AD
PB9
U5F
LED3
2
PB10
13
12
GREEN LED
MC74HC04AD
2
PB10
Wireless Subscriber Division
6501 William Cannon Drive West
Austin, TX, 78735-8598
(512)895-3230
FAX: (512)895-4556
MD:OE314
1
1
Title
Size
PORT B (GPIO), TRIPLE TIMER, IRQA, IRQB AND RESET HEADERS
Document
Number
A
Date:
A
B
DSP56824EVM.DSN
Tuesday, April 27, 1999
C
Rev.
Designer: Development Tools
Sheet 8
D
A-9
Figure A-8. Port B (GPIO), Triple Timer, IRQA, IRQB and RESET Headers
of 10
E
1.1
DSP56824EVM Schematics
For More Information On This Product,
Go to: www.freescale.com
1
2
A
P1
2
1
+3.3V
GREEN LED
LED4
R37
270
2.1mm COAX JACK
ACin2
ACin1
D4
D3
B
+
C40
470uF
16VDC
RAWVin
C
C
1
3
U13
VOUT
VOUT
B
Size
Title
4
2
+3.3V
3.3Vout
D a te:
L1
D
+
C39
47uF
16VDC
VCC
+3.3V
Ferrite Bead
L3
Ferrite Bead
L2
+3.3VA
E
Designer:
(512)895-3230
Development Tools
E
9
of
MD:OE314
Sheet
FAX: (512)895-4556
Austin, TX, 78735-8598
6 5 0 1 W i l l i a m C a n non Drive West
Wireless Subscriber Division
C42
0.1uF
ANALOG POWER
C41
0.1uF
Ferrite Bead
DSP56824EVM.DSN
GND
D
Tuesday, April 27, 1999
Document
Number
P O W E R SUPPLY
1 2 3
4
MC33269DT
MC33269DT-3.3
GND
VIN
Figure A-9. Power Supply
TP4
TP3
TP2
TP1
FM4001
FM4001
FM4001
FM4001
D2
D1
1
3
EXTERNAL
POWER IN
1
4
B
1
Motorola
1
A
3
Freescale Semiconductor, Inc...
10
1.1
Rev.
1
2
3
4
Freescale Semiconductor, Inc.
A-10
Motorola
DSP56824EVM Schematics
For More Information On This Product,
Go to: www.freescale.com
1
2
3
4
C19
0.01uF
+3.3V
+3.3V
A
C29
0.01uF
+3.3V
GS72116
+3.3V
A
C30
0.1uF
C20
0.1uF
C21
0.01uF
+3.3V
+3.3V
C31
0.01uF
25LC640
+3.3V
B
C22
0.1uF
B
C23
0.01uF
C32
0.1uF
C24
0.1uF
+3.3V
C33
0.01uF
Date:
C26
0.1uF
+3.3V
C
C27
0.01uF
+3.3V
C28
0.1uF
+3.3V
C36
0.1uF
MAX563
+3.3V
D
+3.3V
C38
0.1uF
74AC244
D
E
E
10 of 10
MD:OE314
Sheet
FAX: (512)895-4556
Designer: Development Tools
(512)895-3230
Austin, TX, 78735-8598
6501 William Cannon Drive West
Wireless Subscriber Division
C35
0.01uF
MAX3100
+3.3V
DSP56824EVM.DSN
C34
0.1uF
74HC08
C25
0.01uF
+3.3V
Tuesday, April 27, 1999
Document
Number
BYPASS CAPS
+3.3V
74HC157
+3.3V
Figure A-10. Bypass Capacitors
A
Size
Title
+3.3V
74HC04
+3.3V
DSP56824
C
Freescale Semiconductor, Inc...
Rev.
1.1
1
2
3
4
Freescale Semiconductor, Inc.
A-11
Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc.
A-12
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Motorola
Freescale Semiconductor, Inc.
Appendix B
DSP56824EVM Bill of Material
Freescale Semiconductor, Inc...
Qty
Description
Ref. Designators
Vendor Part #
Integrated Circuits
1
DSP
U1
Motorola DSP56824BU70
1
Power-On Reset
U2
Motorola MC34164D-3
1
AND Gate
U3
Motorola MC74HC08AD
1
2×
U4
Motorola MC74HC157AD
1
Inverter
U5
Motorola MC74HC04AD
1
FSRAM
U6
GSI GS72116TP-12
1
EEPROM
U7
Microchip Technology 25LC640/SN
1
RS-232 Level Converter
U8
Maxim MAX563CWN
1
SPI UART
U9
Maxim MAX3100CEE
1
SSI CODEC
U10
Motorola MC145483DW
2
TRI-STATE BUFFERS
U11, U12
Motorola MC74AC244DW
1
3.3V Voltage Regulator
U13
Motorola MC33269DT-3.3
4 Multiplexer
Resistors
2
51 Ω
1
R27, R28
SMEC RC73A2A51.1OHMFT
680K Ω
R17
SMEC RC73A2A681KOHMFT
1
600 Ω
R23
SMEC RC73A2A619OHMFT
1
1K Ω
R12
SMEC RC73A2A1KOHMFT
1
2K Ω
R10
SMEC RC73A2A2KOHMFT
15
10K Ω
R1-9, R11, R13-16, R26
SMEC RC73A2A10KOHMFT
7
20K Ω
R18-22, R24, R25
SMEC RC73A2A20KOHMFT
5
47K Ω
R29, R30, R32, R34, R36
SMEC RC73A2A47KOHMFT
Motorola
DSP56824EVM Bill of Material
For More Information On This Product,
Go to: www.freescale.com
B-1
Freescale Semiconductor, Inc.
Qty
4
Description
270 Ω
Ref. Designators
R31, R33, R35, R37
Vendor Part #
SMEC RC73A2A270OHMFT
Inductors
3
1 mH
L1–L3
Fair-Rite 2743015112
Freescale Semiconductor, Inc...
LEDs
1
Red LED
LED1
Hewlett-Packard HSMS-C650
1
Yellow LED
LED2
Hewlett-Packard HSMY-C650
2
Green LED
LED3, LED4
Hewlett-Packard HSMG-C650
Diode
4
FM4001
D1- D4
SMEC S2B-FM401
Capacitors
1
820 pF
C1
SMEC MCCE821J2N0-T1
13
0.01 µF
C2, C3, C18, C19, C21, C23,
C25, C27, C29, C31, C33,
C35, C37
SMEC MCCE103K2NR-T1
20
0.1 µF
C5, C6, C9-14, C20, C22,
C24, C26, C28, C30, C32,
C34, C36, C38, C41, C42
SMEC MCCE104K2NR-T1
2
1 µF
1
470 µF 16VDC
C40
Panasonic PCE3184CT
1
47 µF 16VDC
C39
SMEC ESR150-47K16D
1
68 µF
C15
SMEC TCC68K10D
1
4.7 µF
C4
SMEC MCCB475Z2NV-T2
2
22 pF
C7, C8
SMEC MCCE220J2NO-T1
C16, C17
SMEC MCCE1052NV-T2
Jumpers
1
2 × 2 Bergstick
JG1
SAMTEC TSW-102-07-S-D
2
1 × 3 Bergstick
JG2, JG5
SAMTEC TSW-103-07-S-S
3
1 × 2 Bergstick
JG3, JG4, JG6
SAMTEC TSW-102-07-S-S
Test Points
4
1 × 1 Bergstick
TP1–TP4
Samtec TSW-101-07-S-S
Crystals
1
B-2
3.6864MHz Crystal
Y1
ECS ECS-36-18-4
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Motorola
Freescale Semiconductor, Inc.
Qty
Description
Ref. Designators
Vendor Part #
Freescale Semiconductor, Inc...
Connectors
1
5 x 2 Bergstick
J1
SAMTEC TSW-105-07-S-D
1
6 x 2 Bergstick
J2
SAMTEC TSW-106-07-S-D
2
Audio Connector
J3, J4
Switch Craft 35RAPC4BHN2
2
7 x 2 Bergstick
J5, J6
SAMTEC TSW-107-07-S-D
1
9 x 2 Bergstick
J7
SAMTEC TSW-109-07-S-D
1
4 x 2 Bergstick
J8
SAMTEC TSW-104-07-S-D
1
2.1mm coax
Power Connector
P1
Switch Craft RAPC-722
1
DB25M Connector
P2
AMPHENOL 617-C025P-AJ121
1
DE9F Connector
P3
AMPHENOL 617-C009S-AJ120
Switches
3
SPDT Momentary
S1 - S3
Panasonic EVQ-QS205K
Miscellaneous
18
Shunt
4
Rubber Feet
Motorola
SH1–SH18
RF1–RF4
Samtec SNT-100-BL-T
Amaton 5186
DSP56824EVM Bill of Material
For More Information On This Product,
Go to: www.freescale.com
B-3
Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc.
B-4
DSP56824EVM Hardware Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Motorola
Freescale Semiconductor, Inc.
INDEX
Numerics
IRQB Headers A-9
13-bit Linear CODEC (MC145483) A-7
3.6864MHz crystal 2-8
A
Freescale Semiconductor, Inc...
Architecture, DSP56824EVM 1-1
B
J
JTAG Connector 2-10, A-8
JTAG Connector Description 2-11
Jumper Configuration 1-2
Jumper Connections 1-3
Jumper settings 1-3
L
Bypass Capacitors A-11
Line Input Connector Description 2-8
Line Output Connector Description 2-8
C
Clock Interface 2-9
Clock Source 2-8
CODEC Analog Interface 2-7
CODEC Output Load Jumpter Selection 2-8
CODEC Output Signal Jumpter Selection 2-7
Configuration, DSP56824EVM 1-4
O
D
Parallel JTAG Command Converter Interface
Connector A-8
Parallel JTAG Interface Connector 2-11
Parallel JTAG Interface Connector Description 2-12
Parallel JTAG Interface Disable Jumper Selection 2-11
Port B (GPIO) Headers A-9
Power Supply 2-14, A-10
Power supply, external 1-4
Processor, DSP56824 A-2
Program and Data SRAM Memory A-4
Program Memory 2-3
Data Memory 2-3
Debug LEDs 2-9
Debug Support 2-10
Default Jumpter Options 1-3
DSP56824BU70 2-2
DSP56824EVM
component layout 1-3
connecting to the PC 1-4
interconnection diagram 1-4
jumper settings 1-3
power connection 1-4
E
Operating Mode 2-9
Operating Mode Selection 2-9
P
R
EXTAL 2-8
External Interrupts 2-13
External Memory Interface 2-3
Reset 2-13
RESET Headers A-9
Reset Interface 2-13
Reset, Mode and Crystal Oscillator A-3
RS-232 cable connection 1-4
F
S
FSRAM 2-3
SPI EEPROM 2-3
SPI UART 2-4
SPI0 Serial 64K EEPROM Memory A-5
SPI1 Serial UART for RS-232 A-6
I
IRQA Headers A-9
Motorola
I-v
For More Information On This Product,
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Freescale Semiconductor, Inc.
T
Test Points 2-14
Triple Timer Headers A-9
V
Voice CODEC 2-6
X
Freescale Semiconductor, Inc...
XTAL 2-8
Motorola
vi
For More Information On This Product,
Go to: www.freescale.com