ETC ISO130U

ISO130
iSO
1
30
SBOS220 – OCTOBER 2001
High IMR, Low Cost
ISOLATION AMPLIFIER
FEATURES
APPLICATIONS
● HIGH ISOLATION-MODE REJECTION:
10kV/µs (min)
● MOTOR AND SCR CONTROL
● LARGE SIGNAL BANDWIDTH: 85kHz (typ)
● INDUSTRIAL PROCESS CONTROL:
Transducer Isolator, Isolator for
Thermocouples, RTDs
● MOTOR PHASE CURRENT SENSING
● DIFFERENTIAL INPUT/DIFFERENTIAL OUTPUT
● VOLTAGE OFFSET DRIFT vs
TEMPERATURE: 4.6µV/°C (typ)
● OFFSET VOLTAGE 1.8mV (max)
● POWER MONITORING
● INPUT REFERRED NOISE: 300µVrms (typ)
● GROUND LOOP ELIMINATION
● NONLINEARITY: 0.25% (max)
● SINGLE SUPPLY OPERATION
DESCRIPTION
● SIGMA-DELTA A/D CONVERTER
TECHNOLOGY
● WORLDWIDE SAFETY APPROVAL:
UL1577 (File No. E162573), VDE0884
(File No. 85511), CSA22.2 (File No. 88324)
● AVAILABLE IN 8-PIN PLASTIC DIP and
8-PIN GULL-WING PLASTIC SURFACE MOUNT
VS1
VIN+
VIN–
GND1
● GENERAL PURPOSE ANALOG SIGNAL
ISOLATION
1
8
2
7
3
6
4
5
VS2
VOUT+
VOUT–
GND2
The ISO130 is a high isolation-mode rejection, isolation
amplifier suited for motor control applications. Its versatile
design provides the precision and stability needed to accurately monitor motor currents in high-noise motor control
environments. The ISO130 can also be used for general
analog signal isolation applications requiring stability and
linearity under severe noise conditions.
The signal is transmitted digitally across the isolation barrier
optically, using a high-speed AlGaAs LED. The remainder
of the ISO130 is fabricated on 1µm CMOS IC process. A
sigma-delta analog-to-digital converter, chopper stabilized
amplifiers and differential input and output topologies make
the isolation amplifier suitable for a variety of applications.
The ISO130 is easy to use. No external components are
required for operation. The key specifications are 10kV/µs
isolation-mode rejection, 85kHz large signal bandwidth, and
4.6µV/°C VOS drift. A single power supply ranging from
+4.5V to +5.5V makes this amplifier ideal for low power
isolation applications.
The ISO130 is available in 8-pin plastic DIP and 8-pin
plastic gull-wing surface mount packages.
IMR SHIELD
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Top View
8-Pin DIP/SOIC
VS1
1
8
VS2
VIN+
2
7
VOUT +
VIN–
3
6
VOUT –
GND1
4
5
GND2
PACKAGE INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
2
Supply Voltages: VS1, VS2 ........................................................ 0V to 5.5V
Steady-State Input Voltage .......................................... –2V to VS1 + 0.5V
2 Second Transient Input Voltage ................................................... –6.0V
Output Voltages: VOUT+, VOUT– ................................ –0.5V to VS2 + 0.5V
Lead Temperature Solder (1.6mm below seating plane, 10s) ....... 260°C
PRODUCT
PACKAGE
PACKAGE DRAWING
NUMBER(1)
ISO130P
ISO130PB
ISO130U
ISO130UB
8-Pin Plastic DIP
8-Pin Plastic DIP
8-Pin Gull-Wing Plastic Surface Mount
8-Pin Gull-Wing Plastic Surface Mount
006-3
006-3
006-2
006-2
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ORDERING INFORMATION
PRODUCT
PACKAGE
GAIN ERROR
(MAX)
ISO130P
ISO130PB
ISO130U
ISO130UB
8-Pin Plastic DIP
8-Pin Plastic DIP
8-Pin Gull-Wing Plastic Surface Mount
8-Pin Gull-Wing Plastic Surface Mount
±5% (mean value = 8.00)
±1% (mean value = 7.93)
±5% (mean value = 8.00)
±1% (mean value = 7.93)
ISO130
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SBOS220
ELECTRICAL CHARACTERISTICS
ISOLATION SPECIFICATIONS – VDE0884 INSULATION CHARACTERISTICS
At VIN–, VIN– = 0V, TA = 25°C, VS1, VS2 = 5.0V, unless otherwise noted.
ISO130P, ISO130PB
ISO130U, ISO130UB
PARAMETER
ISOLATION CHARACTERISTICS
Installation Classification
Table I
Rated Mains Voltage ≤ 300Vrms
Rated Mains Voltage ≤ 600Vrms
Climatic Classification
Pollution Degree(1)
Maximum Working Insulation Voltage (VIORM)
Side A to Side B Test Voltage, Method b (VPR)(9)
Partial Discharge < 5pC
Side A to Side B Test Voltage, Method a (VPR)(9)
Partial Discharge < 5pC
Highest Allowable Overvoltage (VTR)(9)
Safety-Limiting Values
Case Temperature (TSI)
Input Power (PSI (INPUT))
Output Power (PSI (OUTPUT))
INSULATION RELATED SPECIFICATIONS
Min. External Air Gap (clearance)
Min. External Tracking Path (creepage)
Internal Isolation Gap (clearance)
Tracking Resistance (CTI)
Isolation Group
Insulation Resistance
CONDITIONS
CHARACTERISTIC
UNITS
I-IV
I-III
40/85/21
2
600
Vrms
960
Vrms
720
6000
Vrms
VPEAK
175
80
250
°C
mW
mW
>7
8
0.5
175
III a
≥ 1011
mm
mm
mm
V
As Per VDE0109/12.83
As Per VDE0109/12.83
VPR = 1.6 x VIORM, tP = 1s
Type and Sample Test
VPR = 1.2 x VIORM, tP = 60s
Transient Overvoltage, tTR = 10s
per VDE0109
25°C, VISO = 500V
Ω
ELECTRICAL CHARACTERISTICS
ISOLATION SPECIFICATIONS
At VIN+, VIN– = 0V, TA = 25°C, VS1, VS2 = 5.0V, unless otherwise noted.
ISO130P, ISO130PB
ISO130U, ISO130UP
PARAMETER
ISOLATION
Input-Output Surge Withstand Voltage (8, 9),
(In accordance with UL1577)
Barrier Impedance(9)
Resistance
Capacitance
Isolation Mode Voltage Errors
Rising Edge Transient Immunity
Falling Edge Transient Immunity
Isolation Mode Rejection Ratio(2)
CONDITIONS
TYP
MAX
UNITS
t = 1MIN, RH ≤ 50%
3750
VISO = 500VDC
f = 1MHz
VIM = 1kV, ∂ VOUT < 50mV
VIM = 1kV, ∂ VOUT < 50mV
ISO130
SBOS220
MIN
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10
10
Vrms
1013
0.7
Ω
pF
25
15
> 140
kV/µs
kV/µs
dB
3
ELECTRICAL CHARACTERISTICS
At VIN+, VIN– = 0V, TA = 25°C, VS1, VS2 = 5.0V, unless otherwise noted.
ISO130P, ISO130PB
ISO130U, ISO130UB
PARAMETER
CONDITIONS
INPUT
Initial Offset Voltage
vs Temperature
vs VS1
vs VS2
Power Supply Rejection; VS1
and VS2 Together
1MHz Square Wave, 5ns Rise/Fall Time
Noise
0.1Hz to 100kHz
Input Voltage Range
Maximum Input Voltage Range before Output Clipping
Initial Input Bias Current(3)
vs Temperature
Input Resistance(3)
vs Temperature
Common-Mode Rejection Ratio(4)
GAIN(5)
Initial Gain
ISO130P/ISO130U
ISO130PB/ISO130UB
Gain vs Temperature
Gain vs VS1
Gain vs VS2
Gain Nonlinearity
for –200mV < VIN+ < 200mV
for –100mV < VIN+ < 100mV
vs Temperature(6)
vs VS1(6)
vs VS2 (6)
OUTPUT
Voltage Range
High
Low
Common-Mode Voltage
Current Drive(7)
Short-Circuit Current
Output Resistance
vs Temperature
FREQUENCY RESPONSE
Bandwidth
–3dB
–45°
Rise/Fall Time (10% - 90%)
Propagation Delay
to 10%
to 50%
to 90%
POWER SUPPLIES
Rated Voltage
Voltage Range
Quiescent Current
VS1
VS2
–200mV < VIN+ < 200mV
–200mV < VIN+ < 200mV
MIN
TYP
MAX
UNITS
–1.8
–0.9
4.6
30
–40
0.0
mV
µV/°C
µV/V
µV/V
5
300
–200
7.61
7.85
–200mV < VIN+ < 200mV
–200mV < VIN+ < 200mV
–200mV < VIN+ < 200mV
VIN+ = +500mV
VIN+ = –500mV
–40°C < TA < 85°C, 4.5V < VS1 < 5.5V
2.2
VOUT = 0V or VOUT = VS2
–40°C to 85°C
200
±300
–670
3
530
0.38
72
50
mV/V
µVrms
mV
mV
nA
nA/°C
kΩ
%/°C
dB
8.00
7.93
10
2.1
–0.6
8.40
8.01
V/V
V/V
ppm/°C
ppm/mV
ppm/mV
0.2
0.1
–0.001
–0.005
–0.007
0.35
0.25
%
%
% pts/°C
% pts/V
% pts/V
3.61
1.18
2.39
1
9.3
11
0.6
2.6
V
V
V
mA
mA
Ω
%/°C
–40°C to 85°C
85
35
4.3
6.6
kHz
kHz
µs
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
2.0
3.4
6.3
3.3
5.6
9.9
µs
µs
µs
5.5
V
V
15.5
15.5
mA
mA
85
100
125
°C
°C
°C
°C/W
5.0
4.5
VIN+ = 200mV, –40°C < TA < 85°C, 4.5V < VS1 < 5.5V
–40°C < TA < 85°C, 4.5V < VS1 < 5.5V
TEMPERATURE RANGE
Specification
Operating
Storage
θC–A
10.7
11.6
–40
–40
–55
86
NOTES: (1) This part may also be used in Pollution Degree 3 environments where the rated mains voltage is 300Vrms (per DIN VDE0109/12.83). (2) IMRR
= 20 log (∂VIN/∂VISO). (3) Time averaged value. (4) VIN+ = VIN– = VCM. CMRR = 20 log (∂VCM/∂VOS). (5) The slope of the best-fit line of (VOUT+ – VOUT–) vs
(VIN+ – VIN–). (6) Change in nonlinearity vs temperature or supply voltage expressed in number of percentage points per °C or volt. (7) For best offset voltage
performance. (8) For devices with minimum VISO specified at 3750Vrms, each isolation amplifier is proof-tested by applying an insulation test voltage ≥
4500Vrms for 1 second (leakage current < 5µA). This specification does not guarantee continuous operation. (9) Pins 1-4 are shorted together and pins 58 are shorted together for this test.
4
ISO130
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SBOS220
TYPICAL CHARACTERISTICS
At TA = 25°C, VS1, VS2 = 5.0VDC, VIN+, VIN– = 0V, unless otherwise noted.
BANDWIDTH vs TEMPERATURE
AMPLITUDE and PHASE RESPONSE vs FREQUENCY
48
0
–5
0
44
3dB Bandwidth
90
40
80
36
45° Phase Bandwidth
70
32
60
–40
–20
0
20
40
60
80
Relative Amplitude (dB)
100
45° Phase Bandwidth (kHz)
3dB Bandwidth (kHz)
Amplitude
–10
–15
–1
Phase
28
100
–2
–30
–3
–45
1k
PROPAGATION DELAYS and RISE/FALL TIME
vs TEMPERATURE
INPUT VOLTAGE NOISE vs INPUT VOLTAGE
10
3
Input Voltage Noise (mVrms)
Delay to 90%
8
Time (µs)
10k
Frequency (Hz)
Temperature (°C)
6
Rise/Fall Time
4
Delay to 50%
2
Delay to 10%
0
–40
2.5
2
No Bandwidth Limiting
1.5
1
Bandwidth Limited
to 10kHz
Bandwidth Limited to 100kHz
0.5
0
–20
0
20
40
60
80
100
0
50
100
150
200
Temperature (°C)
Input Voltage (mV)
INPUT OFFSET VOLTAGE CHANGE vs TEMPERATURE
INPUT OFFSET VOLTAGE CHANGE vs
INPUT SUPPLY VOLTAGE
1500
1000
500
+2σ
0
Mean
–500
–1000
–40
–2σ
–20
0
20
40
60
80
100
VS2 = 5V
400
200
+2σ
0
Mean
–200
–2σ
–400
–600
4.4
Temperature (°C)
4.6
4.8
5.0
5.2
5.4
5.6
Input Supply Voltage, VS1 (V)
ISO130
SBOS220
250
600
Input Offset Voltage Change (µV)
Input Offset Voltage Change (µV)
–60
100k
–4
100
Phase (degrees)
110
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5
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS1, VS2 = 5.0VDC, VIN+, VIN– = 0V, unless otherwise noted.
INPUT OFFSET VOLTAGE CHANGE vs
OUTPUT SUPPLY VOLTAGE
INPUT CURRENT vs INPUT VOLTAGE
2
VS1 = 5V
300
0
200
100
+2σ
0
Mean
IInput Current (mA)
Input Offset Voltage Change (µV)
400
–2
–4
–6
–8
–100
– 2σ
–200
4.4
–10
4.6
4.8
5.0
5.2
5.4
–6
5.6
–4
–2
GAIN DRIFT vs TEMPERATURE
2
4
6
GAIN CHANGE vs INPUT SUPPLY VOLTAGE
1.5
0.5
1
+2σ
0
Gain Change (%)
Gain Drift (%)
0
Input Voltage (V)
Output Supply Voltage, VS2 (V)
+2σ
0.5
Mean
0
–0.5
Mean
VS2 = 5V
–0.5
–1
–2σ
–1.5
–2σ
–1
–40
–20
0
20
40
60
80
–2
4.4
100
Temperature (°C)
4.6
4.8
5.0
5.2
5.4
5.6
Input Supply Voltage, VS1 (V)
NONLINEARITY ERROR vs INPUT VOLTAGE
GAIN CHANGE vs OUTPUT SUPPLY VOLTAGE
0.3
0.5
VS1 = 5V
0.2
0.4
% of Full-Scale
Gain Change (%)
Mean
0.3
+2σ
0.2
0.1
Mean
0.1
+2σ
0
–2σ
–0.1
–0.2
0
–2σ
–0.1
4.4
4.6
4.8
5.0
5.2
5.4
5.6
–0.3
–0.2
0
0.1
0.2
Input Voltage (V)
Output Supply Voltage, VS2 (V)
6
–0.1
ISO130
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SBOS220
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS1, VS2 = 5.0VDC, VIN+, VIN– = 0V, unless otherwise noted.
NONLINEARITY CHANGE vs INPUT SUPPLY VOLTAGE
NONLINEARITY CHANGE vs TEMPERATURE
0.15
0.06
Nonlinearity Change (% pts)
Nonlinearity Change (% pts)
VS2 = 5V
0.10
0.05
+2σ
0
Mean
–0.05
0.04
0.02
+2σ
0
Mean
–0.02
–2σ
–0.04
–2σ
–0.10
–40
–20
0
20
40
60
80
–0.06
4.4
100
Temperature (°C)
4.6
4.8
5.0
5.2
5.4
NONLINEARITY CHANGE vs
OUTPUT SUPPLY VOLTAGE
NONLINEARITY ERROR vs INPUT VOLTAGE
0.15
0.06
+2σ
VS1 = 5V
0.10
0.04
Error -% of Full-Scale
Non-Linearity Change (%PTS)
5.6
Input Supply Voltage, VS (V)
+2σ
0.02
0
Mean
–0.02
Mean
0.05
0
–2σ
–0.05
–0.10
–0.15
–2σ
–0.04
4.4
4.6
4.8
5.0
5.2
5.4
–0.20
–0.10
5.6
–0.05
3.5
–200
VOUT+
(Pin 7)
2.5
2
–400
–600
–800
–1000
1.5
1
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
–1200
–0.2
–0.1
0
0.1
0.2
Input Voltage (V)
Input Voltage (V)
ISO130
SBOS220
0.10
INPUT CURRENT vs INPUT VOLTAGE
0
Input Current (nA)
Output Voltage (V)
OUTPUT VOLTAGE vs INPUT VOLTAGE
4
VOUT–
(Pin 6)
0.05
Input Voltage (V)
Output Supply Voltage, VS (V)
3
0
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7
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C, VS1, VS2 = 5.0VDC, VIN+, VIN– = 0V, unless otherwise noted.
INPUT SUPPLY CURRENT vs INPUT VOLTAGE
OUTPUT SUPPLY CURRENT vs INPUT VOLTAGE
10.5
Output Supply Current (mA)
12
Input Supply Current (mA)
TA = –40°C
10
TA = –25°C
9.5
TA = –85°C
9
8.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
TA = –40°C
11.5
TA = 25°C
TA = –85°C
11
10.5
10
–0.4
0.4
Input Voltage (V)
300
200
100
100
50
80
100
120
0.1
0.2
0.3
0.4
0
–100mV
—
1.6V
—
0
0
60
0
+100mV
Input
150
40
–0.1
LARGE SIGNAL SINUSOIDAL RESPONSE
OF ISO130
Output
400
PSI-OUTPUT POWER (mW)
PSI-INPUT POWER (mW)
200
20
–0.2
Input Voltage (V)
DEPENDENCE OF SAFETY-LIMITING PARAMETERS
ON AMBIENT TEMPERATURE
0
–0.3
140
160
180
10µs/div
Ambient Temperature (°C)
OVERLOAD RECOVERY OF ISO130
VIN = 500mV to 0, 2kHz Square Wave
LARGE SIGNAL SQUARE WAVE RESPONSE
OF ISO130
Input
+100mV
Output (V)
0
–100mV
Output
—
2.4
1.6V
1.4
—
2µs/div
10µs/div
8
3.4
ISO130
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SBOS220
THEORY OF OPERATION
4500Vrms for one second. This is to guarantee the isolation
amplifier will survive a 3750V transient voltage. The barrier
leakage current test limit is 5µA. Pins 1-4 are shorted
together and pins 5-8 are shorted together during the test.
This test is followed by the partial discharge isolation
voltage test as specified in the German VDE0884. This
method requires the measurement of small current pulses
(<5pico Colomb) while applying 960Vrms across every
ISO130 isolation barrier. This guarantees 600Vrms continuous isolation (VISO) voltage. No partial discharge may be
initiated to pass this test. This criterion confirms transient
overvoltage (1.6 x 600Vrms) protection without damage to
the ISO130.
This test method represents “state of the art” for nondestructive high voltage reliability testing. It is based on the effects
of nonuniform fields that exist in heterogeneous dielectric
material during barrier degradation. In the case of void nonuniformities, electric field stress begins to ionize the void
region before bridging the entire high voltage barrier. The
transient conduction of charge during and after the ionization can be detected externally as a burst of 0.01 to 0.1µs
current pulses that repeat on each AC voltage cycle. The
minimum AC barrier voltage that initiates partial discharge
is defined as the “inception voltage”. Decreasing the barrier
voltage to a lower level is required before partial discharge
ceases and is defined as the “extinction voltage”.
The ISO130 isolation amplifier (Figure 1) uses an input and
output section galvanically isolated by a high speed optical
barrier built into the plastic package. The input signal is
converted to a time averaged serial bit stream by use of a
sigma-delta analog-to-digital converter and then optically
transmitted digitally across the isolation barrier. The output
section receives the digital signal and converts it to an
analog voltage, which is then filtered to produce the final
output signal.
Internal amplifiers are chopper-stabilized to help maintain
device accuracy over time and temperature. The encoder
circuit eliminates the effects of pulse-width distortion of the
optically transmitted data by generating one pulse for every
edge of the converter data to be transmitted. This coding
scheme reduces the effects of the non-ideal characteristics of
the LED, such as non-linearity and drift over time and
temperature.
ISOLATION AND INSULATION SPECIFICATIONS
The performance of the isolation barrier of the ISO130 is
specified with three specifications, two of which require
high voltage testing. In accordance with UL1577, the barrier
integrity of each isolation amplifier is proof-tested by applying an insulation test voltage greater than or equal to
Voltage
Regulator
Voltage
Regulator
Clk
Isolation
Barrier
Σ∆
A/D
and
Encoder
Input
LED
Drive
Circuit
Decoder
and
D/A
Detector
CIrcuit
Output
Filter
FIGURE 1. Block Diagram of ISO130 Isolation Amplifier.
330pF
5.11kΩ
+5V
In 78L05 Out
+15V
0.1µF
1
2
8
7
+
9V
0.1µF
0.1µF
0.1µF
1kΩ
VOUT+
1kΩ
ISO130
VOUT
OPA604
6
5
3
0.1µF
4
330pF
Pulse Generator
+
5.11kΩ
–15V
–
VIM
FIGURE 2. Isolation Mode Rejection and Transient Immunity Test Circuit.
ISO130
SBOS220
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9
Both tests are 100% production tests. The partial discharge
testing of the ISO130 is performed after the UL1577 test
criterion giving more confidence in the barrier reliability.
The third guaranteed isolation specification for the ISO130 is
Transient Immunity (TI), which specifies the minimum rate
of rise or fall of an isolation mode noise signal at which small
output perturbations begin to occur. An isolation mode signal
is defined as a signal appearing between the isolated grounds,
GND1 and GND2. Isolation Mode Voltage (IMV) is the
voltage appearing between isolated grounds. Under certain
circumstances this voltage across the isolation barrier can
induce errors at the output of the isolation amplifier. Figure 2
shows the Transient Immunity Test Circuit for the ISO130. In
this test circuit a pulse generator is placed between the
isolated grounds (GND1 and GND2). The inputs of the
ISO130 are both tied to GND1. A difference amplifier is used
to gain the output signal of the ISO130. A Transient Immunity failure is determined when the output of the ISO130
changes by more than 50mV as illustrated in Figure 3.
Finally, Isolation Mode Rejection Ratio (typically >140dB
for the ISO130) is defined as the ratio of differential signal
gain to the isolation mode gain at 60Hz. The magnitude of
the 60Hz voltage across the isolation barrier during this test
is not so large as to cause Transient Immunity errors. The
Isolation Mode Rejection Ratio should not be confused with
the Common Mode Rejection Ratio. The Common Mode
Rejection Ratio defines the relationship of differential signal
gain (signal applied differentially between pins 2 and 3) to
the common mode gain (input pins tied together and the
signal applied to both inputs at the same time).
APPLICATIONS INFORMATION
APPLICATION CIRCUITS
Figure 4 illustrates a typical application for the ISO130. In
this motor control circuit, the current that is sent to the motor
is sensed by the resistor, RSENSE. The voltage drop across
this resistor is gained up by the ISO130 and then transmitted
across the isolation barrier. A difference amplifier, A2, is
used to change the differential output signal of the ISO130
to a single ended signal. This voltage information is then
sent to the control circuitry of the motor. The ISO130 is
particularly well suited for this application because of its
superior Transient Immunity (10kV/µs, max) and its excellent immunity to RF noise.
1000V
VIM
0V
50mV Perturbation
(Definition of Failure)
VOUT
0V
FIGURE 3. Typical Transient Immunity Failure Waveform.
HV+
•••
+V
150pF
In 78L05 Out
+5V
0.1µF
1
0.1µF
2
0.1µF
10kΩ
+15V
8
7
2kΩ
VOUT+
2
OPA604
2kΩ
ISO130
0.01µF
3
6
5
3
•••
+
6
–15V
150pF
10kΩ
4
–
RSENSE
•••
HV–
FIGURE 4. ISO130 Used to Monitor Motor Current.
10
ISO130
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SBOS220
The current-sensing resistor should have a relatively low
value of resistance (to minimize power dissipation), a fairly
low inductance (to accurately reflect high-frequency signal
components), and a reasonably tight tolerance (to maintain
overall circuit accuracy).
LAYOUT SUGGESTIONS
1. Bypass capacitors should be located as close as possible
to the input and output power supply pins.
2. In some applications, offset voltage can be reduced by
placing a 0.01µF capacitor from pin 2 and/or pin 3 to
GND1. This noise can be caused by the combination of
long input leads and the switched-capacitor nature of the
input circuit. This capacitor(s) should be placed as close
to the isolation amplifier as possible.
3. The trace lengths at input should be kept short or a twisted
wire pair should be used to minimize EMI and inductance
effects. For optimum performance, the input signal should
be as close to the input pins a possible.
4. A maximum distance between the input and output sides
of the isolation amplifier should be maintained in the
layout in order to minimize stray capacitance. This practice will help obtain optimal Isolation Mode performance.
Ground planes should not pass below the device on the
PCB.
5. Care should be taken in selecting isolated power supplies
or regulators. The ISO130 can be affected by changes in
the power supply voltages. Carefully regulated power
supplies are recommended.
6. For improved nonlinearity and nonlinearity temperature
drift performance, pin 3 should be tied to GND1 and the
input voltage range of pin 2 should be less than 100mV.
ISO130
SBOS220
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11
PACKAGE DRAWINGS
12
ISO130
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SBOS220
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