a Dual Picoampere Input Current Bipolar Op Amp AD706 FEATURE CONNECTION DIAGRAM HIGH DC PRECISION 50 mV max Offset Voltage 0.6 mV/8C max Offset Drift 110 pA max Input Bias Current Plastic Mini-DIP (N) Cerdip (Q) and Plastic SOIC (R) Packages LOW NOISE 0.5 mV p-p Voltage Noise, 0.1 Hz to 10 Hz AMPLIFIER 1 LOW POWER 750 mA Supply Current Available in 8-Lead Plastic Mini-DlP, Hermetic Cerdip and Surface Mount (SOIC) Packages Available in Tape and Reel in Accordance with EIA-481A Standard Single Version: AD705, Quad Version: AD704 PRIMARY APPLICATIONS Low Frequency Active Filters Precision Instrumentation Precision Integrators OUTPUT 1 AMPLIFIER 2 AD706 8 V1 –IN 2 7 OUTPUT 1IN 3 6 –IN 5 1IN V– 4 TOP VIEW The AD706 is offered in three varieties of an 8-lead package: plastic mini-DIP, hermetic cerdip and surface mount (SOIC). “J” grade chips are also available. PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD706 is a dual, low power, bipolar op amp that has the low input bias current of a BiFET amplifier, but which offers a significantly lower IB drift over temperature. It utilizes superbeta bipolar input transistors to achieve picoampere input bias current levels (similar to FET input amplifiers at room temperature), while its IB typically only increases by 5× at 125°C (unlike a BiFET amp, for which IB doubles every 10°C for a 1000× increase at 125°C). The AD706 also achieves the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier. 1. The AD706 is a dual low drift op amp that offers BiFET level input bias currents, yet has the low IB drift of a bipolar amplifier. It may be used in circuits using dual op amps such as the LT1024. The AD706 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in precision instrumentation and as a high quality integrator. The AD706 is internally compensated for unity gain and is available in five performance grades. The AD706J and AD706K are rated over the commercial temperature range of 0°C to +70°C. The AD706A and AD706B are rated over the industrial temperature range of –40°C to +85°C. 3. The AD706 can be used in applications where a chopper amplifier would normally be required but without the chopper’s inherent noise. 100 10 TYPICAL IB – nA Since it has only 1/20 the input bias current of an OP07, the AD706 does not require the commonly used “balancing” resistor. Furthermore, the current noise is 1/5 that of the OP07, which makes this amplifier usable with much higher source impedances. At 1/6 the supply current (per amplifier) of the OP07, the AD706 is better suited for today’s higher density boards. 2. The AD706 provides both low drift and high dc precision. TYPICAL JFET AMP 1 0.1 AD706 0.01 –55 +25 +110 TEMPERATURE – 8C +125 Figure 1. Input Bias Current vs. Temperature REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1997 AD706–SPECIFICATIONS (@ T = +258C, V A Parameter INPUT OFFSET VOLTAGE Initial Offset Offset vs. Temp, Average TC vs. Supply (PSRR) TMIN to TMAX Long Term Stability CM = 0 V and 615 V dc, unless otherwise noted) Conditions Min TMIN to TMAX VS = ± 2 V to ± 18 V VS = ± 2.5 V to ± 18 V 110 106 AD706J/A Typ Max 30 40 0.2 132 126 0.3 100 150 1.5 50 200 250 Min 112 108 AD706K/B Typ Max Units 10 25 0.2 132 126 0.3 50 100 0.6 µV µV µV/°C dB dB µV/Month 30 110 160 pA pA pA/°C pA pA INPUT BIAS CURRENT1 VCM = 0 V VCM = ± 13.5 V vs. Temp, Average TC TMIN to TMAX TMIN to TMAX INPUT OFFSET CURRENT vs. Temp, Average TC TMIN to TMAX TMIN to TMAX 0.3 VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V 30 0.6 80 80 VCM = 0 V VCM = ± 13.5 V MATCHING CHARACTERISTICS Offset Voltage Input Bias Current2 TMIN to TMAX Common-Mode Rejection Power Supply Rejection TMIN to TMAX @ f = 10 Hz RL = 2 kΩ G = –1 TMIN to TMAX INPUT IMPEDANCE Differential Common Mode INPUT VOLTAGE RANGE Common-Mode Voltage Common-Mode Rejection Ratio 150 250 30 0.4 80 80 250 350 106 106 106 104 TMIN to TMAX FREQUENCY RESPONSE Unity Gain Crossover Frequency Slew Rate 200 300 150 250 300 500 TMIN to TMAX Crosstalk (Figure 19a) 0.2 300 400 VCM = ± 13.5 V TMIN to TMAX 110 108 110 106 dB 0.8 0.15 0.15 0.8 0.15 0.15 MHz V/µs V/µs 40i2 300i2 40i2 300i2 MΩipF GΩipF ± 13.5 ± 14 ± 13.5 ± 14 V 110 108 132 128 114 108 132 128 dB dB pA p-p fA/√Hz 3 50 INPUT VOLTAGE NOISE 0.1 Hz to 10 Hz f = 10 Hz f = 1 kHz 0.5 17 15 0.5 17 15 OPEN-LOOP GAIN VO = ± 12 V RLOAD = 10 kΩ TMIN to TMAX VO = ± 10 V RLOAD = 2 kΩ TMIN to TMAX Gain = +1 22 1.0 22 µV p-p nV/√Hz nV/√Hz 200 150 2000 1500 400 300 2000 1500 V/mV V/mV 200 150 1000 1000 300 200 1000 1000 V/mV V/mV ± 13 ± 13 ± 14 ± 14 ± 15 ± 13 ± 13 ± 14 ± 14 ± 15 V V mA 10,000 pF 10,000 –2– µV µV pA pA dB dB dB dB 150 3 50 Current Capacitive Load Drive Capability pA pA pA/°C pA pA 150 0.1 Hz to 10 Hz f = 10 Hz RLOAD = 10 kΩ TMIN to TMAX Short Circuit 200 300 75 150 150 250 INPUT CURRENT NOISE OUTPUT CHARACTERISTICS Voltage Swing 100 200 REV. C AD706 Parameter Conditions Min POWER SUPPLY Rated Performance Operating Range Quiescent Current, Total AD706J/A Typ Max ± 15 ± 2.0 TRANSISTOR COUNT TMIN to TMAX 0.75 0.8 # of Transistors 90 Min ± 18 1.2 1.4 AD706K/B Typ Max ± 2.0 ± 15 Units V V mA mA ± 18 1.2 1.4 0.75 0.8 90 NOTES l Bias current specifications are guaranteed maximum at either input. 2 Input bias current match is the difference between corresponding inputs (I B of –IN of Amplifier #1 minus I B of –IN of Amplifier #2). ∆VOS #1 CMRR match is the difference between ∆VCM PSRR match is the difference between ∆VSUPPLY ∆VOS # 2 for amplifier #1 and ∆VCM for amplifier #l and ∆VSUPPLY ∆VOS #1 for amplifier #2 expressed in dB. ∆VOS # 2 for amplifier #2 expressed in dB. All min and max specifications are guaranteed. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS l NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic Package: θJA = 100°C/Watt 8-Lead Cerdip Package: θJA = 110°C/Watt 8-Lead Small Outline Package: θJA = 155°C/Watt 3 The input pins of this amplifier are protected by back-to-back diodes. If the differential voltage exceeds ± 0.7 volts, external series protection resistors should be added to limit the input current to less than 25 mA. ORDERING GUIDE Model Temperature Range Description AD706AN AD706JN AD706KN AD706JR AD706JR-REEL AD706AQ AD706BQ AD706AR AD706AR-REEL –40°C to +85°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Plastic DIP Plastic DIP Plastic DIP SOIC Tape and Reel Cerdip Cerdip SOIC Tape and Reel Package Option* N-8 N-8 N-8 R-8 Q-8 Q-8 R-8 *N = Plastic DIP; Q = Cerdip, R = Small Outline Package. METALIZATION PHOTOGRAPH Dimensions shown in inches and (mm). Contact factory for latest dimensions. OUTPUT A 1 +VS 8 –INPUT A 0.118 (3.00) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation (Total: Both Amplifiers)2 . . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . +0.7 Volts Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C Operating Temperature Range AD706J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C AD706A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature (Soldering 10 secs) . . . . . . . . . . . . +300°C 2 7 +INPUT A 6 –VS OUTPUT B 3 5 4 –INPUT B +INPUT B 0.074 (1.88) CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD706 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. C –3– WARNING! ESD SENSITIVE DEVICE AD706–Typical Characteristics (@ +258C, V = 615 V, unless otherwise noted) S 1000 1000 SAMPLE SIZE: 3000 400 200 800 NUMBER OF UNITS 600 600 400 200 0 –80 –80 0 80 160 INPUT BIAS CURRENT – pA –120 Figure 3. Typical Distribution of Input Bias Current –1.5 11.5 11.0 10.5 –VS 0 5 10 15 SUPPLY VOLTAGE – 6Volts 30 25 20 15 10 5 0 1k 20 Figure 5. Input Common-Mode Voltage Range vs. Supply Voltage 100 OFFSET VOLTAGE DRIFT – mV/8C OUTPUT VOLTAGE – Volts p-p –1.0 100k 10k FREQUENCY – Hz 80 40 3 2 1 0 0 –0.8 –0.4 0 0.4 0.8 OFFSET VOLTAGE DRIFT – mV/8C Figure 8. Typical Distribution of Offset Voltage Drift FOR INDUSTRIAL TEMPERATURE RANGE 1.0 100k 1M 10M 10k SOURCE RESISTANCE – V 100M 60 INPUT BIAS CURRENT – pA 120 CHANGE IN OFFSET VOLTAGE – mV 160 10 Figure 7. Offset Voltage Drift vs. Source Resistance 4 SAMPLE SIZE: 375 –558C TO 11258C SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED 0.1 1k 1M Figure 6. Large Signal Frequency Response 200 –60 0 60 120 INPUT OFFSET CURRENT – pA Figure 4. Typical Distribution of Input Offset Current 35 –0.5 400 0 –160 1VS 600 200 0 –40 0 40 80 INPUT OFFSET VOLTAGE – mV Figure 2. Typical Distribution of Input Offset Voltage INPUT COMMON-MODE VOLTAGE LIMIT – Volts (REFERRED TO SUPPLY VOLTAGES) SAMPLE SIZE: 2400 800 NUMBER OF UNITS NUMBER OF UNITS 800 NUMBER OF UNITS 1000 SAMPLE SIZE: 5100 0 1 2 3 4 WARM-UP TIME – Minutes 5 Figure 9. Change in Input Offset Voltage vs. Warm-Up Time –4– 40 20 POSITIVE IB 0 –20 –40 –60 –15 NEGATIVE IB –10 –5 0 5 10 15 COMMON-MODE VOLTAGE – Volts Figure 10. Input Bias Current vs. Common-Mode Voltage REV. C AD706 1000 CURRENT NOISE – fA/!Hz 100 10 1 CMRR – dB QUIESCENT CURRENT – mA 900 +1258C +258C –558C 5 10 15 SUPPLY VOLTAGE – 6 Volts +140 160 +120 140 +100 120 +80 +60 – PSRR 80 60 +20 40 +258C +1258C 1M 4 6 8 10 LOAD RESISTANCE – kV 100 Figure 17. Open-Loop Gain vs. Load Resistance vs. Load Resistance 1 10 20 0.1 100 1k 10k 100k 1M FREQUENCY – Hz Figure 15. Common-Mode Rejection Ratio vs. Frequency OPEN-LOOP VOLTAGE GAIN – dB OPEN-LOOP VOLTAGE GAIN –558C REV. C 100 +40 0 0.1 10M 2 10 Figure 13. 0.1 Hz to 10 Hz Noise Voltage 180 20 Figure 14. Quiescent Supply Current vs. Supply Voltage 1 5 TIME – Seconds 0 1000 +160 600 100k 10 100 FREQUENCY – Hz + PSRR 700 0 1 Figure 12. Input Noise Current Spectral Density 1000 800 VOUT 1000 Figure 11. Input Noise Voltage Spectral Density 10kV 20MV PSRR – dB 10 100 FREQUENCY – Hz 100V 10 140 0 +VS 120 30 –0.5 60 100 PHASE 80 90 60 120 150 40 GAIN 20 180 0 210 –20 0.01 0.1 1 240 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz Figure 18. Open-Loop Gain and Phase Shift vs. Frequency –5– 1 10 100 1k 10k 100k 1M FREQUENCY – Hz Figure 16. Power Supply Rejection Ratio vs. Frequency (REFERRED TO SUPPLY VOLTAGES) 1 0.5mV OUTPUT VOLTAGE SWING – Volts 1 100 PHASE SHIFT – Degrees VOLTAGE NOISE – nV/!Hz 1000 –1.0 –1.5 +1.5 +1.0 +0.5 –VS 0 5 10 15 SUPPLY VOLTAGE – 6 Volts 20 Figure 19. Output Voltage Swing vs. Supply Voltage AD706 1000 CLOSED-LOOP OUTPUT IMPEDANCE – V –80 CROSSTALK – dB –100 –120 –140 –160 10 100 10 AV = –1000 1 AV = + 1 0.1 0.01 IOUT = +1mA 0.001 100 1k FREQUENCY – Hz 10k 1 100k Figure 20a. Crosstalk vs. Frequency 10 100 1k FREQUENCY – Hz 10k 100k Figure 21. Magnitude of Closed-Loop Output Impedance vs. Frequency +VS 0.1mF RF +VS 2 1/2 AD706 3 4 VOUT #1 1 0.1mF 20V p-p 8 0.1mF RL 2kV SINE WAVE GENERATOR VIN –VS SQUARE WAVE INPUT +VS 1mF 6 RL 2kV CL –VS Figure 22a. Unity Gain Follower (For Large Signal Applications, Resistor RF Limits the Current Through the Input Protection Diodes) 0.1mF 8 1/2 AD706 4 0.1mF 20kV 2.21kV VOUT 1/2 AD706 VOUT #2 7 5 V #2 CROSSTALK = 20 LOG10 OUT –20dB VOUT #1 Figure 20b. Crosstalk Test Circuit Figure 22b. Unity Gain Follower Large Signal Pulse Response, RF = 10 kΩ, CL = 1,000 pF Figure 22c. Unity Gain Follower Small Signal Pulse Response, RF = 0 Ω, CL = 100 pF –6– Figure 22d. Unity Gain Follower Small Signal Pulse Response, RF = 0 Ω, CL = 1000 pF REV. C AD706 10kV +VS + 0.1mF 10kV – VIN 8 VOUT 1/2 AD706 + SQUARE WAVE INPUT RL 2.5kV 4 CL 0.1µF –VS Figure 23a. Unity Gain Inverter Connection Figure 23b. Unity Gain Inverter Large Signal Pulse Response, CL = 1,000 pF Figure 23c. Unity Gain Inverter Small Signal Pulse Response, CL = 100 pF Figure 24 shows an in-amp circuit that has the obvious advantage of requiring only one AD706, rather than three op amps, with subsequent savings in cost and power consumption. The transfer function of this circuit (without RG) is: Figure 23d. Unity Gain Inverter Small Signal Pulse Response, CL = 1000 pF increases with gain, once initial trimming is accomplished—but CMR is still dependent upon the ratio matching of Resistors R1 through R4. Resistor values for this circuit, using the optional gain resistor, RG, can be calculated using: R4 VOUT = (VIN #1 − VIN #2 ) 1+ R3 R1= R4 = 49.9 kΩ 49.9 kΩ R2 = R3 = 0.9 G −1 99.8 kΩ RG = 0.06 G for R1 = R4 and R2 = R3 Input resistance is high, thus permitting the signal source to have an unbalanced output impedance. where G = Desired Circuit Gain Table I provides practical 1% resistance values. (Note that without resistor RG, R2 and R3 = 49.9 kΩ/G–1.) RG (OPTIONAL) R1 R3 R2 49.9kV R4 49.9kV +VS Table I. Operating Gains of Amplifiers A1 and A2 and Practical 1% Resistor Values for the Circuit of Figure 24 0.1mF 2 3 VIN#1 1kV – A1 RP* + 1/2 8 AD706 1 5 – A2 1/2 AD706 6 + 4 OUTPUT RP* VIN#2 –VS 1kV 0.1mF VOUT = (VIN#1 – VIN#2) (1+ R4 ) + ( 2R4 ) R3 RG FOR R1 = R4, R2 = R3 *OPTIONAL INPUT PROTECTION RESISTOR FOR GAINS GREATER THAN 100 OR INPUT VOLTAGES EXCEEDING THE SUPPLY VOLTAGE. Figure 24. A Two Op-Amp Instrumentation Amplifier Gain of A1 Gain of A2 R2, R3 R1, R4 1.10 1.33 1.50 2.00 10.1 101.0 1001 11.00 4.01 3.00 2.00 1.11 1.01 1.001 499 kΩ 150 kΩ 100 kΩ 49.9 kΩ 5.49 kΩ 499 Ω 49.9 Ω 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 49.9 kΩ 1.10 1.33 1.50 2.00 10.10 101.0 1001 For a much more comprehensive discussion of in-amp applications, refer to the Instrumentation Amplifier Applications Guide— available free from Analog Devices, Inc. Furthermore, the circuit gain may be fine trimmed using an optional trim resistor, RG. Like the three op-amp circuit, CMR REV. C Circuit Gain 7 –7– AD706 C1 R2 1MV INPUT 3 + C2 1/2 1 AD706 2 – *WITHOUT THE NETWORK, PINS 1 & 2, AND 6 & 7 OF THE AD706 ARE TIED TOGETHER. +VS C3 R3 1MV 0.1mF R4 1MV 5 + C4 4 8 1/2 7 AD706 OUTPUT 6 – 0.1mF –VS CAPACITORS C1 & C2 ARE SOUTHERN ELECTRONICS MPCC, POLYCARB 65%, 50 VOLT R5 2MV R6 2MV C5 0.01mF C1429b–2–12/97 R1 1MV C6 0.01mF OPTIONAL BALANCE RESISTOR NETWORKS* Figure 25. A 1 Hz, 4-Pole Active Filter OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) – mV A 1 Hz, 4-Pole, Active Filter Figure 25 shows the AD706 in an active filter application. An important characteristic of the AD706 is that both the input bias current, input offset current and their drift remain low over most of the op amp’s rated temperature range. Therefore, for most applications, there is no need to use the normal balancing resistor. Adding the balancing resistor enhances performance at high temperatures, as shown by Figure 26. 180 WITHOUT OPTIONAL BALANCE RESISTOR, R3 120 60 0 WITH OPTIONAL BALANCE RESISTOR, R3 –60 –120 –180 –40 0 +40 +80 TEMPERATURE – 8C +120 Figure 26. VOS vs. Temperature Performance of the 1 Hz Filter Table II. 1 Hz, 4-Pole, Low Pass Filter Recommended Component Values Desired Low Pass Response Section 1 Frequency (Hz) Bessel Butterworth 0.1 dB Chebychev 0.2 dB Chebychev 0.5 dB Chebychev 1.0 dB Chebychev 1.43 1.00 0.648 0.603 0.540 0.492 Q Section 2 Frequency (Hz) Q C1 (mF) C2 (mF) C3 (mF) C4 (mF) 0.522 0.541 0.619 0.646 0.705 0.785 1.60 1.00 0.948 0.941 0.932 0.925 0.806 1.31 2.18 2.44 2.94 3.56 0.116 0.172 0.304 0.341 0.416 0.508 0.107 0.147 0.198 0.204 0.209 0.206 0.160 0.416 0.733 0.823 1.00 1.23 0.0616 0.0609 0.0385 0.0347 0.0290 0.0242 PRINTED IN U.S.A. NOTE Specified Values are for a –3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly, i.e.: for 3 Hz Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Cerdip (Q-8) 0.005 (0.13) MIN 0.055 (1.4) MAX 8 0.310 (7.87) 0.220 (5.59) 8 1 PIN 1 0.200 (5.08) MAX 5 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 4 PIN 1 0.210 (5.33) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.100 0.070 (1.78) SEATING PLANE 0.014 (0.36) (2.54) 0.030 (0.76) BSC 0.2440 (6.20) 0.2284 (5.80) 0.280 (7.11) 0.240 (6.10) 4 0.405 (10.29) MAX 0.1968 (5.00) 0.1890 (4.80) 0.430 (10.92) 0.348 (8.84) 5 1 SOIC (R-8) Plastic Mini-DIP (N-8) 0.060 (1.52) 0.015 (0.38) 0.160 (4.06) 0.115 (2.93) 15° 0° 0.015 (0.38) 0.008 (0.20) 0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC 0.130 (3.30) MIN SEATING PLANE –8– 8 5 1 4 0.1574 (4.00) 0.1497 (3.80) 0.325 (8.25) 0.300 (7.62) PIN 1 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.102 (2.59) 0.094 (2.39) 0.0098 (0.25) 0.0040 (0.10) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0138 (0.35) 0.0098 (0.25) PLANE BSC 0.0075 (0.19) 0.0196 (0.50) x 45° 0.0099 (0.25) 8° 0° 0.0500 (1.27) 0.0160 (0.41) REV. C