ETC IRF5210STRR

PD - 91405C
IRF5210S/L
HEXFET® Power MOSFET
Advanced Process Technology
Surface Mount (IRF5210S)
l Low-profile through-hole (IRF5210L)
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
Description
l
D
l
VDSS = -100V
RDS(on) = 0.06Ω
G
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in
any existing surface mount package. The D2Pak is suitable
for high current applications because of its low internal
connection resistance and can dissipate up to 2.0W in a
typical surface mount application.
The through-hole version (IRF5210L) is available for lowprofile applications.
ID = -40A
S
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ -10V…
Continuous Drain Current, VGS @ -10V…
Pulsed Drain Current …
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚…
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ…
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
-40
-29
-140
3.8
200
1.3
± 20
780
-21
20
-5.0
-55 to + 175
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
0.75
40
°C/W
5/13/98
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IRF5210S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-100
–––
–––
-2.0
10
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
17
86
79
81
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
2700
790
450
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, ID = -1mA…
0.06
Ω
VGS = -10V, ID = -24A „
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -21A…
-25
VDS = -100V, VGS = 0V
µA
-250
VDS = -80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
180
ID = -21A
25
nC VDS = -80V
97
VGS = -10V, See Fig. 6 and 13 „…
–––
VDD = -50V
–––
ID = -21A
ns
–––
RG = 2.5Ω
–––
RD = 2.4Ω, See Fig. 10 „
Between lead,
nH
–––
and center of die contact
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5…
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
IS
I SM
V SD
t rr
Q rr
ton
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -40
showing the
A
G
integral reverse
––– ––– -140
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -24A, VGS = 0V „
––– 170 260
ns
TJ = 25°C, IF = -21A
––– 1.2 1.8
µC
di/dt = -100A/µs „…
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 3.1mH
… Uses IRF5210 data and test conditions
RG = 25Ω, I AS = -21A. (See Figure 12)
ƒ ISD ≤ -21A, di/dt ≤ -480A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
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IRF5210S/L
1000
1000
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOT TOM - 4.5V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
100
10
-4.5 V
4 0µ s P U LS E W ID TH
T c = 2 5°C
A
1
0.1
1
10
-ID , Drain-to-Source Current (A )
-ID , D rain-to-S ou rc e C urre nt (A )
TO P
100
10
-4 .5V
4 0µ s P U LS E W ID TH
T C = 1 75 °C
1
100
0.1
-VD S , D rain-to-S ourc e V oltage (V )
R D S (on) , D ra in-to -S o urc e O n R e s is ta nc e
(N o rm alize d)
-I D , D rain-to-S ource C urrent (A)
3.0
100
TJ = 2 5 °C
TJ = 17 5 °C
10
V DS = -5 0 V
4 0µ s P U L S E W ID TH
5
6
7
8
9
-VG S , Ga te -to-Source Volta ge (V)
Fig 3. Typical Transfer Characteristics
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A
100
Fig 2. Typical Output Characteristics
1000
4
10
-VD S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
1
1
10
A
I D = -3 5A
2.5
2.0
1.5
1.0
0.5
VG S = -10 V
0.0
-60
-40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , J unc tion T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF5210S/L
20
5000
C , Capacitance (pF)
C iss
V GS
C iss
C rs s
C o ss
=
=
=
=
0V ,
f = 1MHz
C g s + C g d , C d s S H O R TE D
C gd
C ds + C g d
-V G S , G ate-to-S ource V oltage (V )
6000
4000
C oss
3000
C rss
2000
1000
0
10
V D S = -80 V
V D S = -50 V
V D S = -20 V
16
12
8
4
FO R TE S T CIR C U IT
S E E FIG U R E 1 3
0
A
1
I D = -2 1A
0
100
80
120
160
A
200
Q G , Total G ate C harge (nC )
-VD S , D rain-to-S ourc e V oltage (V )
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
O P E R A T IO N IN T H IS A R E A L IM ITE D
B Y R D S (o n)
-I D , D rain C urrent (A )
-I S D , Reverse D rain Current (A )
40
100
TJ = 1 75 °C
T J = 2 5°C
10
V G S = 0V
1
0.4
0.8
1.2
1.6
2.0
-VS D , S ourc e-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
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A
2.4
10µ s
100
100µs
10
1m s
10m s
T C = 25 °C
T J = 17 5°C
S ing le P u lse
1
1
A
10
100
1000
-VD S , D rain-to-S ourc e V oltage (V )
Fig 8. Maximum Safe Operating Area
IRF5210S/L
50
RD
VDS
-ID , Drain Current (A)
40
VGS
D.U.T.
RG
+
30
V DD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
10
td(on)
tr
t d(off)
tf
VGS
0
25
50
75
100
125
150
175
10%
TC , Case Temperature ( ° C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
90%
VDS
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.01
0.00001
0.10
P DM
0.05
t1
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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1
IRF5210S/L
D .U .T
RG
A
IA S
-2 0 V
tp
VD D
D R IV E R
0 .0 1Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
E A S , S ingle Pulse Avalanc he E nergy (m J)
2000
L
VDS
TOP
B O T TO M
1600
1200
800
400
0
A
25
IAS
ID
-8 .6A
-1 5A
-21 A
50
75
100
125
150
S tarting T J , J unc tion T em perature (°C )
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
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IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRF5210S/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+

• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
D=
Period
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
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[ ISD ]
IRF5210S/L
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
3
15 .4 9 (.6 10)
14 .7 3 (.5 80)
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
3X
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
8.89 (.3 50 )
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
Part Marking Information
D2Pak
IN TE R N A TIO N A L
R E C T IF IE R
LO G O
A S S E M B LY
LO T C O D E
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A
PART NUM BER
F530S
9 24 6
9B
1M
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
2.5 4 (.100 )
2X
IRF5210S/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
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IRF5210S/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .60 (.06 3)
1 .50 (.05 9)
1 1 .6 0 (.4 5 7 )
1 1 .4 0 (.4 4 9 )
0 .3 68 (.0 1 4 5 )
0 .3 42 (.0 1 3 5 )
1 5 .4 2 (.6 0 9 )
1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TR L
10 .9 0 (.42 9)
10 .7 0 (.42 1)
1 .75 (.06 9 )
1 .25 (.04 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .10 (.63 4 )
15 .90 (.62 6 )
F E E D D IRE C TIO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079)
2 3.9 0 (.9 41)
4
33 0.00
(1 4.1 73)
MA X.
NO TES :
1. C O M F O R M S TO E IA -4 18.
2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER .
3. D IM E N S IO N ME A S U R E D @ H U B .
4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .
60.00 (2.3 62)
MIN .
26 .40 (1.03 9)
24 .40 (.961 )
3
3 0.40 (1.1 97)
MAX.
4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
5/98
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