ETC IRFI9Z34N

PD - 9.1530A
IRFI9Z34N
HEXFET® Power MOSFET
Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS …
l Sink to Lead Creepage Dist. = 4.8mm
l P-Channel
l Fully Avalanche Rated
Description
l
D
VDSS = -55V
RDS(on) = 0.10Ω
G
ID = -14A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial
applications. The moulding compound used provides
a high isolation capability and a low thermal resistance
between the tab and external heatsink. This isolation
is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to
a heatsink using a single clip or by a single screw
fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current †
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚†
Avalanche Current†
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Ġ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
-14
-10
- 68
37
0.24
± 20
180
-10
3.7
-5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
4.1
65
°C/W
8/25/97
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IRFI9Z34N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-55
–––
–––
-2.0
4.2
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.05
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
13
55
30
41
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
620
280
140
V(BR)DSS
∆V(BR)DSS/∆TJ
I GSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, I D = -1mA†
0.10
Ω
VGS = -10V, ID = - 7.8A „
-4.0
V
VDS = VGS , ID = -250µA
–––
S
VDS = 25V, I D = -10A†
-25
VDS = - 55V, VGS = 0V
µA
-250
VDS = - 44V, VGS = 0V, T J = 150°C
100
V GS = 20V
nA
-100
VGS = -20V
35
ID = -10A
7.9
nC VDS = - 44V
16
VGS = -10V, See Fig. 6 and 13 „†
–––
VDD = -28V
–––
I D = -10A
ns
–––
RG = 13Ω
–––
RD = 2.6Ω, See Fig. 10 „†
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5†
Source-Drain Ratings and Characteristics
IS
ISM
V SD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) †
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -14
showing the
A
G
integral reverse
––– ––– -68
p-n junction diode.
S
––– ––– -1.3
V
TJ = 25°C, IS = - 7.8A, VGS = 0V „
––– 54
82
ns
TJ = 25°C, IF = -10A
––– 110 160
nC
di/dt = -100A/µs „†
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 3.6mH
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… t=60s, ƒ=60Hz
RG = 25Ω, IAS = -10A. (See Figure 12)
ƒ ISD ≤ -10A, di/dt ≤ -290A/µs, VDD ≤ V(BR)DSS,
† Uses IRF9Z34N data and test conditions
TJ ≤ 175°C
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IRFI9Z34N
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
-ID , D ra in -to -S o u rc e C u rre n t (A )
-ID , D ra in -to -S o u rce C u rre n t (A )
10
-4 .5V
1
1
10
10
-4 .5V
20 µ s PU LSE W ID TH
2 0µ s PU LS E W ID TH
TTcJ =
= 25°C
2 5°C
A
0.1
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
TOP
TOP
TTT
175°C
1 75°C
JCJ==175°C
1
0.1
100
Fig 1. Typical Output Characteristics
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
-I D , D rain -to- S our ce C urr ent ( A )
2.0
T J = 2 5 °C
T J = 1 7 5 °C
10
V DS = -2 5 V
2 0 µ s P U L S E W ID T H
5
6
7
8
9
A
100
Fig 2. Typical Output Characteristics
100
4
10
-VD S , Drain-to-Source V oltage (V )
-VD S , Drain-to-Source Voltage (V)
1
1
10
-VG S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
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A
I D = -1 7A
1.5
1.0
0.5
VG S = -10 V
0.0
-60
-40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFI9Z34N
V GS
C is s
C rss
C oss
C , C a p a cita n ce (p F )
1000
20
= 0 V,
f = 1M H z
= C gs + C gd , Cds SH OR TE D
= C gd
= C d s + C gd
-V G S , G a te -to -S o u rce V o lta g e (V )
1200
C is s
800
C o ss
600
400
C rs s
200
0
10
V DS = -44 V
V DS = -28 V
16
12
8
4
FO R TEST C IR C U IT
SEE F IGU R E 1 3
0
A
1
I D = -10 A
100
0
-VD S , D rain-to-S ource V oltage (V)
20
30
A
40
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
-I D , D ra in C u rre n t (A )
-IS D , R e ve rse D ra in C u rre n t (A )
10
10
T J = 17 5°C
T J = 25 °C
1
100
1 0µs
100µ s
10
1m s
VG S = 0 V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
A
1.6
-VS D , Source-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
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TTCJ == 225°C
5°C
T J = 1 75°C
Sin gle Pu lse
1
1
10m s
A
10
-VD S , Drain-to-Source V oltage (V )
Fig 8. Maximum Safe Operating Area
100
IRFI9Z34N
RD
VDS
16
VGS
D.U.T.
-I D , Drain Current (A)
RG
-
12
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
td(on)
tr
t d(off)
tf
VGS
10%
0
25
50
75
100
125
T C , Case Temperature
150
175
( ° C)
90%
VDS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response
(Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
0.01
0.00001
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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1
IRFI9Z34N
D .U .T
RG
IA S
- 20V
tp
VD D
A
D R IV E R
0 .0 1 Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
500
L
VDS
TOP
BO TTOM
400
300
200
100
0
A
25
I AS
ID
-4 .2A
-7.2 A
-10 A
50
75
100
125
150
Starting TJ , Junction T emperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
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IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRFI9Z34N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+

• dv/dt controlled by RG
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
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[ISD ]
IRFI9Z34N
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.41 7)
10.40 (.40 9)
ø
3.40 (.133 )
3.10 (.123 )
4.8 0 (.189)
4.6 0 (.181)
-A 3.70 (.145)
3.20 (.126)
16 .0 0 (.630)
15 .8 0 (.622)
2 .80 (.110)
2 .60 (.102)
LE AD A S SIGN M E N T S
1 - GA TE
2 - D R AIN
3 - SO U R C E
7 .10 (.280)
6 .70 (.263)
1.15 (.04 5)
M IN .
N O T ES :
1 D IM EN SION IN G & T O LER A N C IN G
PE R AN S I Y14.5 M , 1982
1
2
3
2 C O N TR OLLIN G D IM EN S ION : IN C H .
3.30 (.130 )
3.10 (.122 )
-B-
13 .7 0 (.540)
13 .5 0 (.530)
C
A
3X
1.40 (.05 5)
1.05 (.04 2)
3X
0.9 0 (.035)
3X 0.7 0 (.028)
0.25 (.010 )
M
A M
B
2 .54 (.100)
2X
0.48 (.019)
0.44 (.017)
2.85 (.112 )
2.65 (.104 )
D
B
M IN IM U M C R E EP AG E
D IST A NC E B ET W E EN
A-B -C -D = 4.80 (.189 )
Part Marking Information
TO-220 Fullpak
E X AM
PL E PLE
: TH
I S AISN AIR
010
E XAM
: IST HIS
N F1IRF
I840G
W ITW
H ITH
A S SAS
E MB
SELY
MBLY
E401
L OTLOT
CO DCODE
E 9 B1M
A
I NT E RN A TIO N AL
INT ER NAT IONA L
R E C TIF IE R
IRF
10
RE CTIF IER
IRF10
I840G
LOG O
9246
LOGO
9BE 401 19 M
24 5
A SS
E
MB
LY
AS SE MBLY
LOT
EE
LOT C OD
COD
P AR T NU M BE R
A
PA RT NU MBE R
D A TE C OD E
(YDYW
ATEW )CODE
W )A R
Y(YYW
Y = YE
ARK
WYY
W == YE
W EE
W W = W E EK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
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