NCS2001 Sub-One Volt Rail-to-Rail Operational Amplifier The NCS2001 is an industry first sub–one volt operational amplifier that features a rail–to–rail common mode input voltage range, along with rail–to–rail output drive capability. This amplifier is guaranteed to be fully operational down to 0.9 V, providing an ideal solution for powering applications from a single cell Nickel Cadmium (NiCd) or Nickel Metal Hydride (NiMH) battery. Additional features include no output phase reversal with overdriven inputs, trimmed input offset voltage of 0.5 mV, extremely low input bias current of 40 pA, and a unity gain bandwidth of 1.4 MHz at 5.0 V. The tiny NCS2001 is the ideal solution for small portable electronic applications and is available in the space saving Thin SOT–23–5 and SC70–5 packages with two industry standard pinouts. Features • • • • • • • • http://onsemi.com LOW VOLTAGE RAIL–TO–RAIL OPERATIONAL AMPLIFIER MARKING DIAGRAMS 0.9 V Guaranteed Operation Rail–to–Rail Common Mode Input Voltage Range Rail–to–Rail Output Drive Capability No Output Phase Reversal for Over–Driven Input Signals 0.5 mV Trimmed Input Offset 10 pA Input Bias Current 1.4 MHz Unity Gain Bandwidth at 2.5 V, 1.1 MHz at 0.5 V Tiny SC70–5 and Thin SOT–23–5 Packages 1 4 5 12 3 5 SC70–5 Q SUFFIX CASE 419A AAx 1 x = G for SN1 H for SN2 I for SQ1 J for SQ2 Y = Year W = Work Week PIN CONNECTIONS Single Cell NiCd/NiMH Battery Powered Applications Cellular Telephones Pagers Personal Digital Assistants Electronic Games Digital Cameras Camcorders Hand Held Instruments Rail to Rail Input AAxYW 1 Typical Applications • • • • • • • • 5 THIN SOT–23–5 N SUFFIX CASE 483 5 VOUT 1 VCC Non–Inverting Input 2 5 VEE 4 Inverting Input + – 3 Style 1 Pinout (SN1T1, SQ1T1) Rail to Rail Output VOUT 1 VEE Non–Inverting Input 2 5 VCC 4 Inverting Input + – 3 Style 2 Pinout (SN2T2, SQ2T2) 0.8 V to 7.0 V + - ORDERING INFORMATION Device This device contains 63 active transistors. June, 2001 – Rev. 4 1 Shipping NCS2001SN1T1 Thin SOT–23–5 3000 Tape & Reel NCS2001SN2T1 Thin SOT–23–5 3000 Tape & Reel NCS2001SQ1T1 SC70–5 3000 Tape & Reel NCS2001SQ2T1 SC70–5 3000 Tape & Reel Figure 1. Typical Application Semiconductor Components Industries, LLC, 2001 Package Publication Order Number: NCS2001/D NCS2001 MAXIMUM RATINGS Rating Symbol Value Unit VS 7.0 V Input Differential Voltage Range (Note 1) VIDR VEE –300 mV to 7.0 V V Input Common Mode Voltage Range (Note 1) VICR VEE –300 mV to 7.0 V V Output Short Circuit Duration (Note 2) tSc Indefinite sec Junction Temperature TJ 150 °C RJA PD 235 340 °C/W mW RJA PD 280 286 °C/W mW Tstg –65 to 150 °C VESD 2000 V Supply Voltage (VCC to VEE) Power Dissipation and Thermal Characteristics Thin SOT–23–5 Package Thermal Resistance, Junction to Air Power Dissipation @ TA = 70°C SC70–5 Package Thermal Resistance, Junction to Air Power Dissipation @ TA = 70°C Storage Temperature Range ESD Protection at any Pin Human Body Model (Note 3) 1. Either or both inputs should not exceed the range of VEE –300 mV to VEE +7.0 V. 2. Maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded. TJ = TA + (PD RJA) 3. ESD data available upon request. DC ELECTRICAL CHARACTERISTICS (VCC = 2.5 V, VEE = –2.5 V, VCM = VO = 0 V, RL to Gnd, TA = 25°C unless otherwise noted.) Characteristics Symbol Input Offset Voltage VCC = 0.45 V, VEE = –0.45 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C VCC = 1.5 V, VEE = –1.5 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C VCC = 2.5 V, VEE = –2.5 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C Min Typ Max VIO Unit mV –6.0 –8.5 –9.5 0.5 – – 6.0 8.5 9.5 –6.0 –7.0 –7.5 0.5 – – 6.0 7.0 7.5 –6.0 –7.5 –7.5 0.5 – – 6.0 7.5 7.5 ∆VIO/∆T – 8.0 – µV/°C IIB – 10 – pA Input Common Mode Voltage Range VICR – VEE to VCC – V Large Signal Voltage Gain VCC = 0.45 V, VEE = –0.45 V RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = –1.5 V RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = –2.5 V RL = 10 k RL = 2.0 k AVOL Input Offset Voltage Temperature Coefficient (RS = 50) TA = –40°C to 105°C Input Bias Current (VCC = 1.0 V to 5.0 V) http://onsemi.com 2 kV/V – – 40 20 – – – – 40 40 – – 20 15 40 40 – – NCS2001 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.5 V, VEE = –2.5 V, VCM = VO = 0 V, RL to Gnd, TA = 25°C unless otherwise noted.) Characteristics Symbol Output Voltage Swing, High State Output (VID = +0.5 V) VCC = 0.45 V, VEE = –0.45 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = –1.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = –2.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VOH Output Voltage Swing, Low State Output (VID = –0.5 V) VCC = 0.45 V, VEE = –0.45 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = –1.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = –2.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = –40°C to 105°C RL = 10 k RL = 2.0 k VOL Min 3 Max Unit V 0.40 0.35 0.494 0.466 – – 0.40 0.35 – – – – 0.40 0.35 – – – – 1.45 1.40 1.498 1.480 – – 1.45 1.40 – – – – 1.45 1.40 – – – – 2.45 2.40 2.498 2.475 – – 2.45 2.40 – – – – 2.45 2.40 – – – – V – – –0.494 –0.480 –0.40 –0.35 – – – – –0.40 –0.35 – – – – –0.40 –0.35 – – –1.493 –1.480 –1.45 –1.40 – – – – –1.45 –1.40 – – – – –1.45 –1.40 –2.492 –2.479 –2.45 –2.40 – – – – –2.45 –2.40 – – – – –2.45 –2.40 – – http://onsemi.com Typ NCS2001 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.5 V, VEE = –2.5 V, VCM = VO = 0 V, RL to Gnd, TA = 25°C unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Common Mode Rejection Ratio (Vin = 0 to 5.0 V) CMRR 60 70 – dB Power Supply Rejection Ratio (VCC = 0.5 V to 2.5 V, VEE = –2.5 V) PSRR 55 65 – dB Output Short Circuit Current VCC = 0.45 V, VEE = –0.45 V, VID = 0.4 V Source Current High Output State Sink Current Low Output State VCC = 1.5 V, VEE = –1.5 V, VID = 0.5 V Source Current High Output State Sink Current Low Output State VCC = 2.5 V, VEE = –2.5 V, VID = 0.5 V Source Current High Output State Sink Current Low Output State ISC Power Supply Current (Per Amplifier, VO = 0 V) VCC = 0.45 V, VEE = –0.45 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C VCC = 1.5 V, VEE = –1.5 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C VCC = 2.5 V, VEE = –2.5 V TA = 25°C TA = 0°C to 70°C TA = –40°C to 105°C ID mA 0.5 – 1.2 –3.0 – –1.5 15 – 29 –40 – –20 40 – 76 –96 – –50 mA – – – 0.51 – – 1.10 1.10 1.10 – – – 0.72 – – 1.40 1.40 1.40 – – – 0.82 – – 1.50 1.50 1.50 AC ELECTRICAL CHARACTERISTICS (VCC = 2.5 V, VEE = –2.5 V, VCM = VO = 0 V, RL to Gnd, TA = 25°C unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Differential Input Resistance (VCM = 0 V) Rin – 1.0 – tera Ω Differential Input Capacitance (VCM = 0 V) Cin – 3.0 – pF en – 100 – nV/√Hz – – 0.5 1.1 1.3 1.4 – – – Am – 6.5 – dB Equivalent Input Noise Voltage (f = 1.0 kHz) Gain Bandwidth Product (f = 100 kHz) VCC = 0.45 V, VEE = –0.45 V VCC = 1.5 V, VEE = –1.5 V VCC = 2.5 V, VEE = –2.5 V GBW Gain Margin (RL = 10 k, CL = 5.0 pf) MHz φm – 60 – Deg Power Bandwidth (VO = 4.0 Vpp, RL = 2.0 k, THD = 1.0%, AV = 1.0) BWP – 80 – kHz Total Harmonic Distortion (VO = 4.0 Vpp, RL = 2.0 k, AV = 1.0) f = 1.0 kHz f = 10 kHz THD – – 0.008 0.08 – – 1.0 1.0 1.6 1.6 6.0 6.0 Phase Margin (RL = 10 k, CL = 5.0 pf) Slew Rate (VS = 2.5 V, VO = –2.0 V to 2.0 V, RL = 2.0 k, AV = 1.0) Positive Slope Negative Slope http://onsemi.com 4 % SR V/µs NCS2001 0 VCC –0.2 VCC = 2.5 V VEE = –2.5 V RL to Gnd TA = 25°C High State Output Sourcing Current –0.4 Vsat, Output Saturation Voltage (V) –0.6 0.6 0.4 Low State Output Sinking Current 0.2 VEE 0 100 1.0 k 10 k 100 k VCC –0.1 VCC = 2.5 V VEE = –2.5 V IL to Gnd TA = 25°C –0.2 –0.3 High State Output Sourcing Current Low State Output Sinking Current 0.3 0.2 0.1 VEE 0 0 1.0 M 2.0 4.0 10 12 IL, Load Current (mA) Figure 2. Split Supply Output Saturation vs. Load Resistance Figure 3. Split Supply Output Saturation vs. Load Current 1000 100 VCC = 2.5 V VEE = –2.5 V RL = 10 k to Gnd TA = 25°C Gain 80 10 VCC = 2.5 V VEE = –2.5 V 1.0 AVOL, Gain (dB) 100 IIB, Input Current (pA) 8.0 6.0 RL, Load Resistance () Phase 0 45 60 90 Phase Margin = 60° 40 135 20 180 0 0 25 50 75 100 0 1.0 125 10 100 1.0 k 10 k 100 k 1.0 M TA, Ambient Temperature (°C) f, Frequency (Hz) Figure 4. Input Bias Current vs. Temperature Figure 5. Gain and Phase vs. Frequency VS = ±2.5 V AV = 1.0 RL = 10 k CL = 10 pF TA = 25°C 50 mV/div 500 mV/div VS = ±2.5 V RL = 10 k CL = 10 pf AV = 1.0 TA = 25°C t, time (500 ns/Div) t, time (1.0 µs/Div) Figure 6. Transient Response Figure 7. Slew Rate http://onsemi.com 5 10 M Φm, Excess Phase (°) Vsat, Output Saturation Voltage (V) 0 NCS2001 80 6 CMR, Common Mode Rejection (dB) VO, Output Voltage (Vpp) VS = ±2.5 V 5 AV = 1.0 RL = 10 k TA = 25°C 4 VS = ±1.5 V 3 2 VS = ±0.5 V 1 0 70 VCC = 2.5 V VEE = –2.5 V TA = 25°C 60 50 40 30 20 10 0 1.0 k 10 k 100 k f, Frequency (Hz) 1.0 M 10 100 Figure 8. Output Voltage vs. Frequency 60 PSR – IISCI, Output Short Circuit Current (mA) PSR, Power Supply Rejection (dB) PSR + VCC = 2.5 V VEE = –2.5 V TA = 25°C 40 20 0 10 100 1.0 k 10 k 100 k 1.0 M Output Pulsed Test at 3% Duty Cycle –40°C 160 25°C 120 85°C 80 40 0 10 M ±0.5 0 f, Frequency (Hz) ±1.0 ±1.5 ±2.0 ±2.5 ±3.0 ±3.5 VS, Supply Voltage (V) Figure 11. Output Short Circuit Sinking Current vs. Supply Voltage 1.2 200 Output Pulsed Test at 3% Duty Cycle TA = 125°C –40°C 1.0 160 ID, Supply Current (mA) IISCI, Output Short Circuit Current (mA) 10 M 200 Figure 10. Power Supply Rejection vs. Frequency 25°C 120 85°C 80 40 0 1.0 M Figure 9. Common Mode Rejection vs. Frequency 100 80 1.0 k 10 k 100 k f, Frequency (Hz) TA = 25°C TA = –55°C 0.8 0.6 0.4 0.2 0 ±0.5 ±1.0 ±1.5 ±2.0 ±2.5 ±3.0 0 ±3.5 ±0.5 0 ±1.0 ±1.5 ±2.0 ±2.5 VS, Supply Voltage (V) VS, Supply Voltage (V) Figure 12. Output Short Circuit Sourcing Current vs. Supply Voltage Figure 13. Supply Current vs. Supply Voltage http://onsemi.com 6 NCS2001 10 THD, Total Harmonic Distortion (%) THD, Total Harmonic Distortion (%) 10 AV = 1000 1.0 0.1 AV = 100 AV = 10 AV = 1.0 VS = ±0.5 V Vout = 0.4 Vpp 0.01 10 100 1.0 k RL = 2.0 k TA = 25°C 10 k VS = ±0.5 V Vout = 0.4 Vpp 100 RL = 10 k TA = 25°C Figure 15. Total Harmonic Distortion vs. Frequency with 1.0 V Supply 10 k 100 k 10 THD, Total Harmonic Distortion (%) THD, Total Harmonic Distortion (%) AV = 1.0 Figure 14. Total Harmonic Distortion vs. Frequency with 1.0 V Supply AV = 100 0.1 AV = 10 VS = ±2.5 V Vout = 4.0 Vpp RL = 2.0 k TA = 25°C 0.01 AV = 1.0 0.001 10 100 1.0 k 10 k 1.0 AV = 1000 0.1 AV = 100 AV = 10 0.01 VS = ±2.5 V Vout = 4.0 Vpp RL = 10 k TA = 25°C AV = 1.0 0.001 10 100 k 100 1.0 k 10 k 100 k f, Frequency (Hz) f, Frequency (Hz) Figure 16. Total Harmonic Distortion vs. Frequency with 5.0 V Supply Figure 17. Total Harmonic Distortion vs. Frequency with 5.0 V Supply GBW, Gain Bandwidth Product (MHz) 2.0 +Slew Rate, VS = ±2.5 V SR, Slew Rate (V/µs) AV = 10 1.0 k f, Frequency (Hz) 1.0 1.5 –Slew Rate, VS = ±2.5 V –Slew Rate, VS = ±0.45 V 0 –50 0.1 AV = 100 f, Frequency (Hz) AV = 1000 0.5 1.0 0.01 10 100 k 10 1.0 AV = 1000 +Slew Rate, VS = ±0.45 V –25 0 25 RL = 10 k CL = 10 pF TA = 25°C 50 75 100 125 2.0 1.5 1.0 VCC = 2.5 V VEE = –2.5 V RL = 10 k CL = 10 pF 0.5 0 –50 –25 0 25 50 75 100 TA, Ambient Temperature (°C) TA, Ambient Temperature (°C) Figure 18. Slew Rate vs. Temperature Figure 19. Gain Bandwidth Product vs. Temperature http://onsemi.com 7 125 NCS2001 180 VS = ±2.5 V 220 RL = 10 k TA = 25°C –40 10 k 100 k 1.0 M 20 20 Gain Margin –25 0 25 50 75 100 Figure 20. Voltage Gain and Phase vs. Frequency Figure 21. Gain and Phase Margin vs. Temperature 80 70 Phase Margin Phase Margin Am, Gain Margin (dB) 50 50 VCC = 2.5 V VEE = –2.5 V RL = 10 k CL = 10 pF TA = 25°C 40 30 20 Gain Margin 0 125 80 60 10 20 60 60 AV = 100 VCC = 2.5 V VEE = –2.5 V RL = 10 k to Gnd TA = 25°C 40 40 Gain Margin 20 20 10 0 10 100 1.0 k 0 100 k 10 k 0 1.0 0 1000 Rt, Differential Source Resistance (Ω) 10 100 CL, Output Load Capacitance (pF) Figure 22. Gain and Phase Margin vs. Differential Source Resistance Figure 23. Gain and Phase Margin vs. Output Load Capacitance 80 8.0 80 6.0 4.0 RL = 10 k TA = 25°C Split Supplies 2.0 0 0 ±0.5 ±1.0 ±1.5 ±2.0 ±2.5 ±3.0 60 60 RL = 10 k CL = 10 pF TA = 25°C 40 Gain Margin 20 0 ±3.5 40 0 ±0.5 ±1.0 ±1.5 ±2.0 20 ±2.5 ±3.0 VS, Supply Voltage (V) VS, Supply Voltage (V) Figure 24. Output Voltage Swing vs. Supply Voltage Figure 25. Gain and Phase Margin vs. Supply Voltage http://onsemi.com 8 0 ±3.5 Φm, Phase Margin (°) Phase Margin Am, Gain Margin (dB) VOUT, Output Volltage (Vpp) 40 TA, Ambient Temperature (°C) 60 30 VCC = 2.5 V VEE = –2.5 V 40 RL = 10 k CL = 10 pF f, Frequency (Hz) 70 40 60 Phase Margin 0 –50 260 100 M 10 M 60 Φm, Phase Margin (°) VS = ±0.5 V 0 80 Φm, Phase Margin (°) 140 20 –20 AV, Gain Margin (dB) 100 Am, Gain Margin (dB) VS = ±0.5 V Φm, Phase Margin (°) AVOL, Gain (dB) 40 80 60 VS = ±2.5 V Φm, Excess Phase (°) 60 NCS2001 80 VIO, Input Offset Voltage (mV) 20 RL = 2.0 k RL = 10 k 60 40 20 TA = 25°C 0 0 ±0.5 ±1.0 ±1.5 ±2.0 VIO, Input Offset Voltage (mV) 10 5 10 5 0 –5 –10 –15 –2.0 –1.0 0 1.0 2.0 3.0 VS, Supply Voltage (V) VCM, Common Mode Input Voltage Range (V) Figure 26. Open Loop Voltage Gain vs. Supply Voltage Figure 27. Input Offset Voltage vs. Common Mode Input Voltage Range VS = 2.5 V 20 15 VS = ±2.5 V RL = ∞ CL = 0 AV = 1.0 TA = 25°C 15 –20 –3.0 ±2.5 VS = ±0.45 V RL = ∞ CL = 0 AV = 1.0 TA = 25°C 0 –5 –10 –15 –20 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 VCM, Common Mode Input Voltage Range (V) AVOL, Open Loop Gain (dB) 100 3.0 2.0 1.0 Vio = 5.0 mV RL = ∞ CL = 0 AV = 1.0 TA = 25°C 0 –1.0 –2.0 –3.0 ±0.35 ±0.5 VCM, Common Mode Input Voltage Range (V) ±1.0 ±1.5 ±2.0 ±2.5 ±3.0 VS, Supply Voltage (V) Figure 29. Common–Mode Input Voltage Range vs. Power Supply Voltage Figure 28. Input Offset Voltage vs. Common Mode Input Voltage Range, VS = 0.45 V http://onsemi.com 9 NCS2001 APPLICATION INFORMATION AND OPERATING DESCRIPTION Cfb GENERAL INFORMATION The NCS2001 is an industry first rail–to–rail input, rail–to–rail output amplifier that features guaranteed sub one volt operation. This unique feature set is achieved with the use of a modified analog CMOS process that allows the implementation of depletion MOSFET devices. The amplifier has a 1.0 MHz gain bandwidth product, 2.2 V/µs slew rate and is operational over a power supply range less than 0.9 V to as high as 7.0 V. Rfb Rin Input Cin Output Cin = Input and printed circuit board capacitance Figure 30. Input Capacitance Pole Cancellation Inputs The input topology chosen for this device series is unconventional when compared to most low voltage operational amplifiers. It consists of an N–channel depletion mode differential transistor pair that drives a folded cascode stage and current mirror. This configuration extends the input common mode voltage range to encompass the VEE and VCC power supply rails, even when powered from a combined total of less than 0.9 volts. Figure 27 and 28 show the input common mode voltage range versus power supply voltage. The differential input stage is laser trimmed in order to minimize offset voltage. The N–channel depletion mode MOSFET input stage exhibits an extremely low input bias current of less than 10 pA. The input bias current versus temperature is shown in Figure 4. Either one or both inputs can be biased as low as VEE minus 300 mV to as high as 7.0 V without causing damage to the device. If the input common mode voltage range is exceeded, the output will not display a phase reversal. If the maximum input positive or negative voltage ratings are to be exceeded, a series resistor must be used to limit the input current to less than 2.0 mA. The ultra low input bias current of the NCS2001 allows the use of extremely high value source and feedback resistor without reducing the amplifier’s gain accuracy. These high value resistors, in conjunction with the device input and printed circuit board parasitic capacitances C in, will add an additional pole to the single pole amplifier shown in Figure 29. If low enough in frequency, this additional pole can reduce the phase margin and significantly increase the output settling time. The effects of Cin, can be canceled by placing a zero into the feedback loop. This is accomplished with the addition of capacitor Cfb. An approximate value for Cfb can be calculated by: Cfb + Output The output stage consists of complimentary P and N channel devices connected to provide rail–to–rail output drive. With a 2.0 k load, the output can swing within 50 mV of either rail. It is also capable of supplying over 75 mA when powered from 5.0 V and 1.0 mA when powered from 0.9 V. When connected as a unity gain follower, the NCS2001 can directly drive capacitive loads in excess of 820 pF at room temperature without oscillating but with significantly reduced phase margin. The unity gain follower configuration exhibits the highest bandwidth and is most prone to oscillations when driving a high value capacitive load. The capacitive load in combination with the amplifier’s output impedance, creates a phase lag that can result in an under–damped pulse response or a continuous oscillation. Figure 32 shows the effect of driving a large capacitive load in a voltage follower type of setup. When driving capacitive loads exceeding 820 pF, it is recommended to place a low value isolation resistor between the output of the op amp and the load, as shown in figure 31. The series resistor isolates the capacitive load from the output and enhances the phase margin. Refer to figure 33. Larger values of R will result in a cleaner output waveform but excessively large values will degrade the large signal rise and fall time and reduce the output amplitude. Depending upon the capacitor characteristics, the isolation resistor value will typically be between 50 to 500 ohms. The output drive capability for resistive and capacitive loads are shown in Figures 2, 3, and 23. Input Rin Cin Rfb + - R Output CL Isolation resistor R = 50 to 500 Figure 31. Capacitance Load Isolation Note that the lowest phase margin is observed at cold temperature and low supply voltage. http://onsemi.com 10 NCS2001 Vin VS = ±0.45 V Vin = 0.8 Vpp R=0 CL = 820 pF AV = 1.0 TA = 25°C Vout Figure 32. Small Signal Transient Response with Large Capacitive Load Vin VS = ±0.45 V Vin = 0.8 Vpp R = 51 CL = 820 pF AV = 1.0 TA = 25°C Vout Figure 33. Small Signal Transient Response with Large Capacitive Load and Isolation Resistor. http://onsemi.com 11 NCS2001 RT 470 k VCC Output Voltage 0 0.9 V CT 1.0 nF Timing Capacitor Voltage - 0.33 VCC fO = 1.5 kHz + The non–inverting input threshold levels are set so that the capacitor voltage oscillates between 1/3 and 2/3 of VCC. This requires the resistors R1a, R1b and R2 to be of equal value. The following formula can be used to approximate the output frequency. R1a 470 k 0.9 V R2 470 k R1b 470 k 0.67 VCC 1 f O 1.39 R TC T Figure 34. 0.9 V Square Wave Oscillator cww D1 1N4148 10 k VCC Output Voltage 0 1.0 M D2 1N4148 10 k Timing Capacitor Voltage 0.67 VCC 0.33 VCC cw Clock–wise, Low Duty Cycle VCC CT 1.0 nF VCC Output Voltage - 0 fO + Timing Capacitor Voltage R1a 470 k 0.67 VCC 0.33 VCC Counter–Clock–wise, High Duty Cycle VCC R1b 470 k R2 470 k The timing capacitor CT will charge through diode D2 and discharge through diode D1, allowing a variable duty cycle. The pulse width of the signal can be programmed by adjusting the value of the trimpot. The capacitor voltage will oscillate between 1/3 and 2/3 of VCC, since all the resistors at the non–inverting input are of equal value. Figure 35. Variable Duty Cycle Pulse Generator http://onsemi.com 12 NCS2001 R1 1.0 M 2.5 V R3 1.0 k + - Cin 10 F ≈ 10,000 µF –2.5 V Ceff. R2 1.0 M R1 C R3 in Figure 36. Positive Capacitance Multiplier Af Cf 400 pF Rf 100 k fL R2 10 k 0.5 V 1 f 200 Hz L 2R C 1 1 + - Vin C1 80 nF fH VO R1 10 k –0.5 V 1 f 4.0 kHz H 2RC f f R A 1 f 11 f R2 Figure 37. 1.0 V Voiceband Filter http://onsemi.com 13 NCS2001 Vsupply VCC Vin + I - V in sink R sense Rsense Figure 38. High Compliance Current Sink Is VL 1.0 V Rsense RL R3 1.0 k R1 1.0 k R4 + - 1.0 k R5 VO 2.4 k 75 Is VO 435 mA 34.7 mV 212 mA 36.9 mV R6 For best performance, use low tolerance resistors. R2 3.3 k Figure 39. High Side Current Sense http://onsemi.com 14 NCS2001 PACKAGE DIMENSIONS THIN SOT–23–5 N SUFFIX PLASTIC PACKAGE CASE 483–01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. D 5 S 4 1 2 B 3 L DIM A B C D G H J K L M S G A J C 0.05 (0.002) H M K MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.00 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0 10 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0 10 0.0985 0.1181 SC70–5 Q SUFFIX CASE 419A–01 ISSUE E A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. V 5 DIM A B C D G H J K N S V 4 –B– S 1 2 3 D 5 PL 0.2 (0.008) M B M N J C H K http://onsemi.com 15 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 0.012 0.016 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 0.30 0.40 NCS2001 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 16 NCS2001/D