MOTOROLA MC33077D

Order this document by MC33077/D
The MC33077 is a precision high quality, high frequency, low noise
monolithic dual operational amplifier employing innovative bipolar design
techniques. Precision matching coupled with a unique analog resistor trim
technique is used to obtain low input offset voltages. Dual–doublet frequency
compensation techniques are used to enhance the gain bandwidth product
of the amplifier. In addition, the MC33077 offers low input noise voltage, low
temperature coefficient of input offset voltage, high slew rate, high AC and
DC open loop voltage gain and low supply current drain. The all NPN
transistor output stage exhibits no deadband cross–over distortion, large
output voltage swing, excellent phase and gain margins, low open loop
output impedance and symmetrical source and sink AC frequency
performance.
The MC33077 is tested over the automotive temperature range and is
available in plastic DIP and SO–8 packages (P and D suffixes).
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DUAL, LOW NOISE
OPERATIONAL AMPLIFIER
SEMICONDUCTOR
TECHNICAL DATA
Low Voltage Noise: 4.4 nV/ ǸHz @ 1.0 kHz
8
1
Low Input Offset Voltage: 0.2 mV
P SUFFIX
PLASTIC PACKAGE
CASE 626
Low TC of Input Offset Voltage: 2.0 µV/°C
High Gain Bandwidth Product: 37 MHz @ 100 kHz
High AC Voltage Gain: 370 @ 100 kHz
High AC Voltage Gain: 1850 @ 20 kHz
Unity Gain Stable: with Capacitance Loads to 500 pF
High Slew Rate: 11 V/µs
8
1
Low Total Harmonic Distortion: 0.007%
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
Large Output Voltage Swing: +14 V to –14.7 V
High DC Open Loop Voltage Gain: 400 k (112 dB)
High Common Mode Rejection: 107 dB
Low Power Supply Drain Current: 3.5 mA
Dual Supply Operation: ±2.5 V to ±18 V
PIN CONNECTIONS
Representative Schematic Diagram (Each Amplifier)
R1
R6
J1
Bias Network
Q1
R8
R11
Output 1 1
Q17
Q8
2
Q19
R9
Inputs 1
Q14
Z1
3
Q21
D6
D4
Q6
Q7
Q9
Pos
Q16
Q4
Q10
R5 C2
D7
R19
Q22
C8
Q5
R2
R4
5
C7
D1
Q1
Inputs 2
+
(Dual, Top View)
R14
Q12
6
R17 R18 Vout
C6
Q2
–
2
VEE 4
R13
Neg
7 Output 2
1
+
Q11
C3
R3
8 VCC
–
Q13
D3
C1
VCC
R16
R7
R10
R12
D2
Q20
D5
R20
ORDERING INFORMATION
Device
MC33077D
R15
VEE
MC33077P
Operating
Temperature Range
TA = – 40° to +85°C
 Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
Package
SO–8
Plastic DIP
Rev 0
1
MC33077
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VS
+36
V
VIDR
(Note 1)
V
Input Voltage Range
VIR
(Note 1)
V
Output Short Circuit Duration (Note 2)
tSC
Indefinite
sec
Maximum Junction Temperature
TJ
+150
°C
Storage Temperature
Tstg
–60 to +150
°C
Maximum Power Dissipation
PD
(Note 2)
mW
Supply Voltage (VCC to VEE)
Input Differential Voltage Range
NOTES: 1. Either or both input voltages should not exceed VCC or VEE (See Applications Information).
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (See power dissipation performance characteristic, Figure 1).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Symbol
Input Offset Voltage (RS = 10 Ω, VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
|VIO|
Average Temperature Coefficient of Input Offset Voltage
RS = 10 Ω, VCM = 0 V, VO = 0 V, TA = –40° to +85°C
∆VIO/∆T
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIB
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIO
Common Mode Input Voltage Range (∆VIO ,= 5.0 mV, VO = 0 V)
VICR
Large Signal Voltage Gain (VO = ±1.0 V, RL = 2.0 kΩ)
TA = +25°C
TA = –40° to +85°C
AVOL
Min
Typ
Max
—
—
0.13
—
1.0
1.5
—
2.0
—
—
—
280
—
1000
1200
—
—
15
—
180
240
±13.5
±14
—
150 k
125 k
400 k
—
—
—
Unit
mV
µV/°C
nA
nA
V
V/V
Output Voltage Swing (VID = ±1.0 V)
RL = 2.0 kΩ
RL = 2.0 kΩ
RL = 10 kΩ
RL = 10 kΩ
VO+
VO –
VO+
VO –
+13.0
—
+13.4
—
+13.6
–14.1
+14.0
–14.7
—
–13.5
—
–14.3
Common Mode Rejection (Vin = ±13 V)
CMR
85
107
—
dB
Power Supply Rejection (Note 3)
VCC/VEE = +15 V/ –15 V to +5.0 V/ –5.0 V
PSR
80
90
—
dB
Output Short Circuit Current (VID = ±1.0 V, Output to Ground)
Source
Sink
ISC
+10
–20
+26
–33
+60
+60
—
—
3.5
—
4.5
4.8
Power Supply Current (VO = 0 V, All Amplifiers)
TA = +25°C
TA = –40° to +85°C
V
mA
ID
mA
NOTE: 3. Measured with VCC and VEE simultaneously varied.
2
MOTOROLA ANALOG IC DEVICE DATA
MC33077
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
SR
8.0
11
—
V/µs
Gain Bandwidth Product (f = 100 kHz)
GBW
25
37
—
MHz
AC Voltage Gain (RL = 2.0 kΩ, VO = 0 V)
f = 100 kHz
f = 20 kHz
AVO
—
—
370
1850
—
—
fU
—
7.5
—
Gain Margin (RL = 2.0 kΩ, CL = 10 pF)
Am
—
10
—
dB
Phase Margin (RL = 2.0 kΩ, CL = 10 pF)
∅m
—
55
—
Degrees
Channel Separation (f = 20 Hz to 20 kHz, RL = 2.0 kΩ, VO = 10 Vpp)
CS
—
–120
—
dB
Power Bandwidth (VO = 27p–p, RL = 2.0 kΩ, THD ≤ 1%)
BWp
—
200
—
kHz
Distortion (RL = 2.0 kΩ)
AV = +1.0, f = 20 Hz to 20 kHz
VO = 3.0 Vrms
AV = 2000, f = 20 kHz
VO = 2.0 Vpp
VO = 10 Vpp
AV = 4000, f = 100 kHz
VO = 2.0 Vpp
VO = 10 Vpp
THD
Open Loop Output Impedance (VO = 0 V, f = fU)
Characteristics
Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 100 pF, AV = +1.0)
Unity Gain Frequency (Open Loop)
V/V
MHz
%
0.007
—
—
—
0.215
0.242
—
—
—
—
0.3.19
0.316
—
—
|ZO|
—
36
—
Ω
Differential Input Resistance (VCM = 0 V)
Rin
—
270
—
kΩ
Differential Input Capacitance (VCM = 0 V)
Cin
—
15
—
pF
Equivalent Input Noise Voltage (RS = 100 Ω)
f = 10 Hz
f = 1.0 kHz
en
—
—
6.7
4.4
—
—
Equivalent Input Noise Current (f = 1.0 kHz)
f = 10 Hz
f = 1.0 kHz
in
—
—
1.3
0.6
—
—
Figure 1. Maximum Power Dissipation
versus Temperature
nV/ √ Hz
pA/ √ Hz
Figure 2. Input Bias Current
versus Supply Voltage
2400
800
I IB, INPUT BIAS CURRENT (nA)
PD(MAX) , MAXIMUM POWER DISSIPATION (mW)
—
2000
1600
MC33077P
1200
800
MC33077D
400
0
–60 –40 –20
VCM = 0 V
TA = 25°C
600
400
200
0
0
20
40
60
80
100 120 140 160 180
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
0
2.5
5.0
7.5
10
12.5
15
17.5
20
VCC, |VEE|, SUPPLY VOLTAGE (V)
3
MC33077
Figure 3. Input Bias Current
versus Temperature
Figure 4. Input Offset Voltage
versus Temperature
V IO , INPUT OFFSET VOLTAGE (mV)
800
1.0
VCC = +15 V
VEE = –15 V
VCM = 0 V
600
400
200
0
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 5. Input Bias Current versus
Common Mode Voltage
I IB , INPUT BIAS CURRENT (nA)
600
500
VCC = +15 V
VEE = –15 V
TA = 25°C
400
300
200
100
0
–15
–10
–5.0
0
5.0
10
15
V ICR , INPUT COMMON MODE VOTAGE RANGE (V)
I IB, INPUT BIAS CURRENT (nA)
1000
0.5
0
–0.5
VCC = +15 V
VEE = –15 V
RS = 10 Ω
VCM = 0 V
AV = +1.0
–1.0
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
VCC 0.0
VCC –0.5
+VCM
VCC –1.0
VCC –1.5
VEE +1.5
VEE +1.0
VEE +0.0
–55
–VCM
–25
0
25°C
VCC = +15 V
VEE = –15 V
125°C
25°C
–55°C
0
0.5
1.0
1.5
2.0
2.5
RL, LOAD RESISTANCE TO GROUND (kΩ)
3.0
|I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA)
V sat , OUTPUT SATURATION VOLTAGE (V)
4
–55°C
VEE 0
50
75
100
125
Figure 8. Output Short Circuit Current
versus Temperature
VCC –2
VEE +2
25
TA, AMBIENT TEMPERATURE (°C)
VCC 0
VEE +4
VCC = +3.0 V to +15 V
VEE = –3.0 V to –15 V
∆ VIO = 5.0 mV
VO = 0 V
Input
Voltage
Range
VEE +0.5
Figure 7. Output Saturation Voltage versus
Load Resistance to Ground
125°C
125
Figure 6. Input Common Mode Voltage Range
versus Temperature
VCM, COMMON MODE VOLTAGE (V)
VCC –4
100
50
40
Sink
VCC = +15 V
VEE = –15 V
VID = ±1.0 V
RL < 100 Ω
30
Source
20
10
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 9. Supply Current
versus Temperature
Figure 10. Common Mode Rejection
versus Frequency
4.0
±15 V
±5.0 V
3.0
2.0
VCM = 0 V
RL = ∞
VO = 0 V
1.0
0
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
120
CMR, COMMON MODE REJECTION (dB)
I CC , SUPPLY CURRENT (mA)
5.0
∆ VCM
100
80
CMR = 20Log
20
0
100
–PSR
60
40
20
GBW, GAIN BANDWIDTH PRODUCT (MHz)
+PSR
80
VCC = +15 V
VEE = –15 V
TA = 25°C
1.0 k
–
ADM
+
VCC
∆ VO
VEE
10 k
100 k
1.0 M
× ADM
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
10 M
48
RL = 10 kΩ
CL = 0 pF
f = 100 kHz
TA = 25°C
44
40
36
32
28
24
0
5
10
15
20
f, FREQUENCY (Hz)
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 13. Gain Bandwidth Product
versus Temperature
Figure 14. Maximum Output Voltage
versus Supply Voltage
20
50
VCC = +15 V
VEE = –15 V
f = 100 kHz
RL = 10 kΩ
CL = 0 pF
46
42
15
38
34
30
26
–55
∆ VO
Figure 12. Gain Bandwidth Product
versus Supply Voltage
∆VO/ADM
∆ VEE
–PSR = 20Log
∆ VCM
VCC = +15 V
VEE = –15 V
VCM = 0 V
∆ VCM = ±1.5 V
TA = 25°C
40
125
VO,OUTPUT VOLTAGE (Vp )
PSR, POWER SUPPLY REJECTION (dB)
100
0
100
GBW, GAIN BANDWIDTH PRODUCT (MHz)
∆VO/ADM
∆ VCC
+PSR = 20Log
∆ VO
60
Figure 11. Power Supply Rejection
versus Frequency
120
–
ADM
+
10
RL = 10 kΩ
TA = 25°C
Vp +
RL = 2.0 kΩ
5.0
0
–5.0
Vp –
–10
RL = 2.0 kΩ
–15
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
100
125
–20
0
RL = 10 kΩ
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
20
5
Figure 15. Output Voltage
versus Frequency
30
VO, OUTPUT VOLTAGE (Vpp )
25
20
15
10
5.0
0
100
VCC = +15 V
VEE = –15 V
RL = 2.0 kΩ
AV =+1.0
THD ≤ 1.0%
TA = 25°C
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
AVOL , OPEN LOOP VOLTAGE GAIN (X1000 V/V)
MC33077
Figure 16. Open Loop Voltage Gain
versus Supply Voltage
1200
RL = 2.0 kΩ
f = 10 Hz
∆ VO = 2/3 (VCC –VEE)
TA = 25°C
1000
800
600
400
200
0
0
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 18. Output Impedance
versus Frequency
80
600
VCC = +15 V
VEE = –15 V
RL = 2.0 kΩ
f = 10 Hz
∆ VO = –10 V to +10 V
550
500
| Z O |, OUTPUT IMPEDANCE ( Ω )
A VOL , OPEN LOOP VOLTAGE GAIN (X1000 V/V)
Figure 17. Open Loop Voltage Gain
versus Temperature
450
400
350
300
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
60
50
40
30
Drive Channel
VCC = +15 V
VEE = –15 V
RL = 2.0 kΩ
∆VOD = 20 Vpp
TA = 25°C
∆VO
Measurement Channel
130
120
110
100
10
6
CS = 20 Log
100
1.0 k
f, FREQUENCY (Hz)
10 k
AV = 1000
10
1.0 k
AV = 100
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
AV = 1.0
10 M
Figure 20. Total Harmonic Distortion
versus Frequency
∆VOD
∆Vin
100 k
THD, TOTAL HARMONIC DISTORTION (%)
CS, CHANNEL SEPARATION (dB)
140
–
+
AV = 10
20
0
100
125
160
∆Vin
VCC = +15 V
VEE = –15 V
VO = 0 V
TA = 25°C
70
Figure 19. Channel Separation
versus Frequency
150
20
1.0
VCC = +15 V VO = 2.0 Vpp
VEE = –15 V TA = 25°C
0.1
AV = +1000
AV = +100
AV = +10
0.01
0.001
10
RA
Vin
100 kΩ
2.0 kΩ
–
+
VO
100
AV = +1.0
1.0 k
f, FREQUENCY (Hz)
10 k
100 k
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 22. Total Harmonic Distortion
versus Output Voltage
1.0
VCC = +15 V
VEE = –15 V
V0 = –10 Vpp
TA = 25°C
0.1
100 kΩ
RA
Vin
–
+
THD, TOTAL HARMONIC DISTORTION (%)
2.0 kΩ
VO
AV = +1000
AV = +100
AV = +10
0.01
AV = +1.0
0.001
10
100
1.0 k
f, FREQUENCY (Hz)
10 k
100 k
1.0
VCC = +15 V
VEE = –15 V
f = 20 kHz
TA = 25°C
AV = +1000
0.5
0.1
–
+
VO
AV = +100
0.01
AV = +10
0.005
AV = +1.0
0.001
0
2.0
4.0
6.0
8.0
VO, OUTPUT VOLTAGE (Vpp)
10
12
Figure 24. Slew Rate versus Temperature
40
Vin = 2/3 (VCC –VEE)
TA = 25°C
12
SR, SLEW RATE (V/ µ s)
SR, SLEW RATE (V/ µ s)
RA
Vin
2.0 kΩ
0.05
Figure 23. Slew Rate versus Supply Voltage
16
8.0
–
∆Vin
4.0
VO
+
2.0 kΩ
100 pF
0
2.5
5.0
7.5
10
12.5
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
17.5
0
–55
Gain
40
80
60
120
20
160
200
–20
–60
10
100
1.0 k
10 k
100 k
1.0 M
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
10 M
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
14
240
100 M
A m , OPEN LOOP GAIN MARGIN (dB)
100
Phase
VO
100 pF
125
Figure 26. Open Loop Gain Margin and Phase
Margin versus Output Load Capacitance
φ , EXCESS PHASE (DEGREES)
140
+
2.0 kΩ
10
20
0
VCC = +15 V
VEE = –15 V
RL = 2.0 kΩ
TA = 25°C
∆Vin
20
Figure 25. Voltage Gain and Phase
versus Frequency
180
–
VCC = +15 V
VEE = –15 V
∆Vin = 20 V
30
0
A VOL , OPEN–LOOP VOLTAGE GAIN (dB)
100 kΩ
0
125°C
–
12
10
Vin
25°C
+
2.0 kΩ
VO
10
CL
20
30
8.0
Phase
–55°C
40
6.0
4.0
2.0
0
1.0
Gain
125°C
–55°C
25°C
VCC = +15 V
VEE = –15 V
VO = 0 V
10
100
CL, OUTPUT LOAD CAPACITANCE (pF)
50
60
φm , PHASE MARGIN (DEGREES)
THD, TOTAL HARMONIC DISTORTION (%)
Figure 21. Total Harmonic Distortion
versus Frequency
70
1000
7
MC33077
Figure 27. Phase Margin versus
Output Voltage
Figure 28. Overshoot versus
Output Load Capacitance
100
60
os, OVERSHOOT (%)
40
VCC = +15 V
VEE = –15 V
TA = 25°C
30
CL = 300 pF
CL = 500 pF
20
–
+
Vin
10
2.0kΩ
–5.0
125°C and 25°C
10
10
5.0
3.0
2.0
1.0
Current
0.5
5.0
Voltage
3.0
2.0
1.0
1.0
10
100
1.0 k
f, FREQUENCY (Hz)
0.3
0.2
10 k
0.1
100 k
i n ,INPUT REFERRED NOISE CURRENT (pA)
30
20
–55°C
100
1000
1000
VCC = +15 V
f = 1.0 kHz
VEE = –15 V
TA = 25°C
Vn (total) =
(inRs)2
en2
Ǹ
)
) 4KTRS
100
10
1.0
10
100
1.0 k
10 k
100 k
RS, SOURCE RESISTANCE (Ω)
1.0 M
Figure 32. Inverting Amplifer Slew Rate
12
10
Vin
8.0
R
1
10
–
+
20
VO
30
R2
Phase
6.0
40
VCC = +15 V
VEE = –15 V
RT = R1 + R2
VO = 0 V
TA = 25°C
4.0
2.0
0
1.0
10
100
1.0 k
RT, DIFFERENTIAL SOURCE RESISTANCE (Ω)
50
60
70
10 k
VO , OUTPUT VOLTAGE (5.0 V/DIV)
Gain
φ m ,PHASE MARGIN (DEGREES)
0
14
Am , GAIN MARGIN (dB)
10
Figure 30. Total Input Referred Noise Voltage
versus Source Resistant
Figure 31. Phase Margin and Gain Margin
versus Differential Source Resistance
8
1
CL, OUTPUT LOAD CAPACITANCE (pF)
10
50
100 pF
20
VO
Figure 29. Input Referred Noise Voltage
and Current versus Frequency
VCC = +15 V
VEE = –15 V
TA = 25°C
+
2.0 kΩ
40
CL
0
5.0
VO, OUTPUT VOLTAGE (V)
100
∆Vin
VO
60
0
0
–10
e n , INPUT REFERRED NOISE VOLTAGE ( nV/ √ Hz )
80
CL = 100 pF
50
VCC = +15 V
VEE = –15 V
∆Vin = 100 mV
–
CL = 0 pF
VV n , TOTAL REFERRED NOISE VOLTAGE (nV/ √ Hz )
φ m , PHASE MARGIN (DEGREES)
70
VCC = +15 V
VEE = –15 V
AV = –1.0
RL = 2.0 kΩ
CL = 100 pF
TA = 25°C
t, TIME (2.0 µs/DIV)
MOTOROLA ANALOG IC DEVICE DATA
MC33077
Figure 34. Noninverting Amplifier Overshoot
VO , OUTPUT VOLTAGE (5.0 V/DIV)
VO , OUTPUT VOLTAGE (5.0 V/DIV)
Figure 33. Noninverting Amplifier Slew Rate
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 2.0 kΩ
CL = 100 pF
TA = 25°C
CL = 100 pF
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 2.0 kΩ
TA = 25°C
t, TIME (2.0 µs/DIV)
CL = 0 pF
t, TIME (200 ns/DIV)
e n , INPUT NOISE VOLTAGE (100nV/DIV)
Figure 35. Low Frequency Noise Voltage
versus Time
VCC = +15 V
VEE = –15 V
BW = 0.1 Hz to 10 Hz
TA = 25°C
See Noise Circuit
(Figure 36)
t, TIME (1.0 sec/DIV)
MOTOROLA ANALOG IC DEVICE DATA
9
MC33077
APPLICATIONS INFORMATION
The MC33077 is designed primarily for its low noise, low
offset voltage, high gain bandwidth product and large output
swing characteristics. Its outstanding high frequency
gain/phase performance make it a very attractive amplifier for
high quality preamps, instrumentation amps, active filters
and other applications requiring precision quality
characteristics.
The MC33077 utilizes high frequency lateral PNP input
transistors in a low noise bipolar differential stage driving a
compensated Miller integration amplifier. Dual–doublet
frequency compensation techniques are used to enhance the
gain bandwidth product. The output stage uses an all NPN
transistor design which provides greater output voltage swing
and improved frequency performance over more
conventional stages by using both PNP and NPN transistors
(Class AB). This combination produces an amplifier with
superior characteristics.
Through precision component matching and innovative
current mirror design, a lower than normal temperature
coefficient of input offset voltage (2.0 µV/°C as opposed to 10
µV/°C), as well as low input offset voltage, is accomplished.
The minimum common mode input range is from 1.5 V
below the positive rail (VCC) to 1.5 V above the negative rail
(VEE). The inputs will typically common mode to within 1.0 V
of both negative and positive rails though degradation in
offset voltage and gain will be experienced as the common
mode voltage nears either supply rail. In practice, though not
recommended, the input voltage may exceed VCC by
approximately 30 V and decrease below the VEE by
approximately 0.6 V without causing permanent damage to
the device. If the input voltage on either or both inputs is less
than approximately 0.6 V, excessive current may flow, if not
limited, causing permanent damage to the device.
The amplifier will not latch with input source currents up to
20 mA, though in practice, source currents should be limited
to 5.0 mA to avoid any parametric damage to the device. If
both inputs exceed VCC, the output will be in the high state
and phase reversal may occur. No phase reversal will occur
if the voltage on one input is within the common mode range
and the voltage on the other input exceeds VCC. Phase
reversal may occur if the input voltage on either or both inputs
is less than 1.0 V above the negative rail. Phase reversal will
be experienced if the voltage on either or both inputs is less
than VEE.
Through the use of dual–doublet frequency compensation
techniques, the gain bandwidth product has been greatly
enhanced over other amplifiers using the conventional single
pole compensation. The phase and gain error of the amplifier
remains low to higher frequencies for fixed amplifier gain
configurations.
10
With the all NPN output stage, there is minimal swing loss
to the supply rails, producing superior output swing, no
crossover distortion and improved output phase symmetry
with output voltage excursions (output phase symmetry
being the amplifiers ability to maintain a constant phase
relation independent of its output voltage swing). Output
phase symmetry degradation in the more conventional PNP
and NPN transistor output stage was primarily due to the
inherent cut–off frequency mismatch of the PNP and NPN
transistors used (typically 10 MHz and 300 MHz,
respectively), causing considerable phase change to occur
as the output voltage changes. By eliminating the PNP in the
output, such phase change has been avoided and a very
significant improvement in output phase symmetry as well as
output swing has been accomplished.
The output swing improvement is most noticeable when
operation is with lower supply voltages (typically 30% with
± 5.0 V supplies). With a 10 k load, the output of the amplifier
can typically swing to within 1.0 V of the positive rail (VCC),
and to within 0.3 V of the negative rail (VEE), producing a 28.7
Vpp signal from ±15 V supplies. Output voltage swing can be
further improved by using an output pull–up resistor
referenced to the VCC. Where output signals are referenced
to the positive supply rail, the pull–up resistor will pull the
output to VCC during the positive swing, and during the
negative swing, the NPN output transistor collector will pull
the output very near VEE. This configuration will produce the
maximum attainable output signal from given supply
voltages. The value of load resistance used should be much
less than any feedback resistance to avoid excess loading
and allow easy pull–up of the output.
Output impedance of the amplifier is typically less than
50 Ω at frequencies less than the unity gain crossover
frequency (see Figure 18). The amplifier is unity gain stable
with output capacitance loads up to 500 pF at full output
swing over the –55° to +125°C temperature range. Output
phase symmetry is excellent with typically 4°C total phase
change over a 20 V output excursion at 25°C with a 2.0 kΩ
and 100 pF load. With a 2.0 kΩ resistive load and no
capacitance loading, the total phase change is approximately
one degree for the same 20 V output excursion. With a
2.0 kΩ and 500 pF load at 125°C, the total phase change is
typically only 10°C for a 20 V output excursion (see Figure
27).
As with all amplifiers, care should be exercised to insure
that one does not create a pole at the input of the amplifier
which is near the closed loop corner frequency. This
becomes a greater concern when using high frequency
amplifiers since it is very easy to create such a pole with
relatively small values of resistance on the inputs. If this does
MOTOROLA ANALOG IC DEVICE DATA
MC33077
occur, the amplifier’s phase will degrade severely causing the
amplifier to become unstable. Effective source resistances,
acting in conjunction with the input capacitance of the
amplifier, should be kept to a minimum to avoid creating such
a pole at the input (see Figure 31). There is minimal effect on
stability where the created input pole is much greater than the
closed loop corner frequency. Where amplifier stability is
affected as a result of a negative feedback resistor in
conjunction with the amplifier’s input capacitance, creating a
pole near the closed loop corner frequency, lead capacitor
compensation techniques (lead capacitor in parallel with the
feedback resistor) can be employed to improve stability. The
feedback resistor and lead capacitor RC time constant
should be larger than that of the uncompensated input pole
frequency. Having a high resistance connected to the
noninverting input of the amplifier can create a like instability
problem. Compensation for this condition can be
accomplished by adding a lead capacitor in parallel with the
noninverting input resistor of such a value as to make the RC
time constant larger than the RC time constant of the
uncompensated input resistor acting in conjunction with the
amplifiers input capacitance.
For optimum frequency performance and stability, careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input output coupling. In order
to reduce the input capacitance, the body of resistors
connected to the input pins should be physically close to the
input pins. This not only minimizes the input pole creation for
optimum frequency response, but also minimizes extraneous
signal “pickup” at this node. Power supplies should be
decoupled with adequate capacitance as close as possible to
the device supply pin.
In addition to amplifier stability considerations, input
source resistance values should be low to take full advantage
of the low noise characteristics of the amplifier. Thermal
noise (Johnson Noise) of a resistor is generated by
thermally–charged carriers randomly moving within the
resistor creating a voltage. The rms thermal noise voltage in
a resistor can be calculated from:
Enr = / 4k TR × BW
where:
k = Boltzmann’s Constant (1.38 × 10–23 joules/k)
T = Kelvin temperature
R = Resistance in ohms
BW = Upper and lower frequency limit in Hertz.
By way of reference, a 1.0 kΩ resistor at 25°C will produce
a 4.0 nV/ √ Hz of rms noise voltage. If this resistor is
connected to the input of the amplifier, the noise voltage will
be gained–up in accordance to the amplifier’s gain
configuration. For this reason, the selection of input source
resistance for low noise circuit applications warrants serious
consideration. The total noise of the amplifier, as referred to
its inputs, is typically only 4.4 nV/ √ Hz at 1.0 kHz.
The output of any one amplifier is current limited and thus
protected from a direct short to ground, However, under such
conditions, it is important not to allow the amplifier to exceed
the maximum junction temperature rating. Typically for ±15 V
supplies, any one output can be shorted continuously to
ground without exceeding the temperature rating.
Figure 36. Voltage Noise Test Circuit
(0.1 Hz to 10 Hzp–p)
0.1 µF
10 Ω
100 kΩ
–
D.U.T.
+
2.0 kΩ
+
1/2
4.7 µF
4.3 kΩ
Scope
×1
Rin = 1.0 MΩ
MC33077
–
100 kΩ
Voltage Gain = 50,000
22 µF
2.2 µF
110 kΩ
24.3 kΩ
0.1 µF
Note: All capacitors are non–polarized.
MOTOROLA ANALOG IC DEVICE DATA
11
MC33077
OUTLINE DIMENSIONS
8
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
5
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–B–
1
4
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
–A–
NOTE 2
L
C
J
–T–
N
SEATING
PLANE
D
M
K
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
–––
10_
0.030
0.040
G
H
0.13 (0.005)
M
T A
M
B
M
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
D
A
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
5
0.25
H
E
M
B
M
1
4
B
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
–––
10_
0.76
1.01
e
h
X 45 _
A
C
q
SEATING
PLANE
0.10
A1
L
B
0.25
M
C B
S
A
S
DIM
A
A1
B
C
D
E
e
H
h
L
q
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.18
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
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12
◊
*MC33077/D*
MOTOROLA ANALOG IC DEVICE
DATA
MC33077/D