AD OP250

a
CMOS Single-Supply Rail-to-Rail
Input/Output Operational Amplifiers
OP250/OP450
FEATURES
Single-Supply Operation: 2.7 V to 6 V
High Output Current: 6100 mA
Low Supply Current: 800 mA/Amp
Wide Bandwidth: 1 MHz
Slew Rate: 2.2 V/ms
No Phase Reversal
Low Input Currents
Unity Gain Stable
APPLICATIONS
Battery Powered Instrumentation
Medical
Remote Sensors
ASIC Input or Output Amplifier
Automotive
PIN CONFIGURATIONS
8-Lead Narrow Body SO
(SO-8)
OUT A
1
–IN A
2
+IN A
3 (Not to Scale) 6
–IN B
4
+IN B
V–
OP250
8
V+
7
OUT B
5
8-Lead TSSOP
(RU-8)
1
OUT A
–IN A
+IN A
V–
8
V+
OUT B
–IN B
+IN B
OP250
4
5
GENERAL DESCRIPTION
The OP250 and OP450 are dual and quad CMOS single-supply,
amplifiers featuring rail-to-rail inputs and outputs. Both are guaranteed to operate from a +2.7 V to +5 V single supply.
These amplifiers have very low input bias currents. Outputs are
capable of driving 100 mA loads and are stable with capacitive
loads. Supply current is less than 1 mA per amplifier.
Applications for these amplifiers include portable medical
equipment, safety and security, and interface to transducers
with high output impedance.
The ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and maintain high signal-to-noise ratios.
The OP250 and OP450 are specified over the extended industrial (–40°C to +125°C) temperature range. The OP250, dual,
is available in 8-lead TSSOP and SO surface mount packages.
The OP450, quad, is available in 14-lead thin shrink small outline (TSSOP) and narrow 14-lead SO packages.
14-Lead Narrow Body SO
(N-14)
OUT A
1
14
OUT D
–IN A
2
13
–IN D
+IN A
3
12
+IN D
OP450
V+
4
11
V–
+IN B
5
10
+IN C
–IN B
6
9
–IN C
OUT B
7
8
OUT C
(Not to Scale)
14-Lead TSSOP
(RU-14)
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
14
AD8532
OP450
7
8
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997
OP250/OP450–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (V = 13.0 V, T = 1258C, V
S
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
A
CM
= 1.5 V unless otherwise noted)
Conditions
Min
Typ
–40°C < TA < +125°C
Input Bias Current
IB
2
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Offset Current
IOS
0.5
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
Offset Current Drift
AVO
∆VOS/∆T
∆IB/∆T
∆IOS/∆T
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
Open Loop Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
VOH
VOL
IOUT
ZOUT
PSRR
ISY
VCM = 0 V to 3 V
–40°C < TA < +125°C
RL = 2 kΩ , VO = 0.3 V to 2.7 V
IL = 100 µA
IL = 10 mA
–40°C to +125°C
IL = 100 µA
IL = 10 mA
–40°C to +125°C
VS = 2.7 V to 6 V
–40°C < TA < +125°C
VO = 0 V
–40°C < TA < +125°C
SR
tS
GBP
Øo
CS
RL = 10 kΩ
To 0.01%
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
en p–p
en
in
Units
8
20
40
60
500
25
60
3
mV
mV
pA
pA
pA
pA
pA
V
dB
dB
V/mV
µV/°C
pA/°C
pA/°C
55
800
10
1.8
0.07
2.85
2.8
2.99
2.94
1
55
100
125
100
180
f = 1 MHz, AV = 1
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Channel Separation
Current Noise Density
0
40
35
Max
60
55
80
700
1,000
1,250
V
V
V
mV
mV
mV
mA
Ω
dB
dB
µA
µA
f = 1 kHz, RL = 10 kΩ
1.9
4
0.95
46
100
V/µs
µs
MHz
Degrees
dB
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
10
45
30
0.05
µV p–p
nV/√Hz
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–2–
REV. 0
OP250/OP450
ELECTRICAL CHARACTERISTICS
(VS = 15.0 V, TA = 1258C, VCM =2.5 V unless otherwise noted)
Parameter
Symbol
INPUT CHARACTERISTICS
Offset Voltage
VOS
Conditions
Min
Typ
Max
Units
2
7.5
20
40
60
500
25
60
5
mV
mV
pA
pA
pA
pA
pA
V
dB
dB
V/mV
µV/°C
pA/°C
pA/°C
–40°C < TA < +125°C
Input Bias Current
IB
2
–40°C < TA < +85°C
–40°C < TA < +125°C
Input Offset Current
IOS
0.5
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
Offset Current Drift
AVO
∆VOS/∆T
∆IB/∆T
∆IOS/∆T
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
Open Loop Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
VOH
VOL
IOUT
ZOUT
PSRR
ISY
VCM = 0 V to 5 V
–40°C < TA < +125°C
RL = 2 kΩ , Vo = 0.3 V to 4.7 V
–40°C < TA < +125°C
IL = 100 µA
IL = 10 mA
–40°C to +125°C
IL = 100 µA
IL = 10 mA
–40°C to +125°C
VS = 2.7 V to 6 V
–40°C < TA < +125°C
VO = 0 V
–40°C < TA < +125°C
SR
BWP
tS
GBP
Øo
CS
RL = 10 kΩ
1% Distortion
To 0.01%
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
en p–p
en
in
4.9
4.99
4.94
1
40
± 100
200
60
55
100
125
80
800
750
1,250
1,750
V
V
mV
V
mV
mV
mA
Ω
dB
dB
µA
µA
f = 1 kHz, RL = 10 kΩ
2.2
100
3
1
48
100
V/µs
kHz
µs
MHz
Degrees
dB
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
10
45
30
0.05
µV p–p
nV/√Hz
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
REV. 0
60
1,000
10
1.8
0.07
f =1 MHz, AV = 1
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Settling Time
Gain Bandwidth Product
Phase Margin
Channel Separation
Current Noise Density
0
45
40
–3–
OP250/OP450
ABSOLUTE MAXIMUM RATINGS 1, 2
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . ± 6 V
Output Short-Circuit
Duration to GND . . . . . . . . . . . . . Observe Derating Curves
ESD Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V
Storage Temperature Range
S, RU Package . . . . . . . . . . . . . . . . . . . . . 265°C to +150°C
Operating Temperature Range
OP250G/OP450G . . . . . . . . . . . . . . . . . . 240°C to +125°C
Junction Temperature Range
S, RU Package . . . . . . . . . . . . . . . . . . . . . 265°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
NOTES
1
Absolute maximum ratings apply at +25°C, unless otherwise noted.
2
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Package Type
uJA*
uJC
Units
8-Lead SOIC (S)
8-Lead TSSOP (RU)
14-Lead SOIC (N)
14-Lead TSSOP (RU)
158
240
120
180
43
43
36
35
°C/W
°C/W
°C/W
°C/W
*θJA is specified for the worst case conditions, i.e., θJA specified for device soldered
in circuit board for surface mount packages.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Options
OP250GS
OP250GRU
OP450GS
OP450GRU
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
8-Lead SOIC
8-Lead TSSOP
14-Lead SOIC
14-Lead TSSOP
SO-8
RU-8
N-14
RU-14
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP250/OP450 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. 0
Typical Performance Characteristics–OP250/OP450
0.9
10k
TA = +25 C
SUPPLY CURRENT / AMPLIFIER – mA
VS = +2.7V
TA = +25 C
OUTPUT VOLTAGE – mV
1k
SOURCE
100
SINK
10
1
0.1
0.001
0.1
1
LOAD CURRENT – mA
0.01
10
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.75
100
Figure 1. Output Voltage to Supply Rail vs. Load Current
1
1.25
1.5
1.75
2
2.25
SUPPLY VOLTAGE – V
VS = +5V
VCM = +2.5V
100
INPUT OFFSET VOLTAGE – mV
OUTPUT VOLTAGE – mV
3
1
VS = +5V
TA = +25 C
SOURCE
SINK
10
1
0.1
0.001
0.1
1
LOAD CURRENT – mA
0.01
10
0.5
0
–0.5
–1
–55
100
Figure 2. Output Voltage to Supply Rail vs. Load Current
–35
–15
–5
25
45
65
85
TEMPERATURE – C
105
125
145
Figure 5. Input Offset Voltage vs. Temperature
0.85
400
VS = +5V, +3V
VCM = VS/2
0.8
INPUT BIAS CURRENT – pA
SUPPLY CURRENT / AMPLIFIER – mA
2.75
Figure 4. Supply Current per Amplifier vs. Supply Voltage
1k
VS = +5V
0.75
0.7
300
200
100
VS = +3V
0.65
–55
–35
–15
–5
25
45
65
85
TEMPERATURE – C
105
125
0
–55
145
Figure 3. Supply Current per Amplifier vs. Temperature
REV. 0
2.5
–35
–15
–5
25
45
65
85
TEMPERATURE – C
105
125
145
Figure 6. Input Bias Current vs. Temperature
–5–
OP250/OP450–Typical Performance Characteristics
80
5
60
2
40
–90
20
–135
0
–180
–20
–225
–40
–270
–60
–315
PHASE SHIFT – DEGREES
3
1
0
–55
–35
–15
–5
25
45
65
85
TEMPERATURE – C
105
–80
1k
145
125
10k
Figure 7. Input Offset Current vs. Temperature
100k
1M
FREQUENCY – Hz
10M
100M
–360
Figure 10. Open-Loop Gain and Phase
2
5
VS = +5V, +3V
TA = +25 C
4
OUTPUT SWING – VP–P
INPUT BIAS CURRENT – pA
–45
4
GAIN – dB
INPUT OFFSET CURRENT – pA
VS = +5V, +3V
VCM = VS/2
0
VS = +5V
RL = NO LOAD
TA = +25 C
1
0
VS = +2.7V
RL = 2 k
VIN = 2.5 VP–P
TA = +25 C
3
2
1
0
1
2
3
COMMON-MODE VOLTAGE – V
0
1
5
4
Figure 8. Input Bias Current vs. Common-Mode Voltage
80
100
FREQUENCY – Hz
4
–90
20
–135
0
–180
–20
–225
–40
–270
–60
–315
10k
VS = +5.0V
RL = 2 k
VIN = 4.9 VP–P
TA = +25 C
–45
40
1k
5
PHASE SHIFT – DEGREES
GAIN – dB
60
0
VS = +2.7V
RL = NO LOAD
TA = +25 C
10
Figure 11. Closed-Loop Output Voltage Swing vs. Frequency
OUTPUT SWING – VP–P
–1
3
2
1
–80
1k
10k
100k
1M
FREQUENCY – Hz
10M
100M
Figure 9. Open-Loop Gain and Phase
–360
0
1
10
100
FREQUENCY – Hz
1k
10k
Figure 12. Closed-Loop Output Voltage Swing vs. Frequency
–6–
REV. 0
OP250/OP450
350
100
VS = +5V
RL = NO LOAD
TA = +25 C
POWER SUPPLY REJECTION RATIO – dB
400
AV = +1
300
IMPEDANCE –
250
200
AV = +10
150
100
50
0
1k
10k
100k
1M
FREQUENCY – Hz
10M
60
+PSRR
40
–PSRR
20
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 16. Power Supply Rejection vs. Frequency
70
80
VS = +5V
TA = +25 C
SMALL SIGNAL OVERSHOOT – %
COMMON-MODE REJECTION – dB
80
0
100
100M
Figure 13. Closed-Loop Output Impedance vs. Frequency
70
VS = +5V
TA = +25 C
60
50
40
30
20
10
0
60
VS = +2.7V
RL = 2 k
TA = +25 C
–OS
50
40
30
+OS
20
10
–10
–20
1
10
100
FREQUENCY – Hz
1k
0
10
10k
70
VS = +2.7V
TA = +25 C
80
SMALL SIGNAL OVERSHOOT – %
POWER SUPPLY REJECTION RATIO – dB
100
60
+PSRR
40
–PSRR
20
0
60
VS = +5.0V
RL = 2 k
TA = +25 C
50
–OS
40
30
+OS
20
10
1k
10k
100k
FREQUENCY – Hz
1M
0
10
10M
100
CAPACITANCE – pF
1k
Figure 18. Small Signal Overshoot vs. Load Capacitance
Figure 15. Power Supply Rejection vs. Frequency
REV. 0
1k
Figure 17. Small Signal Overshoot vs. Load Capacitance
Figure 14. Common-Mode Rejection vs. Frequency
–20
100
100
CAPACITANCE – pF
–7–
OP250/OP450–Typical Performance Characteristics
VS = 2.5V
AV = 1
RL = 2k
TA = 25 C
VS = 1.35V
VIN = 50mV
AV = 1
RL = 2k
CL = 100pF
TA = 25 C
2µs
2µs
25mV
1V
Figure 22. Large Signal Transient Response
Figre 19. Small Signal Transient Response
VS = 2.5V
VIN = 50mV
AV = 1
RL = 2k
CL = 100pF
TA = 25 C
2µs
50µs
25mV
1V
Figure 23. No Phase Reversal
Figure 20. Small Signal Transient Response
1
2µs
CURRENT NOISE DENSITY – pA/
VS = 1.35V
AV = 1
RL = 2k
TA = 25 C
500mV
0.1
0.01
10
Figure 21. Large Signal Transient Response
100
1k
FREQUENCY – Hz
10k
100k
Figure 24. Current Noise Density vs. Frequency
–8–
REV. 0
OP250/OP450
VS = 5V
FREQUENCY = 10kHz
TA = 25 C
30nV/
VS = 5V
FREQUENCY = 1kHz
TA = 25 C
200nV
45nV/
Figure 25. Voltage Noise Density vs. Frequency
REV. 0
100nV
Figure 26. Voltage Noise Density vs. Frequency
–9–
OP250/OP450
THEORY OF OPERATION
Output Phase Reversal
The OPx50 family of amplifiers are CMOS rail-to-rail input and
output single supply amplifiers designed for low cost and high
output current drive. These features make the OPx50 op amps
ideal for multimedia and telecom applications.
The OPx50 is immune to output voltage phase reversal with an
input voltage within the supply voltages of the device. However,
if either of the device’s inputs exceeds 0.6 V outside of the supply rails, the output could exhibit phase reversal. This is due to
the ESD protection diodes becoming forward biased, thus causing the polarity of the input terminals of the device to switch.
Figure 27 shows the simplified schematic for an OPx50 amplifier. Two input differential pairs consisting of an n-channel pair
(M1–M2) and a p-channel pair (M3–M4) provide a rail-to-rail
input common-mode range. The outputs of the input differential pairs are combined in a compound folded-cascode stage,
which drives the input to a second differential pair gain stage.
The outputs of the second gain stage provide the gate voltage
drive to the rail-to-rail output stage.
The technique recommended in the Input Overvoltage Protection section should be applied in applications where the possibility of input voltages exceeding the supply voltages exists.
Output Short Circuit Protection
To achieve high quality rail-to-rail performance, the outputs of
the OPx50 family are not short-circuit protected. Although
these amplifiers are designed to sink or source as much as
250 mA of output current, shorting the output directly to
ground could damage or destroy the device when excessive voltages or currents are applied. If to protect the output stage, the
maximum output current should be limited to ± 250 mA.
The rail-to-rail output stage consists of M15 and M16, which
are configured in a complementary common-source configuration. As with any rail-to-rail output amplifier, the gain of the
output stage, and thus the open loop gain of the amplifier, is dependent on the load resistance. Also, the maximum output voltage swing is directly proportional to the load current. The
difference between the maximum output voltage to the supply
rails, known as the dropout voltage, is determined by the
OPx50’s output transistors’ on-channel resistance. The output
dropout voltage is given in Figures 1 and 2.
By placing a resistor in series with the output of the amplifier as
shown in Figure 28, the output current can be limited. The
minimum value for RX can be found from Equation 2.
RX ≥
Input Voltage Protection
Although not shown on the simplified schematic, there are ESD
protection diodes connected from each input to each power supply
rail. These diodes are normally reversed biased, but will turn on if
either input voltage exceeds either supply rail by more than 0.6 V.
Should this condition occur the input current should be limited to
less than ±5 mA. This can be done by placing a resistor in series
with the input. The minimum resistor value should be:
RIN ≥
VIN , MAX
VSY
250 mA
(2)
For a +5 V single supply application, RX should be at least
20 Ω. Because RX is inside the feedback loop, VOUT is not affected. The trade-off in using RX is a slight reduction in output
voltage swing under heavy output current loads. RX will also
increase the effective output impedance of the amplifier to
RO + RX, where RO is the output impedance of the device.
(1)
5 mA
VCC
BIAS
M3
–VIN
M1
M4
+VIN
M5
M2
VOUT
BIAS
M6
BIAS
VEE
Figure 27. OPx50 Simplified Schematic
–10–
REV. 0
OP250/OP450
+5V
RX
20
VIN
OP250
VOUT
Figure 28. Output Short-Circuit Protection
Power Dissipation
Although the OPx50 family of amplifiers are able to provide
load currents of up to 250 mA, proper attention should be given
to not exceed the maximum junction temperature for the device.
The equation for finding the junction temperature is given as:
500mV
TJ = PDISS × θ JA + TA
Where
1µs
(3)
Figure 30. Saturation Recovery from the Positive Rail
TJ = OPx50 junction temperature
PDISS = OPx50 power dissipation
θJA = OPx50 junction-to-ambient thermal resistance of
the package; and
TA = The ambient temperature of the circuit
In any application, the absolute maximum junction temperature
must be limited to +150°C. If this junction temperature is exceeded, the device could suffer premature failure. If the output
voltage and output current are in phase, for example, with a
purely resistive load, the power dissipated by the OPx50 can be
found as:
(
PDISS = I LOAD × VSY − VOUT
)
(4)
500mV
ILOAD = OPx50 output load current
VSY = OPx50 supply voltage; and
VOUT = The output voltage
By calculating the power dissipation of the device and using the
thermal resistance value for a given package type, the maximum
allowable ambient temperature for an application can be found
using Equation 3.
Overdrive Recovery
The overdrive, or overload, recovery time of an amplifier is the
time required for the output voltage to return to a rated output
voltage from a saturated condition. This recovery time can be
important in applications where the amplifier must recover
quickly after a large transient event. The circuit in Figure 29
was used to evaluate the recovery time for the OPx50. Figures
30 and 31 show the overload recovery of the OP250 from the
positive and negative rails. It takes approximately 0.5 ms for the
amplifier to recover from output overload.
VIN
1
2
OP250
1VP–P
Capacitive Loading
The OPx50 family of amplifiers is well suited to driving capacitive loads. The device will remain stable at unity gain even under heavy capacitive load conditions. However, a capacitive load
does not come without a penalty in bandwidth. Figure 32 shows
a graph of the OPx50 unity-gain bandwidth under various capacitive loads.
1.0
VS = 2.5V
RL = 10k
TA = +25 C
0.8
VOUT
10kV
1kV
1µs
Figure 31. Saturation Recovery from the Negative Rail
BANDWIDTH – MHz
Where
0.6
0.4
0.2
9kV
0
Figure 29. Overload Recovery Time Test Circuit
0
1
10
100
CAPACITIVE LOAD – nF
1k
Figure 32. Unity-Gain Bandwidth vs. Capacitive Load
As with any amplifier, an increase in capacitive load will also result in an increase in overshoot and ringing. To improve the
output response, a series R-C network, known as a snubber, can
REV. 0
–11–
OP250/OP450
be connected from the output to ground in parallel with the capacitive load as shown in Figure 33. The proper snubber network on the output can significantly reduce output overshoot,
although it will not increase the bandwidth. Table I shows some
snubber network values for a given capacitive load. In practice,
these values are best determined empirically based on the exact
capacitive load for the application.
+5V
VOUT
OP250
RS
5
VIN
100mV p-p
For more information on methods to drive a capacitive load with
an op amp, please refer to the Ask the Applications Engineer article in Analog Dialogue, Vol. 31, Number 2, 1997.
Single Supply Differential Line Driver
Figure 36 shows a single supply differential line driver circuit
that can drive a 600 Ω load with less than 0.1% distortion. The
design uses an OP450 to mimic the performance of a fully balanced transformer based solution. However, this design occupies
much less board space while maintaining low distortion and can
operate down to dc. Like the transformer based design, either
output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1.
CL
47nF
CS
1 F
R3
10k
R5
50
2
Figure 33. Schematic for Using a Snubber Network
A2
3
R2
10k
Table I. Snubber Network for Large Capacitive Loads
1
C3
47 F
VO1
R6
10k
R7
10k
+5V
Load Capacitance (CL)
Snubber Network (RS, CS)
1 nF
10 nF
100 nF
60 Ω, 30 nF
20 Ω, 1 µF
3 Ω, 10 µF
+12V
+5V
C1
22 F
VIN
2
3
6
1
A1
R1
10k
Figure 34 shows the output of an OP250 in a unity gain configuration with a 1 nF capacitive load. Figure 35 shows the improvement in the output response with the snubber network added.
A1, A2 = 1/2 OP250
GAIN = R3
R2
R10
10k
7
R11
10k
A1
R9
100k
5
RL
600
C2
1 F
R12
10k
6
SET: R7, R10, R11 = R2
R8
100k
5
A2
7
R13
10k
R14
50
C4
47µF
VO2
SET: R6, R12, R13 = R3
VIN = 100mVp-p @ 100kHz
CL = 1nF
RL = 10k
Figure 36. A Low Noise, Single Supply Differential Line Driver
R8 and R9 set up the common mode output voltage equal to
half of the supply voltage. C1 is used to couple the input signal
and can be omitted if the input’s dc voltage is equal to half of
the supply voltage.
The circuit can also be configured to provide additional gain if
desired. The gain of the circuit is:
50mV
Figure 34. Output of OP250 without Snubber Network
CL = 1nF
RL = 10k
VIN = 100mVp-p @ 100kHz
50mV
AV =
2µs
VOUT R3
=
VIN
R2
(5)
Where: VOUT = VO1 – VO2,
R2 = R7 = R10 = R11 and,
R3 = R6 = R12 = R13
Multimedia Headphone Amplifier
Because of its large output drive, the OP250 makes an excellent
headphone amplifier, as illustrated in Figure 37. Its low supply
operation and rail-to-rail inputs and outputs can maximize output signal swing on a single +5 V supply. In Figure 37, the amplifier inputs are biased halfway between the supply voltages,
which in this application is 2.5 V. A 10 µF capacitor prevents
power supply noise from contaminating the audio signal.
2µs
Figure 35. Output of OP250 with Snubber Network
–12–
REV. 0
OP250/OP450
+V + 5V
Direct Access Arrangement for Modems
50k
+V + 5V
10 F
50k
1/2
OP250
1 F/0.1 F
270 F
20
LEFT
HEADPHONE
LEFT
INPUT
50k
10 F
100k
+V
50k
10 F
50k
1/2
OP250
270 F
20
RIGHT
HEADPHONE
RIGHT
INPUT
50k
10 F
100k
Figure 39 illustrates a +5 V transmit/receive telephone line interface for 600 Ω systems. It allows full duplex transmission of signals on a transformer coupled 600 Ω line in a differential manner.
Amplifier A1 provides gain which can be adjusted to meet the
modem output drive requirements. Both A1 and A2 are configured so as to apply the largest possible signal on a single supply to
the transformer. Because of the OP450’s high output current
drive and low dropout voltages, the largest signal available on a
single +5 V supply is approximately 4.5 V p-p into a 600 Ω transmission system. Amplifier A3 is configured as a difference amplifier for two reasons: (1) It prevents the transmit signal from
interfering with the receive signal and (2) it extracts the receive
signal from the transmission line for amplification by A4. Amplifier A4’s gain can be adjusted in the same manner as A1’s to meet
the modem’s input signal requirements. Standard resistor values
permit the use of SIP (Single In-line Package) format resistor arrays. Couple this with the OP450 14-lead TSSOP or SOIC footprint and this circuit offers a compact, cost-effective solution.
P1
TX GAIN
ADJUST
Figure 37. A Single-Supply Stereo Headphone Driver
1
TO TELEPHONE
LINE
VSY = 2.5V
AV = +1
VIN = 300mV rms
R6
10k
MIDCOM
671-8005
6
7
A2
R7
10k
5
R10
10k
2
R11
10k
20
100
1k
FREQUENCY – Hz
10k
R8
10k
10 F
R9
10k
0.001
3
RL ≥ 10k
0.01
3
20k
A3
1
R13
10k
R14
14.3k
5
P2
RX GAIN
ADJUST
2k
6
R12
10k
Figure 38. THD vs. Frequency
TRANSMIT
TXA
+5V DC
T1
RL = 2k
A1
C1
0.1 F
6.2V
0.1
THD + N – %
1
R1
10k
2
R5
10k
6.2V
ZO
600
RL = 500
2k
R3
360
1:1
R2
9.09k
A4
7
RECEIVE
RXA
C2
0.1 F
A1, A2, A3, A4 = 1/4 OP450
Headphone Driver
The audio signal is coupled into each input through a 10 µF capacitor. This large value insures the resulting high pass filter
cutoff is below 20 Hz, preserving full audio fidelity. If the input
already has the proper dc bias, then the coupling capacitor and
biasing resistors are not required. A 270 µF capacitor is used at
the output to couple the amplifier to the headphone speaker.
This value is much larger than the input capacitor because of
the low impedance of the headphones, which can range from
32 Ω to 600 Ω or more. An additional 20 Ω resistor is used in
series with the output capacitor to protect the op amp’s output
in the event the output accidentally becomes shorted to ground.
REV. 0
Figure 39. A Single-Supply Direct Access Arrangement for
Modems
–13–
OP250/OP450
* OP250 SPICE Macro-Model Typical Values
* 10/97, Ver. 1
* TAM / ADSC
*
* Node assignments
*
noninverting input
*
|
inverting input
*
|
|
positive supply
*
|
|
|
negative supply
*
|
|
|
|
output
*
|
|
|
|
|
*
|
|
|
|
|
.SUBCKT OP250 1
2
99 50 45
*
* INPUT STAGE
*
M1 4 3 6 6 MNIN L=2u W=66u
M2 5 2 6 6 MNIN L=2u W=66u
M3 7 3 9 9 MPIN L=2u W=66u
M4 8 2 9 9 MPIN L=2u W=66u
RD1
99 4 5E3
RD2
99 5 5E3
RD3
7 50 5E3
RD4
8 50 5E3
VCM1 10 50 -.3
VCM2 99 11 -.3
D1
10 6 DX
D2
9 11 DX
EOS
3 1 POLY(3) (61,98) (73,98) (81,0) 3E-3
+1 1 1
IOS
1 2 .25E-12
IBIAS1 6 50 700E-6
IBIAS2 99 9 700E-6
*
* CMRR=60 dB, ZERO AT 20kHz
*
ECM1 60 98 POLY(2) (1,98) (2,98) 0 .5 .5
RCM1 60 61 159.2E3
RCM2 61 98 159
CCM1 60 61 50E-12
*
* PSRR=90dB, ZERO AT 200Hz
*
RPS1 70 0 1E6
RPS2 71 0 1E6
CPS1 99 70 1E-5
CPS2 50 71 1E-5
EPSY 98 72 POLY(2) (70,0) (0,71) 0 1 1
RPS3 72 73 1.59E6
CPS3 72 73 500E-12
RPS4 73 98 50
*
* INTERNAL VOLTAGE REFERENCE
*
RSY1 99 91 100E3
RSY2 50 90 100E3
VSN1 91 90 DC 0
EREF 98 0 (90,0) 1
GSY 99 50 POLY(1) (99,50) -1.81E-3 1.5E-5
*
* VOLTAGE NOISE REFERENCE OF 30nV/rt(Hz)
*
VN1 80 0 0
RN1 80 0 16.45E-3
HN 81 0 VN1 30
RN2 81 0 1
*
* POLE AT 1.25MHz
*
G2 98 20 POLY(2) (4,5) (7,8) 0 5E-5 5E-5
R2 20 98 10E3
C2 20 98 12.7E-12
*
* GAIN STAGE
*
G1 98 30 (20,98) 3.5E-4
R1 30 98 6.25E6
CF 30 45 135E-12
D4 31 99 DX
D5 50 32 DX
V1 31 30 0.7
V2 30 32 0.7
*
* OUTPUT STAGE
*
M5 45 41 99 99 MPOUT L=2u W=6660u
M6 45 42 50 50 MNOUT L=2u W=6660u
EO1 99 41 POLY(1) (98,30) .9232 1
EO2 42 50 POLY(1) (30,98) .8914 1
*
* MODELS
*
.MODEL MNIN NMOS(LEVEL=2,VTO=0.75,
+KP=20E-6,CGSO=0,KF=2.5E-31,AF=1)
.MODEL MPIN PMOS(LEVEL=2,VTO=-0.75,
+KP=20E-6,CGSO=0,KF=2.5E-31,AF=1)
.MODEL MNOUT NMOS(LEVEL=2,VTO=0.75,
+KP=30E-6,LAMBDA=0.04,CGSO=0)
.MODEL MPOUT PMOS(LEVEL=2,VTO=-0.75,
+KP=20E-6,LAMBDA=0.04,CGSO=0)
.MODEL DX D(IS=1E-16)
.ENDS OP250
–14–
REV. 0
OP250/OP450
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(SO-8)
8-Lead TSSOP
(RU-8)
0.1968 (5.00)
0.1890 (4.80)
5
1
4
PIN 1
0.2440 (6.20)
0.2284 (5.80)
8
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
5
0.0196 (0.50)
x 45°
0.0099 (0.25)
1
0.256 (6.50)
0.246 (6.25)
8
0.177 (4.50)
0.169 (4.30)
0.1574 (4.00)
0.1497 (3.80)
0.122 (3.10)
0.114 (2.90)
4
PIN 1
0.0500 0.0192 (0.49)
SEATING (1.27)
PLANE BSC 0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.0256 (0.65)
BSC
0.0433
(1.10)
MAX
0.0118 (0.30)
0.0075 (0.19)
14-Lead Plastic DIP
(N-14)
14-Lead TSSOP
(RU-14)
0.795 (20.19)
0.725 (18.42)
0.201 (5.10)
0.193 (4.90)
1
7
PIN 1
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
0.100 0.070 (1.77)
(2.54) 0.045 (1.15)
BSC
SEATING
PLANE
14
0.325 (8.25)
0.300 (7.62) 0.195 (4.95)
0.115 (2.93)
1
0.015 (0.381)
0.008 (0.204)
7
PIN 1
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
REV. 0
8
0.256 (6.50)
0.246 (6.25)
8
0.177 (4.50)
0.169 (4.30)
14
0.210 (5.33)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8°
0°
–15–
0.0433
(1.10)
MAX
0.0256
(0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
8°
0°
0.028 (0.70)
0.020 (0.50)
–16–
PRINTED IN U.S.A.
C3236–8–10/97