PMB 2220 Version 2.2 1 Overview Combined with a PLL (i.e. PMB 2306 or PMB 2307) and a power amplifier, the PMB 2220 device performs a complete DECT transmitter. Additionally, the phase locked loop can be switched to receive mode and be used as a local oscillator for the receive mixer. P-SSOP-20-1 1.1 Features • Either single VCO operation (for receive and transmit) or dual VCO operation (VCO1 for receive and VCO2 for transmit) possible • 64/65- prescaler on chip • Frequency doubler for receive and transmit mode with balanced driver outputs • Supply voltage regulator (with external pnp-transistor) for the two VCOs • Power down for the inactive VCO • Current reference output for PLL charge pump to get constant lock-in time • Wide power supply range 3.0 ... 5.5 V, for 3 cell supply without external regulator Type Ordering Code Package PMB 2220 Q67000-A6079 P-SSOP-20-1 Semiconductor Group 1 08.95 PMB 2220 Overview 1.2 Pin Configuration (top view) P-SSOP-20-1 Semiconductor Group 2 PMB 2220 Overview 1.3 Pin Definitions and Functions Pin No. Symbol Function 1 MOD Prescaler modulus control input (divider ratio 1:64 or 1:65) 2 GND1 3 VCC1 Supply voltage 1 (prescaler) 4 PSRUN Test input for prescaler 5 PA Frequency doubler signal output 6 PAX Inverted frequency doubler signal output 7 VCC2 Supply voltage 2 (bandgap and frequency doubler) 8 GND2 9 TXON Control input for VCO power down 10 TXLOFF System power down control input 11 VREF Reference voltage for IREF-current generation with external resistor to ground 12 Base current for external supply voltage regulating pnp-transistor 13 IREG VCC3 14 LOB2 Base input of oscillator 2 15 LOE2 Emitter input of oscillator 2 16 LOE1 Emitter input of oscillator 1 17 LOB1 Base input of oscillator 1 18 GND3 19 IREF Reference current for PLL charge pump 20 FI Prescaler output Semiconductor Group Supply voltage 3 (regulated for VCO1 and VCO2) 3 PMB 2220 Overview Figure 1 Block Diagram Semiconductor Group 4 PMB 2220 Circuit Description 2 Circuit Description VCO1, VCO2 The signal TXON determines which one of the VCOs is active: Receive mode VCO1 with TXON logic LOW, transmit mode VCO2 with TXON logic HIGH. The other VCO is powered down. Both VCOs are emitter coupled configurations (pins LOB1, LOE1 and LOB2, LOE2) with an external dielectric resonator connected to ground and a tuning diode in parallel. During the transmit timeslots the modulation can be done at the anode, the PLL loop being open. The VCOs generate differential signals. Those of the active VCO are coupled to the prescaler and the doubler via an isolation amplifier. Supply Voltage Regulator for the VCOs With an external pnp-transistor the supply voltage of both VCOs is stabilized to 2.7 V in the specified general supply voltage range. This allows for a minimal frequency drift in spite of a ripple on the chip supply voltage. The emitter of the external transistor must be connected to VCC2. Phase Shifter, Frequency Doubler Frequency doubling of the active differential VCO signal is performed by multiplying the signal with its quadrature component. PD Charge Pump Reference Pin IREF functions as a current source for use in the charge pump of the PLL. The current is set by connecting pin VREF (reference voltage) by a resistor to ground. This external resistor allows for a much smaller tolerance than would be feasible with an on-chip resistor. Prescaler The prescaler divides the signal frequency of the active VCO by a ratio of 1:64 (MOD high) or 1:65 (MOD low) and outputs it on pin FI. The MOD input is TTL/CMOS compatible. The output is compatible to the CMOS frequency synthesizer family PMB 2306 / PMB 2307, with a minimum logic swing of 0.5 Vpp. The supply VCC1 is used to feed the prescaler. Due to the internal interface VCC1 must be connected to VCC2. Semiconductor Group 5 PMB 2220 Circuit Description Summary of Function Modes Power Down Operation The following table shows the relation between the logic level of the inputs TXLOFF and TXON and the status of the different function blocks. The “power down code” lists the logic levels of the inputs in the order TXLOFF, TXON. L = logic LOW, H = logic HIGH off: function block in power down mode or stand by on: function block in normal operation Function Blocks Power Down Code (TXLOFF, TXON) L, x H, L H, H Bandgap ref., power down dec., charge pump ref., voltage regulator off on on Prescaler off on on VCO1 (Rx) off on off VCO2 (Tx) off off on Delay, doubler off on on Prescaler Divider Ratio The table shows the relation between the logic level of the input MOD and the prescaler divider ratio. Logic Level of MOD Prescaler Divide Ratio HIGH 1:64 LOW 1:65 Semiconductor Group 6 PMB 2220 Circuit Description Figure 2 Supply Voltage Partitioning Semiconductor Group 7 PMB 2220 Circuit Description Figure 3 Input/Output Circuits Part 1 Semiconductor Group 8 PMB 2220 Circuit Description Figure 4 Input/Output Circuits Part 2 Semiconductor Group 9 PMB 2220 Electrical Characteristics 3 Electrical Characteristics 3.1 Absolute Maximum Ratings TA = – 10 °C to + 55 °C Parameter Symbol VCC1,2,(3) Differential input voltage (pins LOB1 Vdiff Supply voltage Limit Values Unit min. max. – 0.5 +7 V –1 +1 V Remarks to LOE1 and LOB2 to LOE2) Resistance between pin VREF and GND RVREF Junction temperature Tj TS Storage temperature kΩ note 1) + 125 °C note 2) + 150 °C 1.3 – 65 1) Corresponds to a current IREF of about 700 µA. 2) The thermal resistance Rth (junction to ambient) of the P-SSOP-20 package is about xxxx K/W. Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 3.2 Operational Range Parameter Symbol Limit Values min. max. 5.5 Unit Remarks V VCC = VCC1 = VCC2 kΩ note 1) Supply voltage VCC 3.0 Resistance between pin VREF and GND RVREF 2.6 Voltage at pin IREF VIREF GND VCC – 1.5 V Input-/Oscillation frequency fVCO 800 1000 1) VCC = VCC1 = VCC2 MHz Corresponds to a current IREF of about 360 µA. Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 10 PMB 2220 Electrical Characteristics 3.3 AC / DC Characteristics Supply voltage VCC = 3.0 … 5.5 V Ambient temperature TA = – 10 … + 55 °C Parameter Symbol Limit Values min. typ. Unit Test Test Conditions Circuit max. Supply Currents Supply current during standby (TXLOFF = LOW) Supply current (TXLOFF = HIGH) IVCC1 50 µA 1 TA = 25 °C; VCC1 = 3.0 V IVCC2 50 µA 1 VCC2 = 3.0 V IVCC3 70 µA 1 IPA/PAX 50 µA 1 IVCC1 2.7 3.6 mA 1 TA = 25 °C; VCC1 = 3.0 V IVCC2 13.8 17 mA 1 VCC2 = 3.0 V IVCC3 7.7 10 mA 1 VCC3 = 3.0 V 4.5 5.5 mA 1 IVCC1 3.0 4 mA 1 TA = 25 °C; VCC1 = 5.5 V IVCC2 14.9 18 mA 1 VCC2 = 5.5 V IVCC3 8.4 11 mA 1 VCC3 = 5.5 V 4.9 6 mA IPA/PAX Supply current (TXLOFF = HIGH) IPA/PAX 3.5 3.5 Control Inputs TXLOFF, MD, TXON TXLOFF voltage HIGH VTXLOFFH 2.0 5.5 V 1 TXLOFF voltage LOW VTXLOFFL GND 0.4 V 1 TXLOFF input current HIGH ITXLOFFH 200 µA 1 TXLOFF input current LOW ITXLOFFL 20 µA 1 TXON voltage HIGH VTXONH 2.0 5.5 V 1 TXON voltage LOW VTXONL GND 0.8 V 1 TXON input current HIGH ITXONH – 20 µA 1 TXON input current LOW ITXONL – 100 µA 1 Semiconductor Group 11 PMB 2220 Electrical Characteristics 3.3 AC / DC Characteristics (cont’d) Supply voltage VCC = 3.0 … 5.5 V Ambient temperature TA = – 10 … + 55 °C Parameter Symbol Limit Values min. typ. Unit Test Test Conditions Circuit µA 1 max. Current Source VREF, IREF Current IREF IIREF0 100 Tolerance due to Production – 10 + 10 % 1 Tolerance due to Temperature –5 –5 % 1 4 µA/V 1 Sensitivity of IREF with respect to supply 2.5 m RVREF = 8.7 kΩ, pin IREF and GND VCO (with Fixed Resonator and External Circuitry see Test Circuit 2) Oscillator frequency fVCO tuning range 2 VT = 0.5 … 2.5 V MHz 2 with fixed resonator MHz 2 MHz 2 MHz 2 – 35 dB 2 note 1) Rx-lower limit fVCO – Rxmin Rx-upper limit fVCO – Rxmax Tx-lower limit fVCO – Txmin Tx-upper limit fVCO – Txmax Power supply ripple rejection Ar Supply voltage dependence of oscillator frequency note 2) ∆ fVCO/∆ VCC3 300 kHz/V 2 1 Supply voltage dependence of oscillator frequency note 2) ∆ fVCO/∆ VCC2 20 kHz/V 2 1 879 901 934 956 – 45 Note: VCC = VCC1 or VCC2 ripple with 200 mV amplitude, 10 µs rise/fall time, 900 µs cycle time, 50 % duty cycle. 200 mV ripple on VCC2 the overall frequency deviation should be less than 10 kHz. ∆ fVCO ≤ 10 kHz (typ) 1) Trapezoidal 2) Assuming Semiconductor Group 12 PMB 2220 Electrical Characteristics 3.3 AC / DC Characteristics (cont’d) Supply voltage VCC = 3.0 … 5.5 V Ambient temperature TA = – 10 … + 55 °C Parameter Symbol Limit Values min. Sideband noise after frequency doubling measured at PA/PAX typ. max. – 80 – 110 – 125 – 135 – 75 – 105 – 115 – 131 Unit Test Test Conditions Circuit dBc/Hz dBc/Hz dBc/Hz dBc/Hz 2 2 2 2 at 50 kHz offset at 1.2 MHz offset at 3.0 MHz offset at 4.7 MHz offset Signal Output PA / PAX Output resistance RPA/X 150 Ω differential output (fPA/X = 1900 MHz) Output capacitance CPA/X 640 fF in parallel to RPA/X (fPA/X = 1900 MHz) Output level PPA/X Supply voltage dependence of output level ∆ PPA/X/ ∆ VCC2 Temperature dependence of output level Suppression of fundamental Semiconductor Group dBm 1 RQ = 200 Ω TA = 25 °C; VCC2 = 3.0 V + 0.2 dBm/V 1 RQ = 200 Ω ∆ PPA/X /∆ TA – 0.02 dBm/K 1 RQ = 200 Ω Af – 25 dB 1 –7 –5 13 –3 – 15 PMB 2220 Electrical Characteristics 3.3 AC / DC Characteristics (cont’d) Supply voltage VCC = 3.0 … 5.5 V Ambient temperature TA = – 10 … + 55 °C Parameter Symbol Limit Values min. typ. Unit Test Test Conditions Circuit Vpp 1 max. Output FI and Input MOD Output logic swing VFI 0.5 MOD voltage High VMODH 2.0 5.5 V 1 MOD voltage Low VMODL GND 0.8 V 1 MOD input current High IMODH 50 µA 1 MOD input current Low IMODL µA 1 MOD setup time (diagram 1) tset ns 1 – 100 29 CL ≤ 8 pF Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Semiconductor Group 14 PMB 2220 Electrical Characteristics Figure 5 Diagram 1 Semiconductor Group 15 PMB 2220 Electrical Characteristics Figure 6 Test Circuit 1 Test Circuit 2 The test circuit 2 given in this section is used to verify the system performance of the synthesizer consisting of the PMB 2220 and the PMB 2306 or PMB 2307. The aim is to give a common test circuit as well as its layout as a reference for the DECT related system performance measurements. Semiconductor Group 16 PMB 2220 Electrical Characteristics Figure 7 Test Circuit 2: Circuit Diagram Semiconductor Group 17 PMB 2220 Electrical Characteristics Bill of Materials Project Name: SCH\PMB_2220 Time & date: 16:49 Sep. 27, 1994 # Device Value 1 2 3 1 2 1 10 C C C C C C C 2.2 nF* 2.2 pF 2.7 pF 3.3 pF 3.9 pF 10 nF* 10 pF 3 2 1 1 2 1 1 2 1 1 2 1 2 1 1 1 1 22 pF 270 pF 470 pF 1 nF 100 nF* 820 pF 100 nF* 5.6 nF 1150 MHz 1200 MHz 68 µH 1N4007 BBY 51 ANT SMA-WBU PMB 2306 PMB 2220 0603RC 0603RC 0603RC 0805RC 0805RC 0805RC 1206RC 1210RC CER-RES CER-RES 1210RC MELF SOT-23 2 2 9 C C C C C C C C RES RES COIL DIODE DIODE CON IC IC JUMPER HEADER 2 R R R 22 k 330 3.9 k 0603RC 0603RC 0603RC 1 1 2 1 1 1 R R R R R BJT 8.2 k 9.1 K 10 k 0Ω 10 k BCW 67A 0603RC 0603RC 0805RC 1206RC 1206RC SOT-23 Semiconductor Group Package Type 0603RC 0603RC 0603RC 0603RC 0603RC 0603RC 0603RC SO-14 SSOP-20 18 Refdes C102 C109, C110 C107, C108, C117 C111 C106, C116 C104 C120, C123, C124, C125, C126, C127 C128, C130, C131, C134 C112, C121, C122 C101, C103 C115 C129 C118, C119 C105 C100 C132, C133 RXRES TXRES L101, L102 D103 D101, D102 BU1 IC101 IC102 JP1 R106, R107 R102, R103 R104, R105, R110, R111, R112, R113, R115, R116, R117 R101 R108 R1, R2 R118 R109 T101 PMB 2220 Electrical Characteristics Figure 8 Test Circuit 2: Top Layer Semiconductor Group 19 PMB 2220 Electrical Characteristics Figure 9 Test Circuit 2: Bottom Layer Semiconductor Group 20 PMB 2220 Electrical Characteristics Figure 10 Test Circuit 2: Drill Layer Semiconductor Group 21 PMB 2220 Electrical Characteristics Figure 11 Test Circuit 2: Assembly Diagram Semiconductor Group 22 PMB 2220 Package Outlines 4 Package Outlines GPS05387 P-SSOP-20-1 (Plastic Shrink Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 23 Dimensions in mm