VISHAY SI9243AEY

Si9243AEY
Vishay Siliconix
Single-Ended Bus Transceiver
FEATURES
D
D
D
D
D
D
D Operating Power Supply Range 6 V v VBAT v 36 V
D Reverse Battery Protection Down to VBAT w –24 V
D Standby Mode With Very Low Current Consumption
IBAT(SB) = 1 A @ VDD = 0.5 V
D Low Quiescent Current in OFF Condition
IBAT = 120 A and IDD v 10 A
D ISO 9141 Compatible
Overtemperature Shutdown Function For K Output
Defined K Output OFF for Open GND
Defined Receive Output Status for Open L or K Inputs
Defined K Output OFF for TX Input Open
2-kV ESD
Typical Transmit Speeds of 200 kBaud
DESCRIPTION
The Si9243AEY is a monolithic bus transceiver designed to
provide bidirectional serial communication in automotive
diagnostic applications.
The device incorporates protection against overvoltages and
short circuits to VBAT. The transceiver pin is protected and can be
driven beyond the VBAT voltage.
The RX output is capable of driving CMOS or 1
LSTTL load.
The Si9243AEY is built on the Vishay Siliconix BiC/DMOS
process. This process supports bipolar transistors, CMOS, and
DMOS. An epitaxial layer prevents latchup.
The Si9243AEY is available in a 8-pin SO package and
operates over the automotive temperature range (–40 to
125_C).
PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM
GND
VDD VBAT
VDD
RXL
VDD
RXK
+
L
–
L
+
K
–
K
+
VBAT/2
–
VDD
K
TX
Document Number: 70788
S-02936—Rev. D, 22-Jan-01
Logic and Fault Detect Circuitry
(See State Diagram and Truth Table)
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Si9243AEY
Vishay Siliconix
OUTPUT TABLE AND STATE DIAGRAMS
STATE
INPUTS VARIABLE
Over Temp
Power On
A=1
A=0
Over Temp @TX
Short Circuit
Power On
B=1
B=0
TX
Note: Over Temp is an internal condition, not meant
to be a logic signal.
OUTPUT
TABLE
TX
L
A
B
K
RXK
RXL
Comments
0
0
1
1
0
0
0
1
1
1
1
1
1
1
0
1
1
1
0
0
1
1
0
1
1
1
1
0
X
L
0
1
HiZ
K
L
Over Temp
0
L
1
0
HiZ
K
L
Short Circuit
1
1
1
1
1
1
1
Receive Mode
1
0
1
1
0
0
0
X = “1” or “0”
HiZ = High Impedance State
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to Ground
Voltage on VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage On VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –24 V to 45 V
K Pin Only, Short Circuit Duration (to VBAT or GND) . . . . . . . . . . Continuous
Voltage K , L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –16 V to (VBAT + 1 V)
Operating Temperature (TA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 to 125_C
Voltage Difference V(VBAT, K, L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 V
Voltage On Any Pin (Except VBAT , K, L)
or Max. Current . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VDD + 0.3 V) or 10 mA
Junction and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C
Thermal Resistance JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C/W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltage Referenced to Ground
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 V to 5.5 V
VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V to 36 V
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2
K, L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V to 36 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD
Document Number: 70788
S-02936—Rev. D, 22-Jan-01
Si9243AEY
Vishay Siliconix
SPECIFICATIONS
Limits
Test Conditions Unless Specified
Parameter
VDD = 4.5 to 5.5 V
VBAT = 6 to 36 V
Symbol
–40 to 125_C
Tempa
Minb
Typc
Maxb
Unit
Transmitter and Logic Levels
TX Input Low Voltage
VILT
Full
TX Input High Voltage
VIHT
Full
TX Input Capacitanced
CINT
TX Input Pull-up Resistance
RTX
1.5
3.5
Full
10
20
V
10
pF
40
k
VDD = 5.5 V, TX = 1.5 V, 3.5 V
Full
RL = 510 "5% , VBAT = 6 to 18 V
Full
0.2 VBAT
RL = 1 k "5% , VBAT = 16 to 36 V
Full
0.2 VBAT
RL = 510 "5% , VBAT = 4.5 V
Full
K Transmit
K Output Low Voltage
K Output High Voltage
VOLK
VOHK
K Rise, Fall Times
tr, tf
K Output Sink Resistance
Rsi
K Output Capacitanced
CO
1.2
V
RL = 510 "5% , VBAT = 4.5 to 18 V
Full
0.95
VBAT
RL = 1 k "5% , VBAT = 16 to 36 V
Full
0.95
VBAT
See Test Circuit
Full
9.6
Full
110
Full
20
pF
TX = 0 V
s
Receiver
L and K Input High Voltage
VIH
Full
L and K Input Hysteresisc, d
VHYS
Full
L and K Input Currents
IIH
RXL and RXK Output
Low Voltage
VOLR
RXL and RXK Pull-up Resistance
RRX
TX = 4 V
VIH = VBAT
Full
VILK, VILL = 0.35 VBAT
IOLR = 1 mA
Full
Full
0.65
VBAT
V
0.05
VBAT
20
5
A
0.4
V
20
k
RL = 510 "5% , VBAT = 6 to 18 V
CL = 10 nF, See Test Circuit
Full
3
10
RL = 1 k "5% , VBAT = 16 to 36 V
CL = 4.7 nF, See Test Circuit
Full
3
10
RL = 510 "5% , VBAT = 6 to 18 V
CL = 10 nF, See Test Circuit
Full
3
10
RL = 1 k "5% , VBAT = 16 to 36 V
CL = 4.7 nF, See Test Circuit
Full
3
10
IBAT(on)
TX = 0 V, VBAT v 16 V
Full
1.2
3
Bat Supply Current Off
IBAT(off)
VIHT v VTX, VIHK v VK, VIHL v VL VBAT
v 12 V
Full
120
220
Bat Supply Current Standby
IBAT(SB)
VDD v 0.5 V, VBAT v 12 V
Full
t1
10
Logic Supply Current On
IDD(on)
VDD v 5.5 V, TX = 0 V
Full
1.4
2.3
mA
IDD(off)
VIHT v VTX, VIHK v VK, VIHL v VL VBAT
v 12 V
Full
10
RXK Turn On Delay
RXK Turn Off Delay
td(on)
td(off)
s
Supplies
Bat Supply Current On
Logic Supply Current Off
mA
A
Miscellaneous
TX Transmit Baud Rate
BRT
RL = 510 , CL = 10 nF
Full
RXL and RXK Receive Baud Ratec
BRR
6 V t VBAT < 16 V, CRX = 20 pF
Full
fK-RXK
6 V t VBAT < 16 V, RK = 510 CK v 1.3 nF
Full
50
Full
1
Transmission Frequency
TX Minimum Pulse Widthd, e
tTX
Over Temperature Shutdownd
TSHUT
Temperature Shutdown Hysteresisc
THYST
Temperature Rising
10.4
200
160
200
kBaud
kHz
s
180
30
_
_C
Notes
a. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
Document Number: 70788
S-02936—Rev. D, 22-Jan-01
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Si9243AEY
Vishay Siliconix
PIN CONFIGURATION
Narrow Body
SO Package
RXK
1
8
L
RXL
2
7
VBAT
VDD
3
6
K
TX
4
5
GND
ORDERING INFORMATION
Part Number
Temperature Range
Si9243AEY
–40 to 125_C
Top View
PIN DESCRIPTION
Pin Number
Symbol
Description
1
RXK
K Receiver, Output
2
RXL
L Receiver, Output
3
VDD
Positive Power Supply
4
TX
Transmit, Input
5
GND
6
K
7
VBAT
8
L
Ground Connection
K Transmit/Receive, Bidirectional
Battery Power Supply
L Transmit, Input
FUNCTIONAL DESCRIPTION
The voltage on the K and L pins are internally compared to
VBAT/2. If the voltage on the K or L pin is less than VBAT/2 then
RXK or RXL output will be “low.” If the voltage on the K or L pin
is greater than VBAT/2 then RXK or RXL output will be “high.
monitors the RXK and TX. When the two mirror each other
there is no fault. In the event of over temperature, or short
circuit to VBAT, the Si9243AEY will turn off the K output to
protect the IC. The K pin will stay in high impedance and RXK
will follow the K pin. The fault will be reset when TX is toggled
high. RXK, RXL and TX pins have internal pull up resistor to
VDD while K and L pins have internal pull down resistors. When
any one of the TX, VBAT or GND pins is open the K output is off.
In order to be in transmit mode, TX must be set “low.” The TX
signal is then internally inverted and turns the MOSFET on,
causing the K pin to be “low.” In transmit mode, the processor
When the TX pin is set “high” the Si9243AEY is in receive
mode and the internal MOSFET is turned off. RXL and RXK
outputs will follow L and K inputs respectively.
The Si9243AEY can be either in transmit or receive mode and
it contains over temperature, and short circuit VBAT fault
detection circuits.
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Document Number: 70788
S-02936—Rev. D, 22-Jan-01
Si9243AEY
Vishay Siliconix
TEST CIRCUIT AND TIMING DIAGRAMS (TRANSMIT ONLY)
VDD
VBAT
VDD
Si9243AEY
RXK
L
td(off)
td(on)
+
–
RXL
TX
VDD
TXmin
VBAT
+
–
RXK
VDD
VBAT
RL
V
80%
80%
K
+
–
CL
20%
TX
20%
VK, VL
tr
GND
tf
RL = 510 , CL = 10 nF, VBAT = 6 V to 18 V
RL = 1 k, CL = 4.7 nF, VBAT = 16 V to 36 V
APPLICATION CIRCUIT
Diagnostic Tester
ECU
VDD
Si9243AEY
VB
L-Line
+
–
510 VDD
I/Os
Microcontroller
0.4 +
–
VDD
V
+
–
K-Line
VBAT
VDD
C1
0.1 F
50 V
C1
0.1 F
Bus
ECU = Electronic Control Unit
Document Number: 70788
S-02936—Rev. D, 22-Jan-01
www.vishay.com
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