ETC R29621ADM

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R29631.pdf
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R29633.pdf
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R29651.pdf
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R29653.pdf
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R29681.pdf
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R29683.pdf
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R296XX.pdf
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R29771.pdf
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R29773.pdf
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R29791.pdf
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R29793.pdf
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R297XX.pdf
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Parent Directory
Description
www.fairchildsemi.com
R296XX/R297XX
Standard PROMs and Power-Switched SPROMs
Features
Description
• Devices are available in military (-55°C to +125°C)
temperature range
• Standard PROMs are offered in power-switched SPROM
versions
• Typically, 75% power savings achieved by deselected
SPROMs
• Reliable nichrome fuses
• Three-state outputs
• Devices programmed on standard PROM programmers
• High immunity or resistance to space levels of radiation
• Device pinouts comply with JEDEC standards
• Available in surface mount and through-hole packaging
• PROMs and SPROMs are offered in 24-pin, 0.3" wide
DIPs
Fairchild Semiconductor Electronics Semiconductor Division’s Bipolar Field Programmable Read-Only Memories
include both standard and power-switched versions. CS/PS
inputs provide logic flexibility and ease of memory expansion decoding. SPROM power-switch circuitry is activated
by the PS input.
Applications
•
•
•
•
•
•
•
•
Microprogram control store
Microprocessor program store
Programmable logic
Custom look-up tables
Security encoding/decoding
Code converter
Character generator
Use in redundant systems
Fairchild Semiconductor PROMs and SPROMs are manufactured with nichrome fuses and low power Schottky technology. The devices are shipped with all bits in the HIGH
(logical ONE) state. To achieve a LOW state in a given bit
location the nichrome link is fused open by passing a short,
high current pulse through the link. All devices are programmed using the same programming technique.
Standard PROMs are enabled by a single active LOW CS or
by both active LOW CS and HIGH CS inputs. Powerswitched PROMs (SPROMs) are enabled by a single active
LOW PS or by both active LOW PS and HIGH PS inputs.
See the individual block diagrams for the enable scheme.
Rev. 1.0.1
R296XX/R297XX
PRODUCT SPECIFICATION
Absolute Maximum Ratings (above which the useful life may be impaired)
Supply Voltage to Ground Potential (continuous), VCC
–0.5V to +7.0V
DC Input Current
–30 mA to +5.0 mA
DC Input Voltage (address inputs)
–0.5V to +5.5V
DC Input Voltage (chip/power select input pin)
R296XX
–0.5V to +33V
R297XX
–0.5V to +28V
DC Voltage Applied to Outputs (except during programming)
–0.5V to +VCC max.
Output Current into Outputs During Programming
240 mA
DC Voltage Applied to Outputs During Programming
R296XX
26V
R297XX
24V
Junction Temperature
+175°C
Storage Temperature
–65°C to +150°C
Programming Temperature
25 ±5°C
Lead Temperature (soldering, 10 seconds)
300°C
Current Density (metallization)
<5 x 105A/cm2
Thermal Resistance, Junction-to-Case qJC
Dual-ln-Line
£11°C/W
Leadless Chip Carrier
£10°C/W
Flat Pack
£10°C/W
Operating Conditions
Military
Parameter
Description
VCC
Supply Voltage
4.5
5.5
V
TC
Case Operating Temperature
–55
+125
°C
0.8
V
VIL11, 2
DC Low Level Input Voltage
VIH
1
DC High Level Input Voltage
VIL
AC/Functional Low Level Input Voltage
VIH
AC/Functional High Level Input Voltage
Min.
Max.
2.0
V
0
3.0
Unit
V
V
Note:
1. Tests shall be conducted at input test conditions as follows: VIH = VIH(min) +20%, –0%; VIL = VIL(max) +0%, –50%. Devices
may be tested using any input voltage within this input voltage range but shall be guaranteed to VIH(min) and VIL(max).
CAUTION: To avoid test correlation problems, the test system noise (e.g., testers, handlers, etc.) should be verified to assure
that VIH(min) and VIL(max) requirements are not violated at the device terminals.
2. VIL = 0.6V for Chip Select Pins on all 29600 series devices.
2
PRODUCT SPECIFICATION
R296XX/R297XX
Electrical Characteristics (Over Operating Range)
Devices conform to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
Parameter
Description
Conditions
VOH
Output High Voltage
VCC = Min, IOH = -1.6 mA
Min.
Max.
2.4
Units
V
VIN = VIH or VIL
1
VOL
Output Low Voltage
Input Low Current
IIL
IIH
Input High Current
VCC = Min,
IOL = 8 mA
0.4
VIN = VIH or VIL
IOL = 16 mA
0.5
VCC = Max, VIN = 0.4V
R296XX
-250
R297XX
-100
VCC = Max, VIN = 2.7V
10
VCC = Max, VIN = 5.5V
40
IOS2
Output Short Circuit
Current
VCC = Max, VOUT =
VIC
Input Clamp Voltage
VCC = Min, IIN = -18 mA
ICEX
Output Leakage
Current
VCC = Max,
Chip Disabled
0.2V3
-15
V
mA
mA
-85
mA
-1.2
V
VOUT = 5.5V
+40
mA
VOUT = 0.4V
-40
Notes:
1. This characteristic cannot be tested prior to programming; it is guaranteed by factory testing.
2. Not more than one output should be shorted at a time. Duration of the short circuit should not exceed 1 second.
3. VOUT = 0.0V for R29791/R29793.
Pin Definitions
Symbol
A0—An
Description
Address Inputs
CS
Chip Select Active Low (PROM)
CS
Chip Select Active High (PROM)
PS
Chip Select Active Low (SPROM)
PS
Chip Select Active High (SPROM)
O1—On
Data Outputs
3
R296XX/R297XX
PRODUCT SPECIFICATION
512 x 8 PROM—R29621/R29621A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
VCC = Max
29621AM
R29621M
Units
155
155
mA
ICC
Power Supply Current
tAA2
Address Access Time
CL = 30 pF1
75
95
ns
2
Enable Access Time
R1 = 300W to VCC
50
50
ns
3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
40
40
ns
853
853
mW
All Inputs GND
tEA
tER
Power Dissipation
PD
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Ordering Information
Block Diagram
Package
Operating Temperature
Range
R29621DM
D
-55°C to +125°C
R29621DM/883B
D
-55°C to+125°C
R29621DMS
D
-55°C to +125°C
R29621ADM
D
-55°C to +125°C
R29621ADM/883B
D
-55°C to +125°C
R29621ADMS
D
-55°C to +125°C
Part Type
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 20 Lead Ceramic DIP
A0
A1
A5
A6
A7
A8
1
2
16 1 of 64
17 Decoder
18
19
3
4
5
A2
A3
A4
CS
64 x 64
Memory
Matrix
15
1 of 8
Multiplexers
(8)
Output
Drivers (8)
6 7 8 9 11121314
O1
O2
O3
O4
O5
O6
O7
O8
Pin Assignments
20 Lead Ceramic DIP
VCC A8 A7 A6 A5 CS O8 O7 O6 O5
20 19 18 17 16 15 14 13 12 11
1
2
3
4
5
6
7
8
9
10
A0 A1 A2 A3 A4 O1 O2 O3 O4 Gnd
Pin 15 is also the programming pin (pp)
4
PRODUCT SPECIFICATION
R296XX/R297XX
512 x 8 SPROM—R29623/R29623A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29623AM
R29623M
Units
ICCD
Power Down, Supply
Current (disabled)
VCC = Max
PS = VIH, All other inputs = GND
45
45
mA
ICC
Supply Current
(enabled)
VCC = Max
All Inputs = GND
155
155
mA
tAA2
Address Access Time
CL = 30 pF1
75
100
ns
2
Enable Access Time
R1 = 300W to VCC
80
100
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
40
40
ns
PD
Power Dissipation
(Disabled)
248
248
mW
PD
Power Dissipation
(Enabled)
853
853
mW
tEA
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Ordering Information
Block Diagram
Package
Operating Temperature
Range
R29623DM
D
-55°C to +125°C
R29623DM/883B
D
-55°C to +125°C
R29623DMS
D
-55°C to +125°C
R29623ADM
D
-55°C to +125°C
R29623ADM/883B
D
-55°C to +125°C
R29623ADMS
D
-55°C to +125°C
Part Type
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 20 Lead Ceramic DIP
A0
A1
A5
A6
A7
A8
1
2
16 1 of 64
17 Decoder
18
19
3
4
5
A2
A3
A4
PS
64 x 64
Memory
Matrix
15
1 of 8
Multiplexers
(8)
Output
Drivers (8)
6 7 8 9 11121314
O1
O2
O3
O4
O5
O6
O7
O8
Pin Assignments
20 Lead Ceramic DIP
VCC A8 A7 A6 A5 PS O8 O7 O6 O5
20 19 18 17 16 15 14 13 12 11
1
2
3
4
5
6
7
8
9
10
A0 A1 A2 A3 A4 O1 O2 O3 O4 Gnd
Pin 15 is also the programming pin (pp)
5
R296XX/R297XX
PRODUCT SPECIFICATION
1024 x 8 PROM—R29631/R29631A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29631AM
R29631M
Units
170
170
mA
ICC
Power Supply Current
VCC = Max
tAA2
Address Access Time
CL = 30 pF1
75
105
ns
2
Enable Access Time
R1 = 300W to VCC
50
50
ns
3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
40
40
ns
935
935
mW
All Inputs GND
tEA
tER
Power Dissipation
PD
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Block Diagram
Package
Operating Temperature
Range
R29631DM
D
-55°C to +125°C
R29631DM/883B
D
-55°C to +125°C
R29631DMS
D
-55°C to +125°C
R29631FM
F
-55°C to +125°C
R29631FM/883B
F
-55°C to +125°C
R29631FMS
F
-55°C to +125°C
R29631ADM
D
-55°C to +125°C
R29631ADM/883B
D
-55°C to +125°C
R29631AFMS
D
-55°C to +125°C
R29631ADM
F
-55°C to +125°C
R29631AFM/883B
F
-55°C to +125°C
R29631AFMS
F
-55°C to +125°C
Part Type
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead CERPACK
Pin Assignments
24 Lead Ceramic DIP/24 Lead CERPACK
VCC A8 A9 CS1 CS2 CS3 CS4 O8 O7 O6 O5 O4
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
6
A4
A5
A6
A7
A8
A9
4
3
2 1 of 64
1 Decoder
23
22
8
7
6
5
A0
A1
A2
A3
CS1
CS2
CS3
CS4
64 x 128
Memory
Matrix
21
20
19
18
1 of 16
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Ordering Information
PRODUCT SPECIFICATION
R296XX/R297XX
1024 x 8 SPROM—R29633/R29633A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29633AM
R29633M
Units
ICCD
Power Down, Supply
Current (disabled)
VCC = Max, PS = VIH,
All other inputs = GND
45
45
mA
ICC
Supply Current
(Enabled)
VCC = Max
All Inputs = GND
170
170
mA
tAA2
Address Access Time
CL = 30 pF1
85
105
ns
2
Enable Access Time
R1 = 300W to VCC
85
130
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
40
40
ns
PD
Power Dissipation
(Disabled)
248
248
mW
PD
Power Dissipation
(Enabled)
935
935
mW
tEA
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Pin Assignments
Package
Operating Temperature
Range
R29633DM
D
-55°C to +125°C
R29633DM/883B
D
-55°C to +125°C
R29633DMS
D
-55°C to +125°C
R29633FM
F
-55°C to +125°C
R29633FM/883B
F
-55°C to +125°C
R29633FMS
F
-55°C to +125°C
R29633ADM
D
-55°C to +125°C
R29633ADM/883B
D
-55°C to +125°C
R29633ADMS
D
-55°C to +125°C
R29633AFM
F
-55°C to +125°C
R29633AFM/883B
F
-55°C to +125°C
R29633AFMS
F
-55°C to +125°C
Part Type
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead CERPACK
24 Lead Ceramic DIP/24 Lead CERPACK
VCC A8 A9 PS1 PS2 PS3 PS4 O8 O7 O6 O5 O4
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
Block Diagram
A4
A5
A6
A7
A8
A9
4
3
2 1 of 64
1 Decoder
23
22
8
7
6
5
A0
A1
A2
A3
PS1
PS2
PS3
PS4
64 x 128
Memory
Matrix
21
20
19
18
1 of 16
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Ordering Information
7
R296XX/R297XX
PRODUCT SPECIFICATION
2048 x 4 PROM—R29651/R29651A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
VCC = Max
29651AM
R29651M
Units
170
170
mA
ICC
Power Supply Current
tAA2
Address Access Time
CL = 30 pF1
85
105
ns
2
Enable Access Time
R1 = 300W to VCC
50
55
ns
3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
45
45
ns
935
935
mW
All Inputs GND
tEA
tER
Power Dissipation
PD
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Block Diagram
-55°C to +125°C
R29651DM/883B
D
-55°C to +125°C
R29651DMS
D
-55°C to +125°C
R29651ADM
D
-55°C to +125°C
R29651ADM/883B
D
-55°C to +125°C
R29651ADMS
D
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 18 Lead Ceramic DIP
Pin Assignments
18 Lead Ceramic DIP
VCC A7 A8 A9 O1 O2 O3 O4 CS
18 17 16 15 14 13 12 11 10
1
2
3
4
5
6
7
8
9
A6 A5 A4 A3 A0 A1 A2 A10 Gnd
Pin 10 is also the programming pin (pp)
8
5
6
7
4
8
A0
A1
A2
A3
A10
CS
64 x 128
Memory
Matrix
1 of 32
Multiplexers
(4)
Output
Drivers (4)
10
14
13
12 11
O4
D
2
1
17 1 of 64
16 Decoder
15
3
O3
R29651DM
Part Type
A5
A6
A7
A8
A9
A4
O2
Package
Operating Temperature
Range
O1
Ordering Information
PRODUCT SPECIFICATION
R296XX/R297XX
2048 x 4 SPROM—R29653/R29653A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29653AM
R29653M
Units
ICCD
Power Down, Supply
Current (disabled)
VCC = Max, PS = VIH,
All other inputs = GND
45
45
mA
ICC
Supply Current
(Enabled)
VCC = Max
All Inputs = GND
170
170
mA
tAA2
Address Access Time
CL = 30 pF1
90
105
ns
2
Enable Access Time
R1 = 300W to VCC
95
110
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
45
45
ns
PD
Power Dissipation
(Disabled)
248
248
mW
PD
Power Dissipation
(Enabled)
935
935
mW
tEA
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Block Diagram
-55°C to +125°C
R29653DM/883B
D
-55°C to +125°C
R29653DMS
D
-55°C to +125°C
R29653ADM
D
-55°C to +125°C
R29653ADM/883B
D
-55°C to +125°C
R29653ADMS
D
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 18 Lead Ceramic DIP
Pin Assignments
5
6
7
4
8
A0
A1
A2
A3
A10
PS
64 x 128
Memory
Matrix
1 of 32
Multiplexers
(4)
Output
Drivers (4)
10
14
13
12 11
O4
D
2
1
17 1 of 64
16 Decoder
15
3
O3
R29653DM
Part Type
A5
A6
A7
A8
A9
A4
O2
Package
Operating Temperature
Range
O1
Ordering Information
18 Lead Ceramic DIP
VCC A7 A8 A9 O1 O2 O3 O4 PS
18 17 16 15 14 13 12 11 10
1
2
3
4
5
6
7
8
9
A6 A5 A4 A3 A0 A1 A2 A10 Gnd
Pin 10 is also the programming pin (pp)
9
R296XX/R297XX
PRODUCT SPECIFICATION
2048 x 8 PROM—R29681/R29681A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29681AM
R29681M
Units
180
180
mA
ICC
Power Supply Current
VCC = Max
tAA2
Address Access Time
CL = 30 pF1
85
120
ns
2
Enable Access Time
R1 = 300W to VCC
50
55
ns
3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
35
45
ns
990
990
mW
All Inputs GND
tEA
tER
PD
Power Dissipation
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being
programmed.
3. TER is guaranteed by design but not performed.
Pin Assignments
28 Terminal Leadless Chip Carrier
A5 A6 A7 NC VCC A8 A9
4 3 2 1 28 27 26
A4
A3
A2
A1
A0
NC
O1
Ordering Information
Part Type
Operating
Package Temperature Range
5
6
7
8
9
10
11
25
24
23
22
21
20
19
A16
CS1
CS2
CS3
NC
O8
O7
R29681DM
D
-55°C to +125°C
R29681DM/883B
D
-55°C to +125°C
R29681DMS
D
-55°C to +125°C
R29681LM
L
-55°C to +125°C
R29681LM/883B
L
-55°C to +125°C
VCC A8 A9 A10 CS1 CS2 CS3 O8 O7 O6 O5 O4
R29681LMS
L
-55°C to +125°C
24 23 22 21 20 19 18 17 16 15 14 13
R29681SM
S
-55°C to +125°C
R29681SM/883B
S
-55°C to +125°C
R29681SMS
S
-55°C to +125°C
R29681ADM
D
-55°C to +125°C
R29681ADM/883B
D
-55°C to +125°C
R29681ADMS
D
-55°C to +125°C
R29681ALM
L
-55°C to +125°C
R29681ALM/883B
L
-55°C to +125°C
R29681ALMS
L
-55°C to +125°C
R29681ASM
S
-55°C to +125°C
R29681ASM/883B
S
-55°C to +125°C
R29681ASMS
S
-55°C to +125°C
10
24 Lead Ceramic DIP/24 Lead Sidebrazed
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
Block Diagram
A4
A5
A6
A7
A8
A9
A10
4
3
2 1 of 128
1 Decoder
23
22
21
8
7
6
5
A0
A1
A2
A3
CS1
CS2
CS3
128 x 128
Memory
Matrix
20
19
18
1 of 16
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
L = 28 Terminal Leadless Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
Contact factory regarding flat pack package
12 13 14 15 16 17 18
O2 O3 Gnd NC O4 O5 O6
Pin 24 is also the programming pin (pp)
PRODUCT SPECIFICATION
R296XX/R297XX
2048 x 8 SPROM—R29683/R29683A
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
29683AM
R29683M
Units
ICCD
Power Down, Supply
Current (Disabled)
VCC = Max, PS = VIH,
All other inputs = GND
50
50
mA
ICC
Supply Current
(Enabled)
VCC = Max
All Inputs = GND
180
180
mA
tAA2
Address Access Time
CL = 30 pF1
85
120
ns
2
Enable Access Time
R1 = 300W to VCC
100
125
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
45
50
ns
PD
Power Dissipation
(Disabled)
275
275
mW
PD
Power Dissipation
(Enabled)
990
990
mW
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being
programmed.
3. TER is guaranteed by design but not performed.
Pin Assignments
28 Terminal Leadless Chip Carrier
A5 A6 A7 NC VCC A8 A9
4 3 2 1 28 27 26
A4
A3
A2
A1
A0
NC
O1
Ordering Information
Part Type
R29683DM
R29683DM/883B
R29683DMS
R29683LM
R29683LM/883B
R29683LMS
R29683SM
R29683SM/883B
R29683SMS
R29683ADM
R29683ADM/883B
R29683ADMS
R29683ALM
R29683ALM/883B
R29683ALMS
R29683ASM
R29683ASM/883B
R29683ASMS
Operating
Package Temperature Range
D
D
D
L
L
L
S
S
S
D
D
D
L
L
L
S
S
S
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
L = 28 Terminal Leadless Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
Contact factory regarding flat pack package
5
6
7
8
9
10
11
25
24
23
22
21
20
19
A16
PS1
PS2
PS3
NC
O8
O7
12 13 14 15 16 17 18
O2 O3 Gnd NC O4 O5 O6
Pin 24 is also the programming pin (pp)
24 Lead Ceramic DIP/24 Lead Sidebrazed
VCC A8 A9 A10 PS1 PS2 PS3 O8 O7 O6 O5 O4
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
Block Diagram
A4
A5
A6
A7
A8
A9
A10
4
3
2 1 of 128
1 Decoder
23
22
21
8
7
6
5
A0
A1
A2
A3
PS1
PS2
PS3
128 x 128
Memory
Matrix
20
19
18
1 of 16
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
tEA
11
R296XX/R297XX
PRODUCT SPECIFICATION
4096 x 8 PROM—R29771
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
R29771M
Units
190
mA
ICC
Power Supply Current
VCC = Max
tAA2
Address Access Time
CL = 30 pF1
85
ns
2
Enable Access Time
R1 = 300W to VCC
50
ns
3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
35
ns
1.05
mW
All Inputs GND
tEA
tER
PD
Power Dissipation
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being
programmed.
3. TER is guaranteed by design but not performed.
Pin Assignments
28 Terminal Leadless Chip Carrier
A5 A6 A7 NC VCC A8 A9
4 3 2 1 28 27 26
A4
A3
A2
A1
A0
NC
O1
Ordering Information
Part Type
Operating
Package Temperature Range
5
6
7
8
9
10
11
25
24
23
22
21
20
19
A16
CS1
A11
CS2
NC
O8
O7
R29771DM
D
-55°C to +125°C
R29771DM/883B
D
-55°C to +125°C
R29771DMS
D
-55°C to +125°C
R29771FM
F
-55°C to +125°C
24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/24 Lead Sidebrazed
R29771FM/883B
F
-55°C to +125°C
VCC A8 A9 A10 CS1 A11 CS2 O8 O7 O6 O5 O4
R29771FMS
F
-55°C to +125°C
24 23 22 21 20 19 18 17 16 15 14 13
R29771LM
L
-55°C to +125°C
R29771LM/883B
L
-55°C to +125°C
R29771LMS
L
-55°C to +125°C
R29771SM
S
-55°C to +125°C
R29771SM/883B
S
-55°C to +125°C
R29771SMS
S
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead Leadless Chip Carrier
L = 28 Terminal Leadless Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
12 13 14 15 16 17 18
O2 O3 Gnd NC O4 O5 O6
Pin 24 is also the programming pin (pp)
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
Block Diagram
A5
A6
A7
A8
A9
A10
A11
3
2
1 1 of 128
23 Decoder
22
21
19
8
7
6
5
4
A0
A1
A2
A3
A4
20
18
1 of 32
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
CS1
CS2
128 x 256
Memory
Matrix
12
PRODUCT SPECIFICATION
R296XX/R297XX
4096 x 8 SPROM—R29773
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
R29773M
Units
ICCD
Power Down, Supply
Current (disabled)
VCC = Max, PS = VIH,
All other inputs = GND
55
mA
ICC
Supply Current
(Enabled)
VCC = Max
All Inputs = GND
190
mA
tAA2
Address Access Time
CL = 30 pF1
85
ns
2
Enable Access Time
R1 = 300W to VCC
135
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
35
ns
PD
Power Dissipation
(Disabled)
303
mW
PD
Power Dissipation
(Enabled)
1.05
W
tEA
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being
programmed.
3. TER is guaranteed by design but not performed.
Pin Assignments
28 Terminal Leadless Chip Carrier
A5 A6 A7 NC VCC A8 A9
4 3 2 1 28 27 26
A4
A3
A2
A1
A0
NC
O1
Ordering Information
Part Type
Operating
Package Temperature Range
5
6
7
8
9
10
11
25
24
23
22
21
20
19
A16
PS1
A11
PS2
NC
O8
O7
12 13 14 15 16 17 18
O2 O3 Gnd NC O4 O5 O6
Pin 24 is also the programming pin (pp)
R29773DM
D
-55°C to +125°C
R29773DM/883B
D
-55°C to +125°C
R29773DMS
D
-55°C to +125°C
24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/
24 Lead Sidebrazed
VCC A8 A9 A10 PS1 A11 PS2 O8 O7 O6 O5 O4
R29773FM
F
-55°C to +125°C
24 23 22 21 20 19 18 17 16 15 14 13
R29773FM/883B
F
-55°C to +125°C
R29773FMS
F
-55°C to +125°C
R29773LM
L
-55°C to +125°C
R29773LM/883B
L
-55°C to +125°C
R29773LMS
L
-55°C to +125°C
R29773SM
S
-55°C to +125°C
R29773SM/883B
S
-55°C to +125°C
R29773SMS
S
-55°C to +125°C
2
3
4
5
6
7
8
9
10 11 12
Block Diagram
A5
A6
A7
A8
A9
A10
A11
3
2
1 1 of 128
23 Decoder
22
21
19
8
7
6
5
4
A0
A1
A2
A3
A4
PS1
PS2
128 x 256
Memory
Matrix
20
18
1 of 32
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead Leaded Chip Carrier
L = 28 Terminal Leadless Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
1
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
13
R296XX/R297XX
PRODUCT SPECIFICATION
8192 x 8 PROM—R29791
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
ICC
tAA
Power Supply Current
2
tEA2
tER
Test Conditions
3
VCC = Max, All Inputs GND
pF1
Units
190
mA
Address Access Time
CL = 30
95
ns
Enable Access Time
R1 = 300W to VCC
50
ns
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
30
ns
1.05
W
Power Dissipation
PD
R29791M
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Block Diagram
Operating
Package Temperature Range
Part Type
R29791DM
D
-55°C to +125°C
R29791DM/883B
D
-55°C to +125°C
R29791DMS
D
-55°C to +125°C
R29791FM
F
-55°C to +125°C
R29791FM/883B
F
-55°C to +125°C
R29791FMS
F
-55°C to +125°C
R29791SM
S
-55°C to +125°C
R29791SM/883B
S
-55°C to +125°C
R29791SMS
S
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead Leaded Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
Pin Assignments
24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/
24 Lead Sidebrazed
VCC A8 A9 A10 CS A11 A12 O8 O7 O6 O5 O4
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
14
A5
A6
A7
A8
A9
A10
A11
A12
3
2
1 1 of 256
23 Decoder
22
21
19
18
8
7
6
5
4
A0
A1
A2
A3
A4
CS
256 x 256
Memory
Matrix
20
1 of 32
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Ordering Information
PRODUCT SPECIFICATION
R296XX/R297XX
8192 x 8 SPROM—R29793
Power and AC Characteristics Over Operating Range
ICC conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3.
AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11.
Maximum Limits
Parameter
Description
Test Conditions
R29793M
Units
ICCD
Power Down, Supply
Current (disabled)
VCC = Max, PS = VIH,
All other inputs = GND
50
mA
ICC
Supply Current
(Enabled)
VCC = Max
All Inputs = GND
190
mA
tAA2
Address Access Time
CL = 30 pF1
95
ns
2
Enable Access Time
R1 = 300W to VCC
145
ns
tER3
Enable Recovery Time
R2 = 600W to GND, 16 mA Load
30
ns
PD
Power Dissipation (Disabled)
275
mW
PD
Power Dissipation (Enabled)
1.05
W
tEA
Notes:
1. See AC Test Load Circuit and Switching Waveforms.
2. Speeds are based on a minimum of 50% of the array being programmed.
3. TER is guaranteed by design but not performed.
Block Diagram
Operating
Package Temperature Range
Part Type
R29793DM
D
-55°C to +125°C
R29793DM/883B
D
-55°C to +125°C
R29793DMS
D
-55°C to +125°C
R29793FM
F
-55°C to +125°C
R29793FM/883B
F
-55°C to +125°C
R29793FMS
F
-55°C to +125°C
R29793SM
S
-55°C to +125°C
R29793SM/883B
S
-55°C to +125°C
R29793SMS
S
-55°C to +125°C
Notes:
/883B suffix denotes MIL-STD-883, Level B processing
S suffix denotes Level S processing
D = 24 Lead Ceramic DIP — .600" Body Width
F = 24 Lead Leaded Chip Carrier
S = 24 Lead Sidebrazed — .300" Body Width
A5
A6
A7
A8
A9
A10
A11
A12
3
2
1 1 of 256
23 Decoder
22
21
19
18
8
7
6
5
4
A0
A1
A2
A3
A4
PS
256 x 256
Memory
Matrix
20
1 of 32
Multiplexers
(8)
Output
Drivers (8)
9 10 111314 15 16 17
O1
O2
O3
O4
O5
O6
O7
O8
Ordering Information
Pin Assignments
24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/
24 Lead Sidebrazed
VCC A8 A9 A10 PS A11 A12 O8 O7 O6 O5 O4
24 23 22 21 20 19 18 17 16 15 14 13
1
2
3
4
5
6
7
8
9
10 11 12
A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Gnd
Pin 20 is also the programming pin (pp)
15
R296XX/R297XX
PRODUCT SPECIFICATION
AC Test Load Circuit
VCC
S1
R1
300½
Output
R2
600½
CL
Notes:
1. tAA is tested with switch S1 closed and CL = 30 pF.
2. tEA is tested with CL = 30 pF; S1 is open for high impedance to “1” test and closed for high impedance to “0” test.
3. tER, is tested with CL = 5 pF; S1 is open for “1” to high impedance test and measured at VOH-0.5V output level and is closed
for “0” to high impedance test and measured at VOL+0.5V output level.
Switching Waveforms
Keys to Timing Diagram
A0–An
CS–PS
tAA
O1–On
16
tER
tEA
3.0V
1.5V
0V
3.0V
1.5V
0V
VOH
1.5V
VOL
Waveforms Inputs
Outputs
Must be
Steady
Will be
Steady
Don’t Care.
Any Change
Permitted
Does Not
Apply
Changing State
Unknown
Center Line is
High Impedance
Off State
PRODUCT SPECIFICATION
R296XX/R297XX
Dynamic Life Test/Burn-In Circuits
In accordance with MIL-STD-883, Methods
1005/1015, Condition D:
TA = 125+10
–0 °C minimum
VCC = 5.25 ±0.25V
Square Wave Pulses on F0 to Fn are:
• 50% ±10% duty cycle
• Frequency of each address is to be
1/2 of each preceding input,
with F0 beginning at 100 kHz
(e.g., F0 = 100 kHz ±10%,
F1 = 50 kHz ±10%,
F2 = 25 kHz ±10%,
Fn = 1/2 Fn-1 ±10%, etc.)
Resistors are optional on input pins
(R = 300 ±10%)
VBB ² VCC
1
F0
1
20
F1
2
19
F8
F2
3
18
F7
F3
4
17
F6
F4
5
16
F5
6
15
F9
7
14
8
13
9
12
10
11
VBB ² VCC
VBB ² VCC
R29621/621A
R29623/623A
VCC
Dynamic Burn-In
F7
VCC
Dynamic Burn-In
24
F6
1
18
F5
2
17
F7
F8
F6
2
23
F8
F5
3
22
F9
F4
3
16
F4
4
21
F10
F3
4
15
F3
5
20
F13
F0
5
14
F2
6
19
F11
F1
6
13
F1
7
18
F12
F2
7
12
F0
8
17
F10
8
11
9
16
9
10
10
15
11
14
12
13
VBB ² VCC
VCC
Dynamic Burn-In
F9
VBB ² VCC
F11
R29651/651A
R29653/653A
R29631/631A
R29633/633A
R29681/681A
R29683/683A
R29771
R29773
R29791
R29793
17
R296XX/R297XX
PRODUCT SPECIFICATION
Static Life Test/Burn-In Circuits
In accordance with MIL-STD-883, Methods
1005/1015, Condition C:
Static Burn-In
VCC
TA = 125+10
–0 °C minimum
VCC = 5.25 ±0.25V
1
18
2
17
Resistors are optional on input pins
(R = 300W ±10%)
3
16
4
15
5
14
6
13
7
12
8
11
9
10
Static Burn-In
VCC
R29651/651A
R29653/653A
1
24
2
23
3
22
4
21
5
20
6
19
1
20
7
18
2
19
8
17
3
18
9
16
4
17
10
15
5
16
11
14
6
15
13
7
14
8
13
9
12
10
11
12
R29631/631A
R29633/633A
R29681/681A
R29683/683A
R29771
R29773
R29791
R29793
18
Static Burn-In
R29621/621A
R29623/623A
VCC
PRODUCT SPECIFICATION
R296XX/R297XX
Programming Characteristics
Address
TTL High
R296XX Series
R297XX Series
TTL Low
TR = 0.34V/µS Min. — 1.25V/µS Max.
TPP = 80 µS Min. — 110 µS Max.
TP = 1 µS Min. — 40 µS Max.
TD1 = 70 µS Min. — 90 µS Max.
TD2 = 100 nS Min.
VPP = 27V Min. — 33V Max.
VOUT = 20V Min. — 26V Max.
TR = 0.34V/µS Min. — 1.25V/µS Max.
TPP = 70 µS Min. — 120 µS Max.
TP = 20 µS Min. — 40 µS Max.
TD1 = 60 µS Min. — 100 µS Max.
TD2 = 100 nS Min.
VPP = 26V Min. — 28V Max.
VOUT = 22V Min. — 24V Max.
TPP
VPP
90%
VPP
TR
10%
TTL Low
TD2
90%
VOUT
TTL Low
TP
TR
Notes:
Output Load = 0.2 mA During 6.0V Check
Output Load = 12 mA During 4.2V Check
10%
TD1
6.0V
VCC
5.5V
4.2V
Strobe
TTL High
TTL Low
Check
Check
Programming Timing
Device Programming Inputs
(800) 247-5700
If you would like to have Fairchild Semiconductor program
your devices, please submit one of the following:
Stag Microsystems Inc. (R296XX Series)
1600 Wyatt Drive, Suite 3
Santa Clara, CA 95054
(408) 988-1118
• Two masters and truth table
• Two masters and checksum
In either case, we require customer approval prior to programming the devices.
If you need blank devices in order to supply programming
masters, please do not hesitate to contact Fairchild Semiconductor Electronics Semiconductor Division for unprogrammed samples.
Commercial Programmers
(subject to change)
Equipment must be calibrated at regular intervals. Each time
a new board or a new programming module is inserted, the
whole system should be checked. Both timing and voltages
must meet published specifications for the device.
Commercial Surface Mount Socket
Adapter Manufacturer (subject to change)
Please contact the following manufacturer for equipment
information:
Emulation Technology, Inc.
2344 Walsh Avenue, Bldg. F
Santa Clara, CA 95051
(408) 982-0660
The companies listed above are not intended to be a complete
guide of manufacturers of programmers or adapters, nor does
Fairchild Semiconductor endorse any specific company.
Please contact the following manufacturers for equipment
information:
Data I/O Corp.
10525 Willows Road, N.E.
P.O. Box 97046
Redmond, WA 98073-9746
19
R296XX/R297XX
PRODUCT SPECIFICATION
Mechanical Dimensions
24 Lead CERPACK
Inches
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
b1
c1
D
E
E1
.045
.015
.004
—
.300
—
.090
.019
.006
.640
.420
.440
1.14
.38
.10
—
7.62
—
2.29
.48
.15
16.26
10.67
11.18
e
L
Q
s1
.050 BSC
.250
.370
.026
.045
.005
—
Notes:
Notes
1. Index area: a notch or pin one identification mark shall be
located adjacent to pin one. The manufacturer's identification
shall not be used as a pin one identification mark.
4
2. Dimension Q shall be measured at the point of exit of the lead from
the body.
4
3
3. This dimension allows for off-center lid, meniscus and glass overrun.
3
1.27 BSC
6.35
9.40
.66
1.14
.13
—
4. All leads - Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish is applied.
5. Dimension s1 may be .000 (.00mm) minimum if leads number 1, 12,
13 and 24 bend toward the cavity of the package within one lead's
width from the point of entry of the lead into the body.
2
5
Note 1
b1
D
e
s1
E1
A
20
Q
L
E
c1
PRODUCT SPECIFICATION
R296XX/R297XX
Mechanical Dimensions (continued)
24 Lead Leaded Chip Carrier
Inches
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
b1
c1
D
.045
.015
.004
—
.115
.019
.006
.640
1.14
.38
.10
—
2.92
.48
.15
16.26
E
E1
E2
E3
.350
—
.180
.030
.420
.450
—
—
8.89
—
4.57
.76
10.67
11.43
—
—
e
L
Q
s1
.050 BSC
.250
.370
.026
.045
.000
—
1.27 BSC
6.35
9.40
.66
1.14
.00
—
Notes:
Notes
1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one.
The manufacturer's identification mark shall not be used as a pin one identification mark.
Alternatively, a tab (dim. K) may be used to identify pin one.
4
2. This dimension allows for off-center lid, meniscus and glass overrun.
4
2
3. The basic pin spacing is .050 (1.27mm) between centerlines. Each pin centerline shall
be located within ±.005 (.13mm) of its exact longitudinal position relative to pins 1 and 24.
2
4. All leads - Increase maximum limit by .003 (0.08mm) measured at the center of the flat,
when finish "A" is applied.
5. Twenty-two spaces.
3, 5
6. Applies to all four corners (leads number 1, 12, 13, and 24).
6
E
Note 1
K
e
b1
D
S1
E1
E
A
Q
E3
2 PL
c1
L
2 PL
E2
21
R296XX/R297XX
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
28 Terminal Leadless Chip Carrier
Symbol
Inches
Millimeters
Min.
Max.
Min.
Max.
A
A1
.060
.050
.100
.088
1.52
1.27
2.54
2.24
B1
B3
D/E
D1/E1
D2/E2
D3/E3
e
h
j
.022
.028
.006
.022
.442
.460
.300 BSC
.56
.71
.15
.56
11.23
11.68
7.62 BSC
.150 BSC
—
.460
.050 BSC
.040 REF
.020 REF
3.81 BSC
—
11.68
1.27 BSC
1.02 REF
.51 REF
L1
L2
L3
.045
.075
.003
ND/NE
N
.055
.095
.015
1.14
1.91
.08
7
28
1.40
2.41
.38
7
28
Notes:
Notes
1. The index feature for terminal 1 identification, optical orientation or
handling purposes, shall be within the shaded index areas shown on
planes 1 and 2. Plane 1, terminal 1 identification may be an extension
of the length of the metalized terminal which shall not be wider than
the B1 dimension.
3, 6
3, 6
2
2, 5
2. Unless otherwise specified, a minimum clearance of .015 inch
(0.38mm) shall be maintained between all metallized features (e.g.,
lid, castellations, terminals, thermal pads, etc.).
3. Dimension “A” controls the overall package thickness. The maximum
“A” dimension is the package height before being solder dipped.
4 The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing. The index
corner shall be clearly unique.
4
4
5. Dimension “B3” minimum and “L3” minimum and the appropriately
derived castellation length define an unobstructed three dimensional
space traversing all of the ceramic layers in which a castellation was
designed. Dimensions “B3” and “L3” maximum define the maximum
width and depth of the castellation at any point on its surface.
Measurement of these dimensions may be made prior to solder
dripping.
5
7
7
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Symbol “N” is the maximum number of terminals. Symbol “ND” and
“NE” are the number of terminals along the sides of Length “D” and
“E” respectively.
LID
E
E3
D
PLANE 1
A1
D3
(h) X 45¡
3 PLCS
4
j X 45¡
PLANE 2
A
E1
E2
e
B1
L3
D2
D1
B3
L2
L1
DETAIL“A”
22
DETAIL“A”
PRODUCT SPECIFICATION
R296XX/R297XX
Mechanical Dimensions (continued)
24 Lead Sidebrazed — .300" Body Width
Symbol
A
b1
b2
c1
D
E
e
eA
L
Q
S1
S2
Inches
Millimeters
Min.
Max.
Min.
Max.
—
.014
.045
.008
—
.220
.200
.023
.065
.015
1.280
.310
—
.36
1.14
.20
—
5.59
5.08
.58
1.65
.38
32.51
7.87
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
.005
.13
.13
2. The minimum limit for dimension "b2" may be .023 (.58mm)
for leads number 1, 12, 13, and 24 only.
7
2
7
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
—
—
Notes:
1. Index area: a notch or a pin one identification mark shall be
located adjacent to pin one. The manufacturer's identification
shall not be used as pin one identification mark.
Notes
3. Dimension "Q" shall be measured from the seating plane to the
base plane.
4. The basic pin spacing is .100 (2.54mm) between centerlines.
Each pin centerline shall be located within ±.010 (.25mm) of its
exact longitudinal position relative to pins 1 and 24.
4, 8
6
5. Applies to all four corners (leads number 1, 12, 13, and 24).
6. "eA" shall be measured at the centerline of the leads.
3
—
—
7. All leads - Increase maximum limit by .003 (.08mm) measured
at the center of the flat when lead finish is applied.
5
8. Twenty-two spaces.
D
Note 1
E
S1
eA
S2
A
L
Q
b2
e
b1
c1
23
R296XX/R297XX
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
18 Lead Ceramic Dual Inline Package (CerDIP)
Symbol
Inches
Notes:
Millimeters
Notes
Min.
Max.
Min.
Max.
A
b1
b2
c1
D
—
.014
.045
.008
—
.200
.023
—
.36
1.14
.20
—
5.08
.58
E
e
eA
L
Q
s1
a
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.070
.005
—
90¡
105¡
.065
.015
.960
1.65
.38
24.38
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.78
.13
—
90¡
105¡
8
2, 8
8
4
4
5, 9
7
3
6
1. Index area: a notch or a pin one identification mark shall be located adjacent to pin
one. The manufacturer's identification shall not be used as pin one identification mark.
2. The minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 8, 9
and 18 only.
3. Dimension "Q" shall be measured from the seating plane to the base plane.
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline
shall be located within ±.010 (.25mm) of its exact longitudinal position relative to
pins 1 and 18.
6. Applies to all four corner's (leads number 1, 8, 9, and 18).
7. "eA" shall be measured at the center of the lead bends or at the centerline of the leads
when " a " is 90¡.
8. All leads - Increase maximum limit by .003(.08mm) measured at the center of the flat,
when lead finish is applied.
9. Sixteen spaces.
D
Note 1
E
s1
eA
e
A
Q
L
b2
24
b1
a
c1
PRODUCT SPECIFICATION
R296XX/R297XX
Mechanical Dimensions (continued)
20 Lead Ceramic Dual Inline Package (CerDIP)
Symbol
Inches
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Max.
—
.200
.014
.023
.045
.065
.008
.015
—
1.060
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Millimeters
Min.
Notes:
Notes
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
25.92
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located adjacent to pin
one. The manufacturer's identification shall not be used as pin one identification mark.
2. The minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 10, 11
and 20 only.
8
2, 8
3. Dimension "Q" shall be measured from the seating plane to the base plane.
4. This dimension allows for off-center lid, meniscus and glass overrun.
8
4
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline
shall be located within ±.010 (.25mm) of its exact longitudinal position relative to
pins 1 and 20.
4
5, 9
7
6. Applies to all four corner's (leads number 1, 10, 11, and 20).
7. "eA" shall be measured at the center of the lead bends or at the centerline of the leads
when " a " is 90¡.
3
6
8. All leads - Increase maximum limit by .003(.08mm) measured at the center of the flat,
when lead finish is applied.
9. Eighteen spaces.
D
Note 1
E
s1
eA
e
A
Q
L
b2
a
c1
b1
25
R296XX/R297XX
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
24 Lead Ceramic Dual Inline Package (CerDIP) — .600" Body Width
Symbol
Inches
Min.
Max.
Min.
Max.
A
b1
b2
c1
D
—
.014
.045
.008
—
.225
.023
—
.36
1.14
.20
—
5.72
.58
E
e
eA
L
Q
s1
a
.500
.610
.100 BSC
.600 BSC
.120
.200
.015
.075
.005
—
90¡
105¡
.065
.015
1.290
Notes:
Millimeters
Notes
1.65
.38
32.77
12.70
15.49
2.54 BSC
15.24 BSC
3.05
5.08
.38
1.91
.13
—
90¡
105¡
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
8
2, 8
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 12, 13 and 24 only.
8
4
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4
5, 9
7
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 24.
6. Applies to all four corners (leads number 1, 12, 13, and 24).
3
6
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Twenty-two spaces.
D
NOTE 1
E
s1
e
eA
Q
A
a
L
b2
26
b1
c1
PRODUCT SPECIFICATION
R296XX/R297XX
Mechanical Dimensions (continued)
24 Lead Ceramic Dual Inline Package (CerDIP) — .300" Body Width
Symbol
Inches
Min.
A
b1
b2
c1
D
E
e
eA
L
Q
s1
a
Millimeters
Max.
—
.200
.014
.023
.045
.065
.008
.015
—
1.280
.220
.310
.100 BSC
.300 BSC
.125
.200
.015
.060
.005
—
90¡
105¡
Min.
Notes:
Notes
1. Index area: a notch or a pin one identification mark shall be located
adjacent to pin one. The manufacturer's identification shall not be
used as pin one identification mark.
Max.
—
5.08
.36
.58
1.14
1.65
.20
.38
—
32.51
5.59
7.87
2.54 BSC
7.62 BSC
3.18
5.08
.38
1.52
.13
—
90¡
105¡
8
2, 8
2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads
number 1, 12, 13 and 24 only.
8
4
4
5, 9
7
3. Dimension "Q" shall be measured from the seating plane to the base
plane.
4. This dimension allows for off-center lid, meniscus and glass overrun.
5. The basic pin spacing is .100 (2.54mm) between centerlines. Each
pin centerline shall be located within ±.010 (.25mm) of its exact
longitudinal position relative to pins 1 and 24.
6. Applies to all four corners (leads number 1, 12, 13, and 24).
3
6
7. "eA" shall be measured at the center of the lead bends or at the
centerline of the leads when "a" is 90¡.
8. All leads – Increase maximum limit by .003 (.08mm) measured at the
center of the flat, when lead finish applied.
9. Twenty-two spaces.
D
NOTE 1
E
s1
e
eA
Q
A
a
c1
L
b2
b1
27
R296XX/R297XX
PRODUCT SPECIFICATION
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Ó 1998 Fairchild Semiconductor Corporation