REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to table I; added RHA data. Editorial changes throughout. 94-12-22 M. L. Poelking B Changes in accordance with NOR 5962-R372-97. 97-07-08 Monica L. Poelking C Incorporate revision B. Add device type 02. Add radiation features for device type 01. Add case outline X. Add vendor CAGE number F8859. Update boilerplate to MIL-PRF-38535 requirements. – LTG 02-07-10 Thomas M. Hess REV SHEET REV C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thomas J. Ricciuti STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, QUAD BUFFER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 94-06-06 AMSC N/A REVISION LEVEL C SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 1 OF 5962-93253 25 5962-E269-02 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes B, Q, and M) and space application (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. 5962 - Federal stock class designator \ 93253 RHA designator (see 1.2.1) 01 M C X Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes B, S, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 02 1.2.3 follows: Circuit function 54AC125 54AC125 Quad buffer with three-state outputs Quad buffer with three-state outputs Device class designator. The device class designator is a single letter identifying the product assurance level as Device class M Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A B, S, Q, or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter C D X 2 Descriptive designator GDIP1-T14 or CDIP2-T14 GDFP1-F14 or CDFP2-F14 CDFP3-F14 CQCC1-N20 Terminals 14 14 14 20 Package style Dual-in-line Flat pack Flat pack Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes B, S, Q, and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) ................................................................................. DC input voltage range (VIN) ............................................................................... DC output voltage range (VOUT) .......................................................................... DC input diode current (IIK) (VIN = -0.5 V to VCC +0.5 V) ..................................... DC output diode current (IOK) (VOUT = -0.5 V to VCC +0.5 V) ............................... DC output current (IOUT) ...................................................................................... DC VCC or GND current (ICC, IGND)....................................................................... Storage temperature range (TSTG)....................................................................... Maximum power dissipation (PD) ........................................................................ Lead temperature (soldering, 10 seconds) ......................................................... Thermal resistance, junction-to-case (θJC) .......................................................... Junction temperature (TJ).................................................................................... -0.5 V dc to +6.0 V dc -0.5 V dc to VCC +0.5 V dc -0.5 V dc to VCC +0.5 V dc ±20 mA ±20 mA ±50 mA ±50 mA time the number of outputs -65°C to +150°C 500 mW +300°C See MIL-STD-1835 +175°C 1.4 Recommended operating conditions. 2/ 3/ 4/ Supply voltage range (VCC) ................................................................................. Input voltage range (VIN) ..................................................................................... Output voltage range (VOUT)................................................................................ Maximum low level input voltage (VIL)................................................................. +3.0 V dc to +5.5 V dc +0.0 V dc to VCC +0.0 V dc to VCC 0.90 V dc at VCC = 3.0 V dc 1.08 V dc at VCC = 3.6 V dc 1.35 V dc at VCC = 4.5 V dc 1.65 V dc at VCC = 5.5 V dc Minimum high level input voltage (VIH) ................................................................ 2.10 V dc at VCC = 3.0 V dc 2.52 V dc at VCC = 3.6 V dc 3.15 V dc at VCC = 4.5 V dc 3.85 V dc at VCC = 5.5 V dc Case operating temperature range (TC) .............................................................. -55°C to +125°C Input edge rate (∆V/∆t) minimum: (VIN from 30% to 70% of VCC) .......................................................................... 125 mV/ns Maximum low level output current (IOL) ............................................................... 12 mA at VCC = 3.0 V and 3.6 V 24 mA at VCC = 4.5 V and 5.5 V Maximum high level output current (IOH) ............................................................. -12 mA at VCC = 3.0 V and 3.6 V -24 mA at VCC = 4.5 V and 5.5 V 1.5 Radiation features. Maximum total dose available (dose rate = 50 – 300 rads (Si)/s): Device type 01 .................................................................................................. 100 Krads (Si) 2 Single Event Latch-up (SEL)................................................................................ ≥ 100 MeV-cm /mg 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55°C to +125°C. 4/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back up systems. Data retention implies no input transitions and no stored data loss with the following conditions: VIH ≥ 70 percent of VCC, VIL ≤ 30 percent of VCC, VOH ≥ 70 percent of VCC at –20 µA, VOL ≤ 30 percent of VCC at 20 µA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standardized for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. JEDEC Standard No. 17 - Standardized for Description of Latch-up in CMOS Integrated Circuits. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Blvd, Arlington, VA 22201-3834). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 4 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes B, S, Q, and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. Test conditions for these specified characteristics and limits are as specified in table I. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes B, S, Q, and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes B, S, Q, and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes B, S, Q, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes B, S, Q, and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 5 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ High level output voltage 3006 Symbol VOH1 6/ VOH2 6/ VOH3 7/ 8/ Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOH = -50 µA VCC Group A subgroups Limits 5/ 3.0 V 1, 2, 3 Min 2.9 4.5 V 1, 2, 3 4.4 5.5 V 1, 2, 3 5.4 1 5.4 Unit Max V All All All All For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND V All All IOH = -50 µA M D 01 B, S, Q, V 5.4 5.4 P, L, R VOH4 6/ For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOH = -12 mA VOH5 7/ 8/ For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOH = -24 mA 3.0 V 1, 2, 3 2.4 V 4.5 V 1, 2, 3 3.7 V 1 3.7 All All All All M D 01 B, S, Q, V 3.7 P, L, R VOH6 6/ 3.7 5.5 V For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOH = -24 mA 1, 2, 3 4.7 V All All See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 6 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ High level output voltage 3006 Symbol VOH7 7/ 8/ 9/ Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC 5.5 V For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOH = -50 mA Group A subgroups 1, 2, 3 Min 3.85 1 3.85 D 01 B, S, Q, V VOL2 6/ VOL3 7/ 8/ V 3.85 P, L, R VOL1 6/ Max All All M Low level output voltage 3007 Unit Limits 5/ For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOL = 50 µA 3.85 3.0 V 1, 2, 3 0.1 4.5 V 1, 2, 3 01 5.5 V 1, 2, 3 0.1 1 0.1 V All All All All For all inputs affecting output under test VIN = VIH or VIL V V All All For all other inputs VIN = VCC or GND IOL = 50 µA M D 01 B, S, Q, V 0.1 0.1 P, L, R VOL4 6/ For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOL = 12 mA All B, S, Q, V 4.5 V All M 1, 3 0.4 2 0.5 1 0.4 2, 3 0.5 V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 7 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Low level output voltage 3007 Symbol VOL5 7/ 8/ Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOL = 24 mA All B, S, Q, V 4.5 V Group A subgroups Min M D Max 1, 3 0.4 2 0.5 1 0.4 2, 3 0.5 1 0.4 All M 01 B, S, Q, V VOL7 7/ 8/ 9/ 0.4 All B, S, Q, V For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOL = 24 mA 5.5 V 1, 3 0.4 2 0.5 1 0.4 2, 3 0.5 1, 2, 3 1.65 1 1.65 All M All B, S, Q, V For all inputs affecting output under test VIN = VIH or VIL For all other inputs VIN = VCC or GND IOL = 50 mA M D 5.5 V 01 B, S, Q, V VIC+ 7/ 8/ 1.65 All B, S, Q, V For input under test IIN = 1 mA M D GND 01 B, S, Q, V 1 0.4 1.5 1 0.4 1.5 0.4 1.5 0.4 1.5 1 -0.4 -1.5 1 -0.4 -1.5 -0.4 -1.5 -0.4 -1.5 P, L, R Negative input clamp voltage 3022 VIC7/ 8/ All B, S, Q, V For input under test IIN = -1 mA M D V 1.65 P, L, R Positive input clamp voltage 3022 V 0.4 P, L, R VOL6 6/ Unit Limits 5/ Open 01 B, S, Q, V P, L, R V V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 8 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Symbol Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC For input under test VIN = VCC For all other inputs VIN = VCC or GND All B, S, Q, V 5.5 V Group A subgroups Min Input current high 3010 IIH 7/ 8/ All M M D 1 Max 0.1 2 1.0 1 0.1 2, 3 1.0 1 0.1 01 B, S, Q, V IIL 7/ 8/ For input under test VIN = GND For all other inputs VIN = VCC or GND 0.1 All B, S, Q, V 5.5 V All M M D 1 -0.1 2 -1.0 1 -0.1 2, 3 -1.0 1 -0.1 01 B, S, Q, V IOZH 7/ 8/ 10/ VOUT = VCC An = VIH For all other inputs VIN = VCC or GND -0.1 All B, S, Q, V 5.5 V All M M D IOZL 7/ 8/ 10/ VOUT = GND An = VIH For all other inputs VIN = VCC or GND 0.5 2 10.0 1 0.5 2, 3 10.0 1 25.0 01 B, S, Q, V 25.0 25.0 All B, S, Q, V All M M D µA 1 P, L, R Three-state output leakage current low 3020 µA -0.1 P, L, R Three-state output leakage current high 3021 µA 0.1 P, L, R Input current low 3009 Unit Limits 5/ 5.5 V µA 1 -0.5 2 -10.0 1 -0.5 2, 3 -10.0 1 -25.0 01 B, S, Q, V -25.0 -25.0 P, L, R See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 9 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Symbol Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC All All All All All All GND 4 Max 10.0 pF 5.5 V 4 15.0 pF 5.0 V 4 70.0 pF 5.5 V 1 2.0 Group A subgroups Min Input capacitance 3012 Output capacitance 3012 Power dissipation capacitance CIN Quiescent supply current, outputs high 3005 ICCH 7/ 8/ See 4.4.1c TC = +25° COUT CPD 11/ Outputs open An = GND For all other inputs VIN = VCC or GND All B, S, Q, V All M M D 2 40.0 1 8.0 2, 3 160.0 1 15.0 01 B, S, Q, V ICCL 7/ 8/ Outputs open An = GND For all other inputs VIN = VCC or GND 700.0 All B, S, Q, V 5.5 V All M M D 1 2.0 2 40.0 1 8.0 2, 3 160.0 1 15.0 01 B, S, Q, V ICCZ 7/ 8/ 10/ Outputs open An = VCC For all other inputs VIN = VCC or GND 700.0 All B, S, Q, V 5.5 V All M M D 1 2.0 2 40.0 1 8.0 2, 3 160.0 1 15.0 01 B, S, Q, V VGBL 12/ High level ground bounce noise VGBH 12/ VLD = 2.5 V IOL = +24 mA see figure 4 VLD = 2.5 V IOH = -24 mA see figure 4 µA 100.0 700.0 P, L, R Low level ground bounce noise µA 100.0 P, L, R Quiescent supply current, outputs three-state 3005 µA 100.0 P, L, R Quiescent supply current, outputs low 3005 Unit Limits 5/ All B, S, Q, V 4.5 V 4 1500 mV All B, S, Q, V 4.5 V 4 1500 mV See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 10 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Symbol Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Vover = 10.5 V tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Itrigger = +120 mA All B, S, Q, V 5.5 V 2 Max 200 mA Al B, S, Q, V 5.5 V 2 200 mA Group A subgroups Limits 5/ Min Unit Latch-up input/ output overvoltage ICC (O/V1) 13/ Latch-up input/ output positive over-current ICC (O/I1+) 13/ Latch-up input/ output negative over-current ICC (O/I1-) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Itrigger = -120 mA All B, S, Q, V 5.5 V 2 200 mA Latch-up supply over-voltage ICC (O/V2) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Vover = 9.0 V All B, S, Q, V 5.5 V 2 100 mA Truth table test, output voltage 3014 7/ 8/ 14/ For all inputs VIN = VIH or VIL Verify output VOUT See 4.4.1e All All 3.0 V 7, 8 L H 7 L H L H L H 7, 8 L H 7 L H L H L H M D 01 B, S, Q, V P, L, R For all inputs VIN = VIH or VIL Verify output VOUT See 4.4.1e All All M D 4.5 V 01 B, S, Q, V P, L, R See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 11 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Propagation delay time, data to output, Bn to On 3003 Symbol tPHL, tPLH 7/ 8/ 15/ 16/ Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC CL = 50 pF minimum All B, S, Q, V 3.0 V RL = 500Ω See figure 5 Group A subgroups 9, 11 Min 1.0 Max 9.0 10 1.0 10.0 9 1.0 9.0 10, 11 1.0 10.0 9 1.0 9.0 1.0 9.0 1.0 9.0 9, 11 1.0 7.0 10 1.0 8.5 9 1.0 7.0 10, 11 1.0 8.5 9 1.0 7.0 All M M D 01 B, S, Q, V P, L, R All B, S, Q, V 4.5 V All M M D 01 B, S, Q, V 1.0 7.0 1.0 7.0 9, 11 1.0 10.0 10 1.0 11.0 9, 1.0 10.0 10, 11 1.0 11.0 9 1.0 10.0 1.0 10.0 P, L, R Propagation delay time, output enable An to On 3003 tPZH, tPZL 7/ 8/ 15/ 16/ CL = 50 pF minimum All B, S, Q, V RL = 500Ω See figure 5 3.0 V All M M D 01 B, S, Q, V 1.0 10.0 9, 11 1.0 8.0 10 1.0 8.5 9 1.0 8.0 10, 11 1.0 8.5 9 1.0 8.0 P, L, R All B, S, Q, V 4.5 V All M M D Limits 5/ 01 B, S, Q, V P, L, R 1.0 8.0 1.0 8.0 Unit ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 12 TABLE I. Electrical performance characteristics – Continued. Test and MIL-STD-883 test method 1/ Propagation delay time, output disable An to On 3003 Symbol tPHZ, tPLZ 7/ 8/ 15/ 16/ Conditions -55°C ≤ TC ≤ +125°C 2/ 3/ 3.0 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type 4/ and device class VCC CL = 50 pF minimum All B, S, Q, V 3.0 V RL = 500Ω See figure 5 Group A subgroups 9, 11 Min 1.0 Max 10.0 10 1.0 11.0 9, 1.0 10.0 10, 11 1.0 11.0 9 1.0 10.0 1.0 10.0 1.0 10.0 9, 11 1.0 9.0 10 1.0 9.5 9 1.0 9.0 10, 11 1.0 9.5 9 1.0 9.0 1.0 9.0 1.0 9.0 All M M D 01 B, S, Q, V P, L, R All B, S, Q, V 4.5 V All M M D Limits 5/ 01 B, S, Q, V P, L, R Unit ns 1/ For tests not listed in the referenced MIL-STD-883 [e.g. ICC (O/V1)], utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested as applicable, to the tests in table I herein. 2/ Each input/output, as applicable, shall be tested at the specified temperature for the specified limits. Output terminals not designated shall be high level logic, low level logic, or open, except as follows: a. VIC (pos) tests, the GND terminal can be open. TC = +25°C. b. VIC (neg) tests, the VCC terminal shall be open. TC = +25°C. c. For all ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter. The values to be used for VIH and VIL shall be the VIH minimum and VIL maximum values listed in section 1.4 herein. All devices shall meet the limits specified in table I, as applicable, at 3.0 V ≤ VCC ≤ 3.6 V and 4.5 V ≤ VCC ≤ 5.5 V. 3/ Device type 01 supplied to this SMD is tested at all levels M, D, P, L, and R of irradiation. Pre and post irradiation values are identical unless otherwise specified in table I. 4/ The word "All" in the device type and device class column, means non-RHA limits for all device types and classes. Whereas M, D, P, L, and R in the conditions column are postirradiation limits for those device types and classes specified in the device type and device class column. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 13 TABLE I. Electrical performance characteristics – Continued. 5/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 6/ For device classes B, S, Q, and V, this test is guaranteed, if not tested, to the limits specified in table I. 7/ RHA samples do not have to be tested at -55°C and +125°C postirradiation. 8/ When performing postirradiation electrical measurements for RHA level, TA = +25°C. Limits shown are guaranteed at TA = +25°C ±5°C. 9/ Transmission driving tests are performed at VCC = 5.5 V dc with a 2 ms duration maximum. This test may be performed using VIN = VCC or GND. When VIN = VCC or GND is used, the test is guaranteed for VIN = VIH or VIL. 10/ Three-state output conditions are required. 11/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC). The dynamic current consumption, IS = (CPD + CL) VCCf + ICC. For both PD and IS: f is the frequency of the input signal. 12/ This test is for qualification only. Ground bounce tests are performed on a nonswitching (quiescent) output and are used to measure the magnitude of induced noise caused by other simultaneously switching outputs. The test is performed on a low noise bench test fixture with all outputs fully dc loaded (IOL maximum and IOH maximum = i.e., ±24 mA) and 50 pF of load capacitance (see figure 4). The loads must be located as close as possible to the device output. Inputs are then conditioned with 1 MHz pulse (tr = tf = 3.5 ±1.5 ns) switching simultaneously and in phase such that one output is forced low and all others (possible) are switched. The low level ground bounce noise is measured at the quiet output using a F.E.T. oscilloscope probe with at least 1 MΩ impedance. Measurement is taken from the peak of the largest positive pulse with respect to the nominal low level output voltage (see figure 4). The device inputs are then conditioned such that the output under test is at a high nominal VOH level. The high level ground bounce measurement is then measured from nominal VOH level to the largest negative peak. This procedure is repeated such that all outputs are tested at a high and low level with a maximum number of outputs switching. 13/ See JEDEC STD. 17 for electrically induced latch-up test methods and procedures. The values listed for Vtrigger, Itrigger, and Vover, are to be accurate within ±5 percent. 14/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. For VCC = 4.5 V and 5.5 V, H ≥ 2.5 V and L < 2.5 V. For VCC = 3.0 V and 3.6 V, H ≥ 1.5 V and L < 1.5 V. Alternatively, for any value of VCC, H ≥ 0.50VCC and L < 0.50VCC are acceptable. For all device classes, functional tests at VCC = 3.0 V, 3.6 V, and 5.5 V are guaranteed, if not tested. Tests at VCC = 3.0 V are required for RHA specified devices only (TA = +25°C ±5°C). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 14 TABLE I. Electrical performance characteristics – Continued. 15/ Device classes B, S, Q, and V are tested at VCC = 3.0 V and VCC = 4.5 V at TC = +125°C for sample testing and at VCC = 3.0 V and VCC = 4.5 V at TC = +25°C for screening. Other voltages of VCC and temperatures are guaranteed, if not tested, see 4.4.1d. 16/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. AC limits at VCC = 3.6 V are equal to the limits at VCC = 3.0 V and guaranteed by testing at VCC = 3.0 V. Minimum ac limits for VCC = 5.5 V and VCC = 3.6 V are 1.0 ns. The minimum ac limits at VCC = 3.0 V, 3.6 V, and 5.5 V are guaranteed by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. For propagation delay tests, all paths must be tested. Device types 01 and 02 Case outlines C, D, X Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2 Terminal symbol NC A0 B0 O0 NC A1 NC B1 O1 GND NC O3 B3 A3 NC O2 NC B2 A2 VCC A0 B0 O0 A1 B1 O1 GND O3 B3 A3 O2 B2 A2 VCC ------------------- NC = No connection PIN Description Terminal Symbol Description An (n = 0 to 3) Output enable control inputs Data inputs Three-state outputs Bn (n = 0 to 3) On (n = 0 to 3) FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 15 Inputs An L L H Outputs Bn L H X On L H Z H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance FIGURE 2. Truth table. FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 16 NOTE: Resistor and capacitor tolerance = ±10% FIGURE 4. Ground bounce waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 17 NOTES: 1. When measuring tPLZ and tPZL: Vtest = 2 x VCC. 2. When measuring tPHZ, tPZH, tPLH and tPHL: Vtest = open. 3. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 4. RL = 500Ω or equivalent. 5. RT = 50Ω or equivalent. 6. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR ≤ 10 MHz; tr ≤ 2.5 ns; tf ≤ 2.5 ns; tr and tf shall be measured from 10% of VCC to 90% of VCC, and 90% of VCC to 10% of VCC, respectively; duty cycle = 50%. 7. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 8. The outputs are measured one at a time with one transition per measurement. FIGURE 5. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 18 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes B, S, Q, and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes B, S, Q, and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device classes M, B, and S. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA = +125°C, minimum. (3) Delete the sequence specified in 3.1.10 through 3.1.14 of method 5004 and substitute the first 7 test requirements of table II herein. (4) For device class M, unless otherwise specified, the requirements for device class B in method 1015 of MIL-STD-883 shall be followed. (5) Static burn-in, device classes B and S, test condition A, test method 1015 of MIL-STD-883 (unless otherwise specified in the QM plan). Test duration for each static test shall be 24 hours minimum for class S devices and in accordance with table I of method 1015 for class B devices. (6) (a) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors R1 are optional on both inputs and open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ. (b) For static burn-in II, all inputs shall be connected through the R1 resistors to VCC. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors R1 are optional on open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ. (c) VCC = 5.5 V +0.5 V, -0.00 V. Dynamic burn-in, device classes B and S, test condition D, method 1015 of MIL-STD-883 (unless otherwise specified in the QM plan). (a) Input resistors = 220Ω to 2 kΩ ±20 percent. (b) Output resistors = 220Ω ±20 percent. (c) VCC = 5.5 V +0.5 V, -0.00 V. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 19 (d) Each Bn input shall be connected through the resistors in parallel to a common clock pulse (CP). Each An input shall be connected through a resistor to GND. Each output shall be connected through resistor to VCC/2 ±0.5 V. (e) CP = 25 kHz to 1 MHz square wave; duty cycle = 50 percent ±15 percent; VIH = 4.5 V to VCC, VIL = 0 V ±0.5 V; tr, tf ≤ 100 ns. b. Interim and final electrical test parameters shall be as specified in table II herein. c. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements may, at the manufacturer's option, be performed separately or included in the final electrical parameter requirements. 4.2.2 Additional criteria for device classes B, S, Q, and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class S or V beyond the requirements of device class B or Q shall be as specified in MIL-PRF-38535, appendix B. 4.2.3 Percent Defective Allowable (PDA). a. The PDA for class S or V devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in, based on the exact number of devices submitted to each separate burn-in. b. Static burn-in I and II failures shall be cumulative for determining the PDA. c. The PDA for class B or Q devices shall be in accordance with MIL-PRF-38535 for static burn-in. Dynamic burn-in is not required. d. The PDA for class M devices shall be in accordance with MIL-PRF-38535, appendix A for static burn-in and dynamic burn-in. e. Those devices whose measured characteristics, after burn-in, exceed the specified delta limits or electrical parameter limits specified in table I, subgroup 1, are defective and shall be removed from the lot. The verified number of failed devices times 100 divided by the total number of devices in the lot initially submitted to burn-in shall be used to determine the percent defective for the lot and the lot shall be accepted or rejected based on the specified PDA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 20 4.3 Qualification inspection. 4.3.1 Qualification inspection for device classes B, S, Q, and V. Qualification inspection for device classes B, S, Q, and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). 4.4 Conformance inspection. Technology conformance inspection for classes B, S, Q, and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). TABLE II. Electrical test requirements. Test requirements, MIL-STD-883 test method Interim electrical parameters, method 5004 Static burn-in I, method 1015 (see 4.2.1a) Interim electrical parameters, method 5004 (see 4.2.1b) Static burn-in II, method 1015 (see 4.2.1a) Interim electrical parameters, method 5004 (see 4.2.1b) Dynamic burn-in I, method 1015 (see4.2.1a) Interim electrical parameters, method 5004 (see 4.2.1b) Final electrical parameters, method 5004 (see 4.2) Group A test requirements, method 5005 (see 4.4) Subgroups 1/ (in accordance with MIL-STD-883, method 5005, table I) Device class M Subgroups 1/ (in accordance with MIL-PRF-38535, table III) Device 2/ class B 1 Device 2/ class S 1 Device class Q 1 Device class V 1 3/ Not required Required 4/ 1 5/ Not required Required 4/ 1 5/ 3/ Required 6/ 1 2/ 5/ Required 4/ 1 2/ 5/ Required 6/ 1 2/ 5/ Required 4/ 1 2/ 5/ 3/ Not required Required 4/ 1 5/ Not required Required 4/ 1 5/ 2/ 1, 2, 3, 7, 8, 9 2/ 6/ 1, 2, 7, 9 2/ 1, 2, 7, 9 2/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 5/ 1, 2, 3, 7, 8, 9, 10, 11 2/ 6/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 5/ 1, 2, 3 5/ 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3 Group B end-point electrical parameters, method 5005 (see 4.4) Group C end-point electrical parameters, method 5005 (see 4.4) Group D end-point electrical parameters, method 5005 (see 4.4) Group E end-point electrical parameters, method 5005 (see 4.4) 1, 2, 3 5/ 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 7, 9 See footnotes on next page. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 21 TABLE II. Electrical test requirements - Continued. 1/ Blank spaces indicate tests are not applicable. 2/ PDA applies to subgroup 1 (see 4.2.3). For device classes S and V, PDA applies to subgroups 1 and 7 (see 4.2.3). 3/ The burn-in shall meet the requirements of 4.2.1a herein. 4/ On all class S lots, the device manufacturer shall maintain read-and-record data (as a minimum on disk) for burn-in electrical parameters (group A, subgroup 1), in accordance with test method 5004 of MIL-STD-883. For preburn-in and interim electrical parameters the read-and-record requirements are for delta measurements only. 5/ Delta limits shall be required only on table I, subgroup 1. The delta values shall be computed with reference to the previous interim electrical parameters. The delta limits are specified in table III. 6/ The device manufacturer may at his option either complete subgroup 1 electrical parameter measurements, including delta measurements, within 96 hours after burn-in completion (removal of bias; or may complete subgroup 1 electrical measurements without delta measurements within 24 hours after burn-in completion (removal of bias). When the manufacturer elects to perform the subgroup 1 electrical parameter measurements without delta measurements, there is no requirement to perform the pre-burn-in electrical tests (first interim electrical parameters test in table II). 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Latch-up and ground bounce tests are required for device classes B, S, Q, and V. These tests shall be performed only for initial qualification and after process or design changes which may affect the performance of the device. Latch-up tests shall be considered destructive. For latch-up and ground bounce tests, test all applicable pins on five devices with zero failures. c. CIN, COUT, and CPD shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN and COUT shall be measured between the designated terminal and GND at a frequency of 1MHz. CPD shall be tested in accordance with the latest revision of JEDEC Standard No. 20 and table I herein. For CIN, COUT, and CPD, test all applicable pins on five devices with zero failures. d. For device classes B, S, Q, and V, subgroups 9 and 11 tests shall be measured only for initial qualification and after process or design changes which may affect dynamic performance. e. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table on figure 2 herein. The test vectors used to verify the truth table shall test all possible input to output logic patterns. For device classes B, S, Q, and V, subgroups 7 and 8 shall include verifying the functionality of the device. 4.4.2 Group B inspection. When applicable, the group B inspection end-point electrical parameters shall be as specified in table II herein. For device class S steady-state life tests, the test shall be maintained by the manufacturer and shall be made available to the acquiring or preparing activity upon request. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 22 4.4.3 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.3.1 Additional criteria for device class M . Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. b. TA = +125°C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.3.2 Additional criteria for device classes B, S, Q, and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.4 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.5 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes B, S, Q, and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. d. RHA tests for device classes M, B, S, Q, and V for levels M, D, P, L, and R shall be performed through each level to determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial qualification and after design or process changes which may affect the RHA performance of the device. e. Prior to irradiation, each selected sample shall be assembled in its qualified package. It shall pass the specified group A electrical parameters in table I for subgroups specified in table II herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 23 TABLE III. Burn-in and operating life test delta parameters (+25°C). Parameter 1/ Supply current Input current low level Input current high level Output voltage low level VCC = 5.5 V IOL = 24 mA Output voltage high level VCC = 5.5 V IOH = -24 mA Symbol ICCH, ICCL, ICCZ IIL IIH VOL Device types 01 02 02 02 02 Delta Limits ±100 nA 2/ ±300 nA ±20 nA ±20 nA ±0.04 V VOH 02 ±0.20 V 1/ These parameters shall be recorded before and after the required burn-in and life test to determine delta limits. 2/ Guaranteed, if not tested. 4.4.5.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883, method 1019, and as specified herein. Prior to and during total dose irradiation characterization and testing, the devices for characterization shall be biased so that 50 percent are at inputs high and 50 percent are at inputs low, and the devices for testing shall be biased to the worst case condition established during characterization. Devices shall be biased as follows: a. Inputs tested high, VCC = 5.5 V dc ±5%, RCC = 10Ω ±20%, VIN = 5.0 V dc +5%, RIN = 1 kΩ ±20%, and all outputs are open. b. Inputs tested low, VCC = 5.5 V dc ±5%, RCC = 10Ω ±20%, VIN = 0.0 V dc, RIN = 1 kΩ ±20%, and all outputs are open. 4.4.5.1.1 Accelerated aging test. Accelerated aging shall be performed on classes M, B, S, Q, and V devices requiring an RHA level greater than 5k rads (Si). The post-anneal end point electrical parameter limits shall be as specified in table I herein and shall be the preirradiation end point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes B, S, Q, and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device classes B and Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 24 6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes B, S, Q, and V. Sources of supply for device classes B, S, Q, and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-93253 A REVISION LEVEL C SHEET 25 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 02-07-10 Approved sources of supply for SMD 5962-93253 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9325301B2A 27014 JM54AC125B2A 5962-9325301BCA 27014 JM54AC125BCA 5962-9325301BDA 27014 JM54AC125BDA 5962-9325301S2A 3/ JM54AC125S2A 5962-9325301SCA 3/ JM54AC125SCA 5962-9325301SDA 3/ JM54AC125SDA 5962R9325301B2A 27014 JM54AC125B2A-RH 5962R9325301BCA 27014 JM54AC125BCA-RH 5962R9325301BDA 27014 JM54AC125BDA-RH 5962R9325301S2A 27014 JM54AC125S2A-RH 5962R9325301SCA 27014 JM54AC125SCA-RH 5962R9325301SDA 27014 JM54AC125SDA-RH 5962-9325302QXA F8859 54AC125K02Q 5962-9325302QXC F8859 54AC125K01Q 5962-9325302VXA F8859 54AC125K02V 5962-9325302VXC F8859 54AC125K01V See footnotes on next sheet. 1 of 2 STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ No longer available from an approved source of supply. Vendor CAGE number Vendor name and address 27014 National Semiconductor 2900 Semiconductor Drive P. O. Box 58090 Santa Clara, CA 95052-8090 F8859 STMicroelectronics 3 rue de Suisse BP4199 35041 RENNES cedex2-FRANCE The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. 2 of 2