PD - 9.1234
IRFPC60LC
HEXFET ® Power MOSFET
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30V V gs Rating
Reduced C iss, Coss, Crss
Isolated Central Mounting Hole
Dynamic dv/dt Rated
Repetitive Avalanche Rated
VDSS = 600V
RDS(on) = 0.40 Ω
ID = 16A
Description
This new series of Low Charge HEXFET Power MOSFETs achieve significantly
lower gate charge over conventional MOSFETs. Utilizing advanced Hexfet
technology the device improvements allow for reduced gate drive requirements,
faster switching speeds and increased total system savings. These device
improvements combined with the proven ruggedness and reliability of HEXFETs
offer the designer a new standard in power transistors for switching applications.
The TO-247 package is preferred for commercial-industrial applications where
higher power levels preclude the use of TO-220 devices. The TO-247 is similar
but superior to the earlier TO-218 package because of its isolated mounting hole.
Absolute Maximum Ratings
Parameter
ID @ T C = 25°C
ID @ T C = 100°C
IDM
PD @T C = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, V GS @ 10V
Continuous Drain Current, V GS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
Units
16
10
64
280
2.2
±30
1000
16
28
3.0
-55 to + 150
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
0.24
––––
0.45
––––
––––
°C/W
40
Revision 0
IRFPC60LC
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(ON)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
600
–––
–––
2.0
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.63
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
17
57
43
38
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, I D = 1mA
0.40
Ω
VGS = 10V, I D = 9.6A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 9.6A
25
VDS = 600V, VGS = 0V
µA
250
VDS = 480V, VGS = 0V, T J = 125°C
100
VGS = 20V
nA
-100
VGS = -20V
120
ID = 16A
29
nC
VDS = 360V
48
VGS = 10V, See Fig. 6 and 13
–––
VDD = 300V
–––
ID = 16A
ns
–––
RG = 4.3Ω
–––
RD = 18Ω, See Fig. 10
Between lead,
––– 5.0 –––
6mm (0.25in.)
nH
from package
––– 13
–––
and center of die contact
––– 3500 –––
VGS = 0V
––– 400 –––
pF
VDS = 25V
––– 39 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
16
–––
–––
64
–––
–––
–––
–––
650
6.0
1.8
980
9.0
A
V
ns
µC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, I S = 16A, V GS = 0V
TJ = 25°C, I F = 16A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 16A, di/dt ≤ 140A/µs, V DD ≤ V(BR)DSS,
T J ≤ 150°C
VDD = 25V, starting T J = 25°C, L = 7.2mH
R G = 25Ω, IAS = 16A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
S+LD)
IRFPC60LC
1 00
1 00
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
10
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
10
BOTTOM 4.5V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
1
0.1
4.5V
20µs PULSE WIDTH
TC = 25°C
0.01
0.01
0.1
V
DS
1
10
100
4.5V
1
0.1
, Drain-to-Source Voltage (V)
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , D rain-to-So urce Cu rre nt (A )
T J = 15 0°C
10
T J = 2 5°C
0.1
V D S = 1 0 0V
2 0 µ s P U LS E W ID TH
4
5
6
7
8
9
V G S , G a te-to-S o urce V olta ge (V )
Fig 3. Typical Transfer Characteristics
DS
1
10
100
, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics,
TC = 150oC
100
0.01
0.1
V
Fig 1. Typical Output Characteristics,
TC = 25oC
1
20µs PULSE WIDTH
TC = 150°C
0.01
0.01
3.0
I D = 16A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
10
-60
-40
-20
0
20
40
60
80
100 120 140 1 60
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFPC60LC
20
7 00 0
5 00 0
4 00 0
Ciss
3 00 0
2 00 0
I D = 16A
V
= 360V
DS
V DS = 240V
V DS = 120V
16
12
8
4
V
GS
C, Capacitance (pF)
6 00 0
, Gate-to-Source Voltage (V)
V GS = 0V,
f = 1MHz
Ciss = Cgs + C gd , Cds SHORTED
Crss = C gd
Coss = C ds + C gd
1 00 0
Coss
Crss
0
1
FOR TEST CIRCUIT
SEE FIGURE 13
0
10
0
1 00
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
60
90
12 0
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
30
QG , Total Gate Charge (nC)
V DS, Drain-to-Source Voltage (V)
TJ = 150°C
TJ = 25°C
100
10µs
100µs
10
1ms
VGS = 0V
1
0
0.4
0.8
1.2
1.6
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
T C = 25°C
T J = 150°C
Single Pulse
1
2
1
10
10ms
100
1000
100 00
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRFPC60LC
RD
VDS
VGS
16
D.U.T.
RG
ID, Drain Current (Amps)
VDD
12
10 V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
0
25
50
75
100
125
150
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
T herm al R esponse (Z thJC )
1
D = 0 .5 0
0.1
0 .2 0
0 .1 0
0 .0 5
PD M
0 .0 2
0.01
0 .0 1
t
S IN G L E P UL SE
(T H E R M AL R E S P O N S E )
t
N o te s :
1 . D u ty fa c to r D = t
0.001
0.00001
1
1
/ t
2
2
2 . P e a k TJ = P D M x Z th J C + T C
0.0001
0.001
0.01
0 .1
1
t 1 , R ectangular Pulse D uration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
10
10 V
Fig 12a. Unclamped Inductive Test Circuit
E AS , Single Pulse Avalanche Energy (mJ)
IRFPC60LC
2400
ID
7.2A
10A
BOTTOM 16A
TOP
2000
1600
1200
800
400
0
VDD = 50V
25
50
75
100
125
Starting TJ , Juntion Temperature (°C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
150
IRFPC60LC
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
RG
•
•
•
•
dv/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRFPC60LC
Package Outline
TO-247AC
Part Marking Information
TO-247AC
EXAMPLE : THIS IS AN IRFPE30
WITH ASSEMBLY
LOT CODE 3A1Q
A
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFPE30
3A1Q 9302
ASSEMBLY
LOT CODE
DATE CODE
(YYWW)
YY = YEAR
WW WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145
10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR
SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371
Data and specifications subject to change without notice.