IRF IRF737LC

PD - 9.1314
IRF737LC
PRELIMINARY
HEXFET® Power MOSFET
Reduced Gate Drive Requirement
Enhanced 30V VGS Rating
Reduced CISS, COSS, CRSS
Extremely High Frequency Operation
Repetitive Avalanche Rated
VDSS = 300V
RDS(on) = 0.75Ω
ID = 6.1A
Description
This new series of Low Charge HEXFETs achieve
significantly lower gate charge over conventional MOSFETs.
Utilizing the new LCDMOS technology, the device
improvements are achieved without added product cost,
allowing for reduced gate drive requirements and total
system savings. In addition, reduced switching losses and
improved efficiency are achievable in a variety of high
frequency applications. Frequencies of a few MHz at high
current are possible using the new Low Charge MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that are characteristics of
HEXFETs offer the designer a new standard in power
transistors for switching applications.
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, V GS @ 10V
Continuous Drain Current, V GS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
6.1
3.9
24
74
0.59
±30
120
6.1
7.4
3.4
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
1.7
––––
62
°C/W
IRF737LC
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
300
–––
–––
2.0
2.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Typ.
–––
0.391
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
6.6
21
13
12
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, I D = 1mA
0.75
Ω
VGS = 10V, ID = 3.7A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 3.7A
25
VDS = 300V, VGS = 0V
µA
250
VDS = 240V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
17
ID = 6.1A
4.8
nC VDS = 240V
7.6
VGS = 10V, See Fig. 6 and 13
–––
VDD = 150V
–––
ID = 6.1A
ns
–––
RG = 12Ω
–––
RD = 24Ω, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
from package
–––
7.5 –––
and center of die contact
430 –––
VGS = 0V
120 –––
pF
VDS = 25V
9.2 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
–––
–––
6.1
–––
–––
24
–––
–––
–––
–––
320
1.5
1.6
490
2.2
A
V
ns
µC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 6.1A, VGS = 0V
TJ = 25°C, IF = 6.1A
di/dt = 100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 6.1A, di/dt ≤ 270A/µs, V DD ≤ V(BR)DSS,
TJ ≤ 150°C
VDD = 25V, starting T J = 25°C, L = 5.7mH
RG = 25Ω, IAS = 6.1A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
IRF737LC
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
10
1
4.5V
0.1
20µs PULSE WIDTH
TC = 25°C
0.01
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
TOP
1
10
A
100
10
1
4.5V
0.1
20µs PULSE WIDTH
TC = 150°C
0.01
0.1
1
Fig 2. Typical Output Characteristics,
TJ = 150oC
Fig 1. Typical Output Characteristics,
TJ = 25oC
3.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
10
TJ = 150°C
TJ = 25°C
0.1
VDS = 50V
20µs PULSE WIDTH
0.01
4
5
6
7
8
9
A
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
10
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
A
I D = 6.1A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF737LC
800
VGS , Gate-to-Source Voltage (V)
700
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
600
500
Ciss
400
Coss
300
200
Crss
100
0
A
1
10
I D = 6.1A
V DS = 240V
V DS = 150V
V DS = 60V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
VDS , Drain-to-Source Voltage (V)
8
12
A
16
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
4
10
TJ = 150°C
TJ = 25°C
1
10µs
10
100µs
1ms
1
10ms
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.4
TC = 25°C
TJ = 150°C
Single Pulse
0.1
1
A
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRF737LC
RD
VDS
7.0
VGS
ID, Drain Current (Amps)
D.U.T.
RG
6.0
VDD
5.0
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
3.0
2.0
1.0
A
0.0
25
50
75
100
125
150
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
PD M
0.05
t
0.02
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
1
N otes :
1. D uty fac to r D = t
1
/t
2
2. P ea k T J = P D M x Z th J C + T C
0.0001
0.001
0.01
0.1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
A
1
10 V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
IRF737LC
240
ID
2.7A
3.9A
BOTTOM 6.1A
TOP
200
160
120
80
40
0
VDD = 50V
25
50
A
75
100
125
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
150
IRF737LC
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
RG
•
•
•
•
dv/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRF737LC
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
1
2
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
3X
3X
1.40 (.055)
1.15 (.045)
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
3
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220-AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY
LOT CODE 9B1M
A
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
IRF1010
9246
9B 1M
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
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Data and specifications subject to change without notice. 8/95