ETC LM311DR2

LM211, LM311
Highly Flexible Voltage
Comparators
The ability to operate from a single power supply of 5.0 V to 30 V or
±15 V split supplies, as commonly used with operational amplifiers,
makes the LM211/LM311 a truly versatile comparator. Moreover, the
inputs of the device can be isolated from system ground while the
output can drive loads referenced either to ground, the VCC or the VEE
supply. This flexibility makes it possible to drive DTL, RTL, TTL, or
MOS logic. The output can also switch voltages to 50 V at currents to
50 mA. Thus the LM211/LM311 can be used to drive relays, lamps or
solenoids.
VCC
3.0k
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MARKING
DIAGRAMS
8
PDIP–8
N SUFFIX
CASE 626
8
1
VCC
RL
5.0k
5
2
6
+
Inputs
3
8 7
–
2
Inputs
Output
3
1
8
+
-
VEE
4
VEE
Split Power Supply with Offset Balance
Inputs 3
–
2
7
Inputs
Output
1
4
8
1
3
+
8
–
1
4
RL
VEE
x
= 2 or 3
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
7
PIN CONNECTIONS
Output
RL
Gnd
VEE
Input polarity is reversed when
Gnd pin is used as an output.
Input polarity is reversed when
Gnd pin is used as an output.
Ground–Referred Load
LMx11
ALYW
1
VCC
8
+
Output
SO–8
D SUFFIX
CASE 751
Single Supply
VCC
2
8
1
4
1
RL
7
LM311N
AWL
YYWW
Inputs
1
2
3
VEE
Load Referred to Negative Supply
+
–
4
8
VCC
7
Output
6
Balance/Strobe
5
Balance
(Top View)
VCC
2
VCC
2
Inputs
+
3
–
Inputs
8
7
RL
Output
1
4
VEE
Load Referred to Positive Supply
3
8
+
–
4
VEE
6
7
ORDERING INFORMATION
RL
Output
1
TTL Strobe
1.0k
Strobe Capability
Device
Package
Shipping
LM211D
SO–8
98 Units/Rail
LM211DR2
SO–8
2500 Tape & Reel
LM311D
SO–8
98 Units/Rail
LM311DR2
SO–8
2500 Tape & Reel
PDIP–8
50 Units/Rail
LM311N
Figure 1. Typical Comparator Design Configurations
 Semiconductor Components Industries, LLC, 2001
February, 2001 – Rev. 0
1
Publication Order Number:
LM211/D
LM211, LM311
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)
Symbol
LM211
LM311
Unit
VCC +VEE
36
36
Vdc
Output to Negative Supply Voltage
VO –VEE
50
40
Vdc
Ground to Negative Supply Voltage
VEE
30
30
Vdc
Input Differential Voltage
VID
±30
±30
Vdc
Input Voltage (Note 2.)
Vin
±15
±15
Vdc
–
VCC to VCC–5
VCC to VCC–5
Vdc
Rating
Total Supply Voltage
Voltage at Strobe Pin
Power Dissipation and Thermal Characteristics
Plastic DIP
Derate Above TA = +25°C
PD
1/θJA
Operating Ambient Temperature Range
625
5.0
TA
Operating Junction Temperature
Storage Temperature Range
–25 to +85
mW
mW/°C
0 to +70
°C
TJ(max)
+150
+150
°C
Tstg
–65 to +150
–65 to +150
°C
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted [Note 1.])
LM211
Characteristic
Symbol
LM311
Min
Typ
Max
Min
Typ
Max
–
–
0.7
–
3.0
4.0
–
–
2.0
–
7.5
10
Unit
Input Offset Voltage (Note 3.)
RS ≤ 50 kΩ, TA = +25°C
RS ≤ 50 kΩ, Tlow ≤ TA ≤ Thigh*
VIO
mV
Input Offset Current (Note 3.) TA = +25°C
Tlow ≤ TA ≤ Thigh*
IIO
–
–
1.7
–
10
20
–
–
1.7
–
50
70
nA
Input Bias Current TA = +25°C
Tlow ≤ TA ≤ Thigh*
IIB
–
–
45
–
100
150
–
–
45
–
250
300
nA
Voltage Gain
AV
40
200
–
40
200
–
V/mV
–
200
–
–
200
–
ns
–
–
0.75
–
1.5
–
–
–
–
0.75
–
1.5
–
–
0.23
–
0.4
–
–
–
–
0.23
–
0.4
–
3.0
–
–
3.0
–
mA
–
–
–
0.2
–
0.1
10
–
0.5
–
–
–
–
0.2
–
–
50
–
nA
nA
µA
VICR
–14.5
–14.7 to
13.8
+13.0
–14.5
–14.7 to
13.8
+13.0
V
Positive Supply Current
ICC
–
+2.4
+6.0
–
+2.4
+7.5
mA
Negative Supply Current
IEE
–
–1.3
–5.0
–
–1.3
–5.0
mA
Response Time (Note 4.)
Saturation Voltage
VID ≤ –5.0 mV, IO = 50 mA, TA = 25°C
VID ≤–10 mV, IO = 50 mA, TA = 25°C
VCC ≥ 4.5 V, VEE = 0, Tlow ≤ TA ≤ Thigh*
VID ≤6.0 mV, Isink ≤ 8.0 mA
VID ≤10 mV, Isink ≤ 8.0 mA
Strobe ”On” Current (Note 5.)
VOL
V
IS
Output Leakage Current
VID ≥ 5.0 mV, VO= 35 V, TA = 25°C, Istrobe= 3.0 mA
VID ≥ 10 mV, VO= 35 V, TA = 25°C, Istrobe= 3.0 mA
VID ≥ 5.0 mV, VO= 35 V, Tlow ≤ TA ≤ Thigh*
Input Voltage Range (Tlow ≤ TA ≤ Thigh*)
* LM211: Tlow = –25°C, Thigh = +85°C
LM311: Tlow = 0°C, Thigh = +70°C
1. Offset voltage, offset current and bias current specifications apply for a supply voltage range from a single 5.0 V supply up to ±15 V supplies.
2. This rating applies for ±15 V supplies. The positive input voltage limit is 30 V above the negative supply. The negative input voltage limit is
equal to the negative supply voltage or 30 V below the positive supply, whichever is less.
3. The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a 1.0 mA
load. Thus, these parameters define an error band and take into account the “worst case” effects of voltage gain and input impedance.
4. The response time specified is for a 100 mV input step with 5.0 mV overdrive.
5. Do not short the strobe pin to ground; it should be current driven at 3.0 mA to 5.0 mA.
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2
LM211, LM311
8
Balance
Balance/Strobe
5
1.3k
300
6
300
1.3k
800
800
3.0k
100
5.0k
3.7k
3.7k
VCC
7
200
300
Output
900
250
600
1.3k
2
800
1
Inputs
340
730
3
1.3k
5.4k
4
Gnd
VEE
Figure 2. Circuit Schematic
I IO , INPUT OFFSET CURRENT (nA)
120
Pins 5 & 6 Tied
to VCC
100
Normal
80
40
0
-55
-25
0
25
50
75
100
3.0
2.0
1.0
Normal
-25
0
25
50
75
Figure 3. Input Bias Current
versus Temperature
Figure 4. Input Offset Current
versus Temperature
VCC = +15 V
VEE = -15 V
TA = +25°C
100
VCC
80
60
40
20
-12
Pins 5 & 6 Tied
to VCC
TA, TEMPERATURE (°C)
120
0
-16
4.0
0
-55
125
VCC = +15 V
VEE = -15 V
TA, TEMPERATURE (°C)
140
I IB , INPUT BIAS CURRENT (nA)
5.0
VCC = +15 V
VEE = -15 V
COMMON MODE LIMITS (V)
I IB , INPUT BIAS CURRENT (nA)
140
-8.0
-4.0
0
4.0
8.0
12
100
125
Referred to Supply Voltages
-1.0
-1.5
0.4
0.2
VEE
-25
0
25
50
75
DIFFERENTIAL INPUT VOLTAGE (V)
TA, TEMPERATURE (°C)
Figure 5. Input Bias Current versus
Differential Input Voltage
Figure 6. Common Mode Limits
versus Temperature
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3
125
-0.5
-55
16
100
VO , OUTPUT VOLTAGE (V)
+5.0V
20 mV
Vin
500Ω
VO
2.0 mV
0
0.1
0.2
0.3
0.4
tTLH, RESPONSE TIME (µs)
0.5
Vin ,INPUT VOLTAGE (mV)
VCC = +15 V
VEE = -15 V
TA = +25°C
100
50
0
0.6
Figure 7. Response Time for
Various Input Overdrives
15
10
5.0
0
-5.0
-10
-15
20 mV
5.0 mV
Vin
VCC
VO
2.0k
VO , OUTPUT VOLTAGE (V)
Vin ,INPUT VOLTAGE (mV)
5.0
4.0
3.0
2.0
1.0
0
Vin ,INPUT VOLTAGE (mV)
VO , OUTPUT VOLTAGE (V)
5.0 mV
VEE
2.0 mV
0
-50
Vin ,INPUT VOLTAGE (mV)
VO , OUTPUT VOLTAGE (V)
LM211, LM311
VCC = +15 V
VEE = -15 V
TA = +25°C
-100
0
1.0
2.0
tTLH, RESPONSE TIME (µs)
+5.0V
5.0 mV
5.0
4.0
3.0
2.0
1.0
0
20 mV
VCC = +15 V
VEE = -15 V
TA = +25°C
0
-50
-100
0
0.1
0.75
0.60
75
0.45
Short Circuit Current
50
0.30
25
0.15
0
0
5.0
0.2
0.3
0.4
tTHL, RESPONSE TIME (µs)
0.5
0.6
Figure 8. Response Time for
Various Input Overdrives
VCC
15
10
5.0
0
-5.0
-10
-15
5.0 mV
Vin
2.0 mV
VO
2.0k
VEE
20 mV
VCC = +15 V
VEE = -15 V
TA = +25°C
100
50
0
0
1.0
tTHL, RESPONSE TIME (µs)
2.0
0.90
PD , POWER DISSIPATION (W)
V , SATURATION VOLTAGE (V)
OL
OUTPUT SHORT CIRCUIT CURRENT (mA)
0.90
Power Dissipation
100
VO
Figure 10. Response Time for
Various Input Overdrives
TA = +25°C
125
500Ω
2.0 mV
Figure 9. Response Time for
Various Input Overdrives
150
Vin
0.75
0.60
0.30
TA = +25°C
TA = +125°C
0.15
0
0
15
10
TA = -55°C
0.45
0
VO, OUTPUT VOLTAGE (V)
8.0
16
24
32
40
48
56
IO, OUTPUT CURRENT (mA)
Figure 11. Output Short Circuit Current
Characteristics and Power Dissipation
Figure 12. Output Saturation Voltage
versus Output Current
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3.6
100
1.0
POWER SUPPLY CURRENT (mA)
10
VCC = +15 V
VEE = -15 V
Output VO = +50 V (LM211 only)
0.1
0.01
25
45
65
85
105
Positive Supply - Output Low
2.4
1.8
Positive and Negative Power Supply - Output H igh
1.2
0.6
0
125
TA = +25°C
3.0
0
5.0
10
15
20
25
TA, TEMPERATURE (°C)
VCC-VEE, POWER SUPPLY VOLTAGE (V)
Figure 13. Output Leakage Current
versus Temperature
Figure 14. Power Supply Current
versus Supply Voltage
3.0
SUPPLY CURRENT (mA)
OUTPUT LEAKAGE CURRENT (mA)
LM211, LM311
2.6
VCC = +15 V
VEE = -15 V
Postive Supply - Output Low
2.2
1.8
1.4
Positive and Negative Supply - Output High
1.0
-55
-25
0
25
50
75
TA, TEMPERATURE (°C)
100
125
Figure 15. Power Supply Current
versus Temperature
APPLICATIONS INFORMATION
+15 V
+15 V
3.0 k
4.7 k
3.0 k
82
33 k
5.0 k
C1
0.1 µF
Input
2
R1
C2
R2
8
+
3
-
4.7 k
0.002
6 µF
LM311
5.0 k
0.1 µF
Input
5
1
7
Output
100
R1
C2
100
R2
4
3
8
+
6
C1
LM311
2
-
1
7
Output
4
1.0 M
0.1 µF
5
0.1 µF
-15 V 510 k
-15 V
Figure 17. Conventional Technique
for Adding Hysteresis
Figure 16. Improved Method of Adding
Hysteresis Without Applying Positive
Feedback to the Inputs
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30
LM211, LM311
TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS
Since feedback to almost any pin of a comparator can
result in oscillation, the printed–circuit layout should be
engineered thoughtfully. Preferably there should be a
groundplane under the LM211 circuitry (e.g., one side of a
double layer printed circuit board). Ground, positive supply
or negative supply foil should extend between the output and
the inputs to act as a guard. The foil connections for the
inputs should be as small and compact as possible, and
should be essentially surrounded by ground foil on all sides
to guard against capacitive coupling from any fast
high–level signals (such as the output). If Pins 5 and 6 are not
used, they should be shorted together. If they are connected
to a trim–pot, the trim–pot should be located no more than
a few inches away from the LM211, and a 0.01 µF capacitor
should be installed across Pins 5 and 6. If this capacitor
cannot be used, a shielding printed–circuit foil may be
advisable between Pins 6 and 7. The power supply bypass
capacitors should be located within a couple inches of the
LM211.
A standard procedure is to add hysteresis to a comparator
to prevent oscillation, and to avoid excessive noise on the
output. In the circuit of Figure 17, the feedback resistor of
510 kΩ from the output to the positive input will cause about
3.0 mV of hysteresis. However, if R2 is larger than 100 Ω,
such as 50 kΩ, it would not be practical to simply increase
the value of the positive feedback resistor proportionally
above 510 kΩ to maintain the same amount of hysteresis.
When both inputs of the LM211 are connected to active
signals, or if a high–impedance signal is driving the positive
input of the LM211 so that positive feedback would be
disruptive, the circuit of Figure 16 is ideal. The positive
feedback is applied to Pin 5 (one of the offset adjustment
pins). This will be sufficient to cause 1.0 mV to 2.0 mV
hysteresis and sharp transitions with input triangle waves
from a few Hz to hundreds of kHz. The positive–feedback
signal across the 82 Ω resistor swings 240 mV below the
positive supply. This signal is centered around the nominal
voltage at Pin 5, so this feedback does not add to the offset
voltage of the comparator. As much as 8.0 mV of offset
voltage can be trimmed out, using the 5.0 kΩ pot and 3.0 kΩ
resistor as shown.
When a high speed comparator such as the LM211 is used
with high speed input signals and low source impedances,
the output response will normally be fast and stable,
providing the power supplies have been bypassed (with
0.1 µF disc capacitors), and that the output signal is routed
well away from the inputs (Pins 2 and 3) and also away from
Pins 5 and 6.
However, when the input signal is a voltage ramp or a slow
sine wave, or if the signal source impedance is high (1.0 kΩ
to 100 kΩ), the comparator may burst into oscillation near
the crossing–point. This is due to the high gain and wide
bandwidth of comparators like the LM211 series. To avoid
oscillation or instability in such a usage, several precautions
are recommended, as shown in Figure 16.
The trim pins (Pins 5 and 6) act as unwanted auxiliary
inputs. If these pins are not connected to a trim–pot, they
should be shorted together. If they are connected to a
trim–pot, a 0.01 µF capacitor (C1) between Pins 5 and 6 will
minimize the susceptibility to AC coupling. A smaller
capacitor is used if Pin 5 is used for positive feedback as in
Figure 16. For the fastest response time, tie both balance pins
to VCC.
Certain sources will produce a cleaner comparator output
waveform if a 100 pF to 1000 pF capacitor (C2) is connected
directly across the input pins. When the signal source is
applied through a resistive network, R1, it is usually
advantageous to choose R2 of the same value, both for DC
and for dynamic (AC) considerations. Carbon, tin–oxide,
and metal–film resistors have all been used with good results
in comparator input circuitry, but inductive wirewound
resistors should be avoided.
When comparator circuits use input resistors (e.g.,
summing resistors), their value and placement are particularly
important. In all cases the body of the resistor should be close
to the device or socket. In other words, there should be a very
short lead length or printed–circuit foil run between
comparator and resistor to radiate or pick up signals. The
same applies to capacitors, pots, etc. For example, if R1 =
10 kΩ, as little as 5 inches of lead between the resistors and
the input pins can result in oscillations that are very hard to
dampen. Twisting these input leads tightly is the best
alternative to placing resistors close to the comparator.
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LM211, LM311
VEE
VEE
VCC = +15 V
Balance
Adjust
Balance
Input
Inputs
3.0 k
+
Inputs
LM311
10 k
5.0 k
Gnd
+
LM311
VCC1
VCC
Gnd
Output
to CMOS Logic
VCC
Output
Balance/Strobe
2N2222 or
Q1
Equivalent
1.0k
VEE
TTL
Strobe
VEE = -15 V
Figure 18. Zero–Crossing Detector
Driving CMOS Logic
VCC2
*D1
*Zener Diode D1
protects the comparator
from inductive kickback
and voltage transients
on the VCC2 supply line.
Figure 19. Relay Driver with Strobe Capability
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LM211, LM311
PACKAGE DIMENSIONS
PDIP–8
N SUFFIX
CASE 626–05
ISSUE K
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
–B–
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
F
–A–
NOTE 2
L
C
J
–T–
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
--10
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
--10
0.030
0.040
N
SEATING
PLANE
D
M
K
G
H
0.13 (0.005)
M
T A
B
M
M
SO–8
D SUFFIX
CASE 751–07
ISSUE W
–X–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
S
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J
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
LM211, LM311
Notes
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LM211, LM311
Notes
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LM211, LM311
Notes
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LM211, LM311
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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http://onsemi.com
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