ETC 74AC574MTR

74AC574
OCTAL D-TYPE FLIP-FLOP
WITH 3 STATE OUTPUTS (NON INVERTED)
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HIGH SPEED:
fMAX = 250MHz (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
HIGH NOISE IMMUNITY:
VNIH = V NIL = 28 % VCC (MIN.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 574
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC574 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP-FLOP with 3 STATE
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
These 8 bit D-Type Flip-Flop are controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic that were setup at
the D inputs.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
74AC574B
74AC574M
T&R
74AC574MTR
74AC574TTR
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level); while
OE is in high level, the outputs will be in a high
impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/11
74AC574
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1
OE
2, 3, 4, 5, 6,
7, 8, 9
12, 13, 14,
15, 16, 17,
18, 19
11
D0 to D7
3-State Output Enable
(Active LOW)
Data Inputs
Q0 to Q7
3-State Outputs
CLOCK
Clock Input (LOW-to-HIGH
Edge Trigger)
Ground (0V)
Positive Supply Voltage
10
20
GND
VCC
NAME AND FUNCTION
TRUTH TABLE
INPUTS
OE
CK
D
H
X
Q
X
Z
L
X
NO CHANGE
L
L
L
L
H
H
X : Don’t Care
Z : High Impedance
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
2/11
OUTPUT
74AC574
ABSOLUTE MAXIMUM RATINGS
Symbol
V CC
Parameter
Supply Voltage
Value
Unit
-0.5 to +7
V
-0.5 to VCC + 0.5
-0.5 to VCC + 0.5
V
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
VI
DC Input Voltage
VO
DC Output Voltage
IIK
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
V
± 50
mA
± 400
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V CC
Parameter
Supply Voltage
Value
Unit
2 to 6
V
VI
Input Voltage
0 to VCC
V
VO
Output Voltage
0 to VCC
V
Top
Operating Temperature
-55 to 125
°C
8
ns/V
dt/dv
Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5V (note 1)
1) VIN from 30% to 70% of VCC
3/11
74AC574
DC SPECIFICATIONS
Test Condition
Symbol
VIH
V IL
VOH
VOL
II
Ioz
ICC
IOLD
IOHD
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
TA = 25°C
VCC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
Value
VO = 0.1 V or
VCC-0.1V
Min.
Typ.
2.1
3.15
3.85
1.5
2.25
2.75
1.5
2.25
2.75
VO = 0.1 V or
VCC-0.1V
Max.
-55 to 125°C
Min.
Min.
Max.
2.1
3.15
3.85
0.9
1.35
1.65
2.1
3.15
3.85
0.9
1.35
1.65
Unit
Max.
V
0.9
1.35
1.65
3.0
IO=-50 µA
2.9
2.99
2.9
2.9
4.5
IO=-50 µA
4.4
4.49
4.4
4.4
5.5
IO=-50 µA
5.4
5.49
5.4
5.4
3.0
IO =-12 mA
2.56
2.46
2.4
4.5
IO =-24 mA
3.86
3.76
3.7
5.5
IO =-24 mA
4.86
4.76
4.7
3.0
IO=50 µA
0.002
0.1
0.1
0.1
4.5
IO=50 µA
0.001
0.1
0.1
0.1
5.5
IO=50 µA
0.001
0.1
0.1
0.1
3.0
IO =12 mA
0.36
0.44
0.5
4.5
IO =24 mA
0.36
0.44
0.5
5.5
IO =24 mA
0.36
0.44
0.5
V
V
V
Input Leakage
Current
High Impedance
Output Leakege
Current
Quiescent Supply
Current
5.5
VI = VCC or GND
± 0.1
±1
±1
µA
5.5
VI = VIH or VIL
VO = VCC or GND
± 0.5
± 2.5
±5
µA
5.5
VI = VCC or GND
4
40
80
µA
Dynamic Output
Current (note 1, 2)
5.5
VOLD = 1.65 V max
75
50
mA
VOHD = 3.85 V min
-75
-50
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
4/11
-40 to 85°C
74AC574
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
Test Condition
Symbol
Parameter
Value
TA = 25°C
VCC
(V)
-55 to 125°C
Min.
Min.
Typ.
Max.
tPLH tPHL Propagation Delay
Time
CK to Q
tPZL tPZH Output Enable
Time
(*)
6.5
13.5
15.0
16.5
5.0(**)
5.0
9.5
11.0
11.5
3.3 (*)
7.0
11.0
12.0
13.0
(**)
5.0
5.0
8.5
9.0
9.5
tPLZ tPHZ Output Disable
Time
3.3 (*)
6.5
12.0
13.0
14.0
5.0(**)
5.0
9.5
10.5
11.5
3.3 (*)
1.5
6.0
7.0
7.0
(**)
tW
ts
th
fMAX
3.3
Min.
-40 to 85°C
Max.
Max.
CLOCK Pulse
Width HIGH or
LOW
Setup Time D to
CK, HIGH or LOW
5.0
1.5
4.0
5.0
5.0
3.3 (*)
-0.5
2.5
3.0
3.0
0
1.5
2.0
2.0
Hold Time D to CK,
HIGH or LOW
3.3 (*)
0.5
2.5
3.0
3.0
5.0(**)
0
1.5
2.0
2.0
Maximum Clock
Frequency
(**)
5.0
3.3 (*)
75
220
60
60
(**)
95
250
85
85
5.0
Unit
ns
ns
ns
ns
ns
ns
MHz
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
CIN
C OUT
C PD
Parameter
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance (note
1)
Value
TA = 25°C
VCC
(V)
Min.
Typ.
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
5.0
4
pF
5.0
8
pF
18
pF
5.0
fIN = 10MHz
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
5/11
74AC574
TEST CIRCUIT
TEST
tPLH, tPHL
SWITCH
Open
tPZL, tPLZ
2V CC
tPZH, tPHZ
Open
C L = 50pF or equivalent (includes jig and probe capacitance)
R L = R1 = 500Ω or equivalent
R T = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
6/11
74AC574
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 3: PULSE WIDTH (f=1MHz; 50% duty cycle)
7/11
74AC574
Plastic DIP-20 (0.25) MECHANICAL DATA
mm
DIM.
MIN.
a1
0.254
B
1.39
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.010
1.65
0.055
0.065
b
0.45
0.018
b1
0.25
0.010
D
25.4
1.000
E
8.5
0.335
e
2.54
0.100
e3
22.86
0.900
F
7.1
0.280
I
3.93
0.155
L
Z
3.3
0.130
1.34
0.053
P001J
8/11
74AC574
SO-20 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
2.65
0.10
0.104
0.20
a2
MAX.
0.004
0.007
2.45
0.096
b
0.35
0.49
0.013
0.019
b1
0.23
0.32
0.009
0.012
C
0.50
0.020
c1
45 (typ.)
D
12.60
13.00
0.496
0.512
E
10.00
10.65
0.393
0.419
e
1.27
0.050
e3
11.43
0.450
F
7.40
7.60
0.291
0.299
L
0.50
1.27
0.19
0.050
M
S
0.75
0.029
8 (max.)
P013L
9/11
74AC574
TSSOP20 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
A
MIN.
TYP.
1.1
0.433
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
0.85
0.9
0.95
0.335
0.354
0.374
b
0.19
0.30
0.0075
0.0118
c
0.09
0.2
0.0035
0.0079
D
6.4
6.5
6.6
0.252
0.256
0.260
E
6.25
6.4
6.5
0.246
0.252
0.256
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
0.65 BSC
0.0256 BSC
K
0o
4o
8o
0o
4o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A
A2
A1
b
K
e
E1
PIN 1 IDENTIFICATION
1
L
E
c
D
10/11
MAX.
74AC574
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consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information
previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
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11/11