STP55NF06 STB55NF06-1 STP55NF06FP N-CHANNEL 60V - 0.015 Ω - 50A TO-220/TO-220FP/I2PAK STripFET II POWER MOSFET TYPE STP55NF06 STB55NF06-1 STB55NF06FP ■ ■ ■ ■ VDSS RDS(on) ID 60 V 60 V 60 V <0.018 Ω <0.018 Ω <0.018 Ω 50 A 50 A 26 A TYPICAL RDS(on) = 0.015 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique ”Single Feature Size ” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 3 12 3 1 2 I2PAK TO-262 TO-220FP 1 2 3 TO-220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SWITCHING SPEED ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS ■ AUTOMOTIVE ANVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP55NF06 STB55NF06 V DS V DGR VGS STP55NF06FP Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V ± 20 Gate- source Voltage V ID Drain Current (continuous) at TC = 25°C 50 26 A ID Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C 35 18 A 200 104 A 110 0.73 30 0.2 W W/°C IDM(•) Ptot Derating Factor dv/dt (1) Peak Diode Recovery voltage slope E AS (2) Single Pulse Avalanche Energy Tstg Tj Storage Temperature Operating Junction Temperature (•) Pulse width limit ed by safe operating area. August 2002 . Unit 7 V/ns 350 mJ -55 to 175 °C (1) ISD ≤50A, di/dt ≤400A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID = 25A, VDD= 30V 1/10 STB55NF06-1 STP55NF06 STP55NF06FP THERMAL DATA Rthj-case Thermal Resistance Junction-case Max Rthj-amb Tl Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max I 2PAK TO-220 TO-220FP 1.36 5 °C/W °C/W °C 62.5 300 ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS Min. Typ. Max. 60 Unit V 1 10 µA µA ±100 nA ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS R DS(on) Static Drain-source On Resistance VGS = 10 V I D = 250 µA Min. Typ. Max. Unit 2 3 4 V 0.015 0.018 Ω Typ. Max. Unit ID = 27.5 A DYNAMIC Symbol 2/10 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 15 V C iss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 27.5 A Min. 18 S 1530 300 105 pF pF pF STB55NF06-1 STP55NF06 STP55NF06FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 30 V ID = 27.5 A VGS = 10 V R G = 4.7 Ω (Resistive Load, Figure 3) 16 8 Qg Qgs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 48 V ID= 55 A VGS= 10V 44.5 10.5 17.5 60 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. VDD = 30V ID = 27.5 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 3) 36 15 ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 55A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 55 A di/dt = 100A/µs T j = 150°C VDD = 30 V (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 75 170 4.5 Max. Unit 50 220 A A 1.5 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/10 STB55NF06-1 STP55NF06 STP55NF06FP Thermal Impedance Thermal Impedance for TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/10 STB55NF06-1 STP55NF06 STP55NF06FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage Temperature 5/10 STB55NF06-1 STP55NF06 STP55NF06FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STB55NF06-1 STP55NF06 STP55NF06FP TO-220 MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 4.40 TYP. 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 0.70 0.019 D1 TYP. 1.27 E MAX. 0.050 0.49 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 L2 0.409 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/10 STB55NF06-1 STP55NF06 STP55NF06FP TO-262 (I2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 e 2.4 2.7 0.094 0.106 E 10 10.4 0.393 0.409 L 13.1 13.6 0.515 0.531 L1 3.48 3.78 0.137 0.149 L2 1.27 1.4 0.050 0.055 E e B B2 C2 A1 A C A L1 L2 D L P011P5/E 8/10 STB55NF06-1 STP55NF06 STP55NF06FP TO-220FP MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F F1 L7 F2 H G G1 ¯ 1 2 3 L2 L4 9/10 STB55NF06-1 STP55NF06 STP55NF06FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express writt en approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 10/10