STP100NF04L N-CHANNEL 40V - 0.0036 Ω - 100A TO-220 STripFET™ II POWER MOSFET TYPE STP100NF04L ■ ■ ■ ■ VDSS RDS(on) ID 40 V <0.0042Ω 100 A TYPICAL RDS(on) = 0.0036 Ω LOW THRESHOLD DRIVE 100% AVALANCHE TESTED LOGIC LEVEL DEVICE 3 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS ■ HIGH CURRENT, HIGH SWITCHING SPEED ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS ■ SOLENOID AND RELAY DRIVERS 1 2 TO-220 INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Unit 40 V 40 V VGS Gate- source Voltage ± 16 V ID(*) Drain Current (continuos) at TC = 25°C 100 A ID Drain Current (continuos) at TC = 100°C 70 A IDM(•) Ptot Drain Current (pulsed) 400 A Total Dissipation at TC = 25°C 300 W 2 W/°C Peak Diode Recovery voltage slope 3.6 V/ns Single Pulse Avalanche Energy 1.4 J Derating Factor dv/dt (1) EAS (2) Tstg Tj Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area. (*) Current Limited by package February 2002 . Value -65 to 175 °C 175 °C (1) ISD ≤100A, di/dt ≤240A/µs, VDD ≤ 32V, T j ≤ T JMAX (2) Starting T j = 25 oC, IAR = 50A, V DD= 30V 1/8 STP100NF04L THERMAL DATA Rthj-case Rthj-amb Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max Typ 0.5 62.5 300 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 16 V V(BR)DSS Min. Typ. Max. 40 Unit V 1 10 µA µA ±100 nA Max. Unit ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10 V VGS = 4.5 V ID = 50 A ID = 50 A Min. Typ. 1 V 0.0036 0.0040 0.0042 0.0065 Ω Ω Typ. Max. Unit DYNAMIC Symbol 2/8 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 15 V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 20 A Min. 50 S 6400 1300 190 pF pF pF STP100NF04L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 50 A VDD = 20 V RG = 4.7 Ω VGS = 4.5 V (Resistive Load, Figure 3) 37 270 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 32V ID= 100A VGS= 4.5V 72 20 28.5 90 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol Parameter Test Conditions Min. td(off) tf Turn-off Delay Time Fall Time VDD = 20 V D = 50 A RG = 4.7Ω, VGS = 4.5 V (Resistive Load, Figure 3) 90 80 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time ID = 100 A Vclamp = 32 V RG = 4.7Ω, VGS = 4.5 V (Inductive Load, Figure 5) 85 125 160 ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 100A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100A/µs ISD = 100 A VDD = 20 V Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 88 240 5.5 Max. Unit 100 400 A A 1.3 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STP100NF04L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STP100NF04L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage Temperature. . . 5/8 STP100NF04L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP100NF04L TO-220 MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 4.40 TYP. 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 TYP. 1.27 MAX. 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 L2 0.409 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/8 STP100NF04L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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