STP80NF06 - STB80NF06 STW80NF06 N-CHANNEL 60V - 0.0065Ω - 80A TO-220/D2PAK/TO-247 STripFET™ II POWER MOSFET TYPE STB80NF06 STP80NF06 STW80NF06 ■ ■ ■ ■ VDSS RDS(on) ID 60 V 60 V 60 V < 0.010 Ω < 0.010 Ω < 0.010 Ω 80 A 80 A 80 A TYPICAL RDS(on) = 0.0065Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW THRESHOLD DRIVE 3 1 3 2 2 1 TO-220 TO-247 3 1 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. D2PAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC-AC & DC-DC CONVERTERS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SOLENOID AND RELAY DRIVERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ORDER CODES PART NUMBER MARKING PACKAGE PACKAGING STB80NF06T4 B80NF06 D2PAK TAPE & REEL STP80NF06 P80NF06 TO-220 TUBE STW80NF06 W80NF06 TO-247 TUBE March 2004 1/10 STP80NF06 - STB80NF06 - STW80NF06 ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR Parameter Value Unit Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V VGS Gate- source Voltage ±20 V ID (*) Drain Current (continuous) at TC = 25°C 80 A ID Drain Current (continuous) at TC = 100°C 80 A Drain Current (pulsed) 320 A Total Dissipation at TC = 25°C 300 W 2 W/°C 870 mJ –65 to 175 °C 175 °C IDM () PTOT Derating Factor EAS (1) Tstg Tj Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature (● ) Pulse width limited by safe operating area (1) Starting Tj = 25°C, ID = 40A, VDD = 40V (*) Current Limited by wire bonding THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 60 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ±20V ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 40 A Min. Typ. Max. Unit 2 3 4 V 0.0065 0.010 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) 2/10 Parameter Forward Transconductance Test Conditions VDS > 2.5 V, ID =18 A VDS = 25V, f = 1 MHz, VGS = 0 Min. 20 S 3850 pF Ciss Input Capacitance Coss Output Capacitance 800 pF Crss Reverse Transfer Capacitance 250 pF STP80NF06 - STB80NF06 - STW80NF06 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions Min. VDD = 27V, ID = 40A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 80V, ID = 80A, VGS = 10V Typ. Max. Unit 25 ns 85 ns 115 24 46 150 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol Parameter Test Conditions Min. td(off) tf Turn-off-Delay Time Fall Time VDD = 27V, ID = 40A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 70 25 ns ns td(off) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp =44V, ID =80A RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 85 75 110 ns ns ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 80 A ISDM (1) Source-drain Current (pulsed) 320 A VSD (2) Forward On Voltage ISD = 80A, VGS = 0 1.5 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80A, di/dt = 100A/µs, VDD = 50V, Tj = 150°C (see test circuit, Figure 5) ISD trr Qrr IRRM Parameter Test Conditions Min. Typ. 80 250 6.4 ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/10 STP80NF06 - STB80NF06 - STW80NF06 Output Characteristics Tranfer Characteristics Tranconductance Static Drain-Source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/10 STP80NF06 - STB80NF06 - STW80NF06 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics NormalizedBreakdownVoltage vs Temperature 5/10 STP80NF06 - STB80NF06 - STW80NF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STP80NF06 - STB80NF06 - STW80NF06 TO-220 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 L30 28.90 0.645 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 7/10 STP80NF06 - STB80NF06 - STW80NF06 D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 E 8 0.315 10 E1 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.015 0º 4º 3 V2 0.4 8/10 1 STP80NF06 - STB80NF06 - STW80NF06 TO-247 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 0.134 b2 3.0 3.40 0.118 c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 e 5.45 L 14.20 14.80 0.560 L1 3.70 4.30 0.14 L2 0.620 0.214 18.50 0.582 0.17 0.728 øP 3.55 3.65 0.140 0.143 øR 4.50 5.50 0.177 0.216 S 5.50 0.216 9/10 STP80NF06 - STB80NF06 - STW80NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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