LM5041A Cascaded PWM Controller General Description Features The LM5041A PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the pushpull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either a guaranteed overlap time (for current-fed applications) or a guaranteed both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100ns. Additional features include: line Under-Voltage Lockout (UVLO), soft-start, an error amplifier, precision voltage reference, and thermal shutdown. n Internal Start-up Bias Regulator n Programmable Line Under-Voltage Lockout (UVLO) with Adjustable Hysteresis n Current Mode Control n Internal Error Amplifier with Reference n Cycle-by-cycle Over-Current Protection n Leading Edge Blanking n Programmable Push-Pull Overlap or Dead Time n Internal 1.5A Push-Pull Gate Drivers n Programmable Soft-start n Programmable Oscillator with Sync Capability n Precision Reference n Thermal Shutdown The two differences between the LM5041 and the LM5041A are: No second level current limit in the ’A’ version No softstart (SS) shutdown comparator in the ’A’ version . Applications n n n n Telecommunication Power Converters Industrial Power Converters Multi-Output Power Converters +42V Automotive Systems Packages n TSSOP-16 n LLP-16 (5x5 mm) Thermally Enhanced Typical Application Circuit 20137801 Simplified Cascaded Push-Pull Power Converter © 2005 National Semiconductor Corporation DS201378 www.national.com LM5041A Cascaded PWM Controller May 2005 LM5041A Connection Diagram 20137802 16-Lead TSSOP, LLP Ordering Information Order Number Package Type NSC Package Drawing Supplied As LM5041AMTC TSSOP-16 MTC-16 92 Units per anti-static tube LM5041AMTCX TSSOP-16 MTC-16 2500 Units on Tape and Reel LM5041ASD LLP-16 SDA-16A 1000 Units on Tape and Reel LM5041ASDX LLP-16 SDA-16A 4500 Units on Tape and Reel Pin Description PIN NAME 1 VIN Source Input Voltage Input to start-up regulator. Input range 15V to 100V. 2 FB Feedback Signal Inverting input for the internal error amplifier. The non-inverting input is connected to a 0.75V reference. 3 COMP Output of the Internal Error Amplifier There is an internal 5kΩ resistor pull-up on this pin. The error amplifier provides an active sink. 4 REF Precision 5 volt reference output Maximum output current: 10mA. Locally decouple with a 0.1µF capacitor. Reference stays low until the line UV and the VCC UV are satisfied. 5 HD Main Buck PWM control output Buck switch PWM control output. The maximum duty cycle clamp for this output corresponds to an off time of typically 240ns per cycle. The LM5101 or LM5102 Buck stage gate driver can be used to level shift and drive the Buck switch. 6 LD Sync Switch control output Sync Switch control output. Inversion of HD output. The LM5101 or LM5102 lower drive can be used to drive the synchronous rectifier switch. 7 VCC Output from the internal high voltage start-up If an auxiliary winding raises the voltage on this pin regulator. Regulated to 9 volts. above the regulation setpoint, the internal start-up regulator will shutdown, reducing the IC power dissipation. 8 PUSH www.national.com DESCRIPTION APPLICATION INFORMATION Output of the push-pull drivers Output of the push-pull gate driver. Output capability of 1.5A peak . 2 LM5041A Pin Description (Continued) PIN NAME DESCRIPTION 9 PULL Output of the push-pull drivers APPLICATION INFORMATION 10 PGND Power ground Connect directly to analog ground. 11 AGND Analog ground Connect directly to power ground. 12 CS Current sense input Current sense input to the PWM comparator (CM control). There is a 50ns leading edge blanking on this pin. Using separate dedicated comparator, if CS exceeds 0.5V the outputs will go into cycle by cycle current limit. 13 SS Soft-start control An external capacitor and an internal 10uA current source, set the soft-start ramp. 14 TIME Push-Pull overlap and dead time control An external resistor (RSET) sets the overlap time or dead time for the push-pull outputs. A resistor connected between TIME and GND produces overlap. A resistor connected between TIME and REF produces dead time. 15 RT / SYNC Oscillator timing resistor pin and sync An external resistor sets the oscillator frequency. This pin will also accept an external oscillator. 16 UVLO Line Under-Voltage Shutdown An external divider from the power converter source sets the shutdown levels. Threshold of operation equals 2.5V. Hysteresis is set by a switched internal current source (20µA). LLP DAP SUB Die substrate The exposed die attach pad on the LLP package should be connected to a PCB thermal pad at ground potential. For additional information on using National Semiconductor’s No Pull Back LLP package, please refer to LLP Application Note AN-1187. Output of the push-pull gate driver. Output capability of 1.5A peak. 3 www.national.com LM5041A Block Diagram Simplified Block Diagram 20137803 www.national.com 4 ESD Rating If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Lead temperature (Note 2) VIN to GND 100V VCC to GND 16V All Other Inputs to GND -0.3 to 7V Junction Temperature 150˚C Storage Temperature Range -65˚C to +150˚C 2 kV Wave 4 seconds 260˚C Infrared 10 seconds 240˚C Vapor Phase 75 seconds 219˚C Operating Ratings (Note 1) 15 to 90V VIN Junction Temperature -40˚C to +125˚C Electrical Characteristics Specifications with standard typeface are for TJ = 25˚C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated (Note 3) Symbol Parameter Conditions Min Typ Max 9.3 Units Startup Regulator VCC Reg I-VIN VCC Regulation open circuit 8.7 9 VCC Current Limit (Note 4) 15 25 V Startup Regulator Leakage (external Vcc Supply) VIN = 100V 145 500 µA Shutdown Current (Iin) UVLO = 0V, VCC = open 350 450 µA mA VCC Supply VCC Under-voltage Lockout Voltage (positive going Vcc) VCC Reg - 400mV VCC Reg 275mV VCC Under-voltage Hysteresis 1.7 2.1 2.6 V 3 4 mA Supply Current (ICC) CL = 0 V Error Amplifier GBW Gain Bandwidth 3 MHz DC Gain 80 dB Input Voltage VFB = COMP COMP Sink Capability VFB = 1.5V, COMP= 1V 0.735 0.75 4 8 0.765 V mA Reference Supply VREF Ref Voltage IREF = 0 mA Ref Voltage Regulation IREF = 0 to 10mA 4.85 Ref Current Limit 15 5 5.15 V 25 50 mV 20 mA 40 ns Current Limit ILIM Delay to Output CS Step from 0 to 0.6V Time to Onset of OUT Transition (90%) CL = 0 Cycle by Cycle Threshold Voltage 0.45 Leading Edge Blanking Time CS Sink Current (clocked) CS = 0.3V 2 5 0.5 0.55 V 50 ns 5 mA www.national.com LM5041A Absolute Maximum Ratings (Note 1) LM5041A Electrical Characteristics (Continued) Specifications with standard typeface are for TJ = 25˚C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated (Note 3) Symbol Parameter Conditions Min Typ Max Units 7 10 13 µA 0.35 0.55 0.75 V 180 175 200 220 225 kHz 515 600 685 kHz 3 3.5 V Soft-Start Soft-start Current Source Soft-start to COMP Offset Oscillator Frequency1 (RT = 26.7KΩ) TJ = 25˚C Frequency2 (RT = 7.87KΩ) Sync threshold PWM Comparator Delay to Output COMP set to 2V CS stepped 0 to 0.4V, Time to onset of OUT transition low 25 Max Duty Cycle TS = Oscillator Period (Ts-240ns)/Ts) Min Duty Cycle COMP = 0V COMP to PWM Comparator Gain ns % 0 % 0.32 COMP Open Circuit Voltage FB = 0V 4.1 4.8 5.5 V COMP Short Circuit Current FB = 0V, COMP = 0V 0.6 1 1.4 mA Slope Compensation Slope Comp Amplitude Delta increase at PWM Comparator to CS 110 mV UVLO Shutdown Under-voltage Shutdown Under-voltage Shutdown Hysteresis Current Source 2.44 2.5 2.56 V 16 20 24 µA V Buck Stage Outputs 5 (VREF) Output High level V Output High Saturation IOUT = 10mA REF = VOUT 0.5 1 Output Low Saturation IOUT = −10mA 0.5 1 Rise Time CL = 100pF 10 ns Fall Time CL = 100pF 10 ns V Push-Pull Outputs www.national.com Overlap Time RSET = 20kΩ Connected to GND, 50% to 50% Transitions 60 90 120 ns Dead Time RSET = 20kΩ Connected to REF, 50% to 50% Transitions 65 95 125 ns Output High Saturation IOUT = 50mA VCC - VOUT 0.25 0.5 V 6 (Continued) Specifications with standard typeface are for TJ = 25˚C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 26.7kΩ, RSET = 20kΩ) unless otherwise stated (Note 3) Symbol Parameter Typ Max Units IOUT = 100mA 0.5 1 V Rise Time CL = 1nF 20 ns Fall Time CL = 1nF 20 ns Thermal Shutdown Temp. 165 ˚C Thermal Shutdown Hysteresis 25 ˚C MTC Package 125 ˚C/W SDA Package 32 ˚C/W Output Low Saturation Conditions Min Thermal Shutdown TSD Thermal Resistance θJA Junction to Ambient Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: For detailed information on soldering plastic TSSOP and LLP packages, refer to the Packaging Data Book available from National Semiconductor Corporation. Note 3: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25˚C. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 4: Device thermal limitations may limit usable range. 7 www.national.com LM5041A Electrical Characteristics LM5041A Typical Performance Characteristics VCC and VIN vs VIN VCC vs ICC 20137809 20137808 SS Pin Current vs Temp Frequency vs RT 20137810 20137815 Overlap Time vs RSET Dead Time vs RSET 20137812 20137811 www.national.com 8 LM5041A Typical Performance Characteristics (Continued) Overlap Time vs Temp Dead Time vs Temp 20137813 20137814 Error Amplifier Gain Phase 20137816 9 www.national.com LM5041A Detailed Operating Description Line Under-Voltage Detector The LM5041A PWM controller contains all of the features necessary to implement either current-fed or voltage-fed push-pull or bridge power converters. These “Cascaded” topologies are well suited for multiple output and higher power applications. The LM5041A’s four control outputs include: the buck stage controls (HD and LD) and the pushpull control outputs (PUSH and PULL). Push-pull outputs are driven at 50% nominal duty cycle at one half of the switching frequency of the buck stage and can be configured for either a guaranteed overlap time (for current-fed applications) or a guaranteed both-off time (for voltage-fed applications). Push-pull stage MOSFETs can be driven directly from the internal gate drivers while the buck stage requires an external driver such as the LM5102. The LM5041A includes a high-voltage start-up regulator that operates over a wide input range of 15V to 100V. The PWM controller is designed for high-speed capability including an oscillator frequency range up to 1 MHz and total propagation delays of less than 100ns. Additional features include: line Under-Voltage Lockout (UVLO), soft-start, an error amplifier, precision voltage reference, and thermal shutdown. The LM5041A contains a line Under-Voltage Lockout (UVLO) circuit. An external set-point resistor divider from VIN to ground sets the operational range of the converter. The divider must be designed such that the voltage at the UVLO pin will be greater than 2.5V when VIN is in the desired operating range. If the Under-Voltage threshold is not met, all functions of the controller are disabled and the controller will enter a low-power state with input current < 300µA. ULVO hysteresis is accomplished with an internal 20µA current source that is switched on or off into the impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to instantly raise the voltage at the UVLO pin. When the UVLO pin falls below the 2.5V threshold, the current source is turned off causing the voltage at the UVLO pin to fall. The UVLO pin can also be used to implement a remote enable / disable function. By shorting the UVLO pin to ground, the converter can be disabled. Buck Stage Control Outputs The LM5041A Buck switch maximum duty cycle clamp ensures that there will be sufficient off time each cycle to recharge the bootstrap capacitor used in the high side gate driver. The Buck switch is guaranteed to be off, and the sync switch on, for at least 250ns per switching cycle. The Buck stage control outputs (LD and HD) are CMOS buffers with logic levels of 0 to 5V. During any fault state or Under-Voltage off state, the buck stage control outputs will default to HD low and LD high. High Voltage Start-Up Regulator The LM5041A contains an internal high-voltage start-up regulator, thus the input pin (Vin) can be connected directly to the line voltage. The regulator output is internally current limited to 15mA. When power is applied, the regulator is enabled and sources current into an external capacitor connected to the Vcc pin. The recommended capacitance range for the Vcc regulator is 0.1uF to 100uF. When the voltage on the Vcc pin reaches the regulation point of 9V and the internal voltage reference (REF) reaches its regulation point of 5V, the controller outputs are enabled. The Buck stage outputs will remain enabled until Vcc falls below 7V or the line Under-Voltage Lockout detector indicates that Vin is out of range. The push-pull outputs continue switching until the REF pin voltage falls below approximately 3V. In typical applications, an auxiliary transformer winding is connected through a diode to the Vcc pin. This winding must raise the Vcc voltage above 9.3V to shut off the internal start-up regulator. Powering VCC from an auxiliary winding improves efficiency while reducing the controller’s power dissipation. The recommended capacitance range for the Vref regulator output is 0.1uF to 10uF. The external VCC capacitor must be sized such that the capacitor maintains a VCC voltage greater than 7V during the initial start-up. During a fault mode when the converter auxiliary winding is inactive, external current draw on the VCC line should be limited so the power dissipated in the start-up regulator does not exceed the maximum power dissipation of the controller. An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the VCC and the VIN pins together and feeding the external bias voltage into the two pins. www.national.com Push-Pull Outputs The push pull outputs operate continuously at a nominal 50% duty cycle. A distinguishing feature of the LM5041A is the ability to accurately configure either dead time (both-off) or overlap time (both-on) on the complementary push-pull outputs. The overlap/dead time magnitude is controlled by a resistor connected to the TIME pin on the controller. The TIME pin holds one end of the resistor at 2.5V and the other end of the resistor should be connected to either REF for dead time control setting or to GND for overlap control. The polarity of the current in the TIME is detected by the LM5041A The magnitude of the overlap/dead time can be calculated as follows: Overlap Time (ns) = (3.66 x RSET) + 7 Overlap Time in ns, RSET connected to GND, RSET in kΩ Dead Time (ns) = (3.69 x RSET) + 21 Dead Time in ns, RSET connected to REF, RSET in kΩ Recommended RSET programming range: 10kΩ to 100kΩ Current-fed designs require a period of overlap to insure there is a continuous path for the buck inductor current. Voltage-fed designs require a period of dead time to insure there is no time when the push-pull transformer acts as a shorted turn to the low impedance sourcing node. The pushpull outputs alternate continuously under all conditions provided REF the voltage is greater than 3V. 10 LM5041A Push-Pull Outputs (Continued) 20137804 filter must be placed close to the device and connected directly to the pins of the controller (CS and GND). If a current sense transformer is used, both leads of the transformer secondary should be routed to the sense resistor, which should also be located close to the IC. A resistor may be used for current sensing instead of a transformer, located in the push-pull transistor sources, but a low inductance type of resistor is required. When designing with a sense resistor, all of the noise sensitive low power grounds should be connected together around the IC and a single connection should be made to the high current power ground (sense resistor ground point). PWM Comparator The PWM comparator compares the slope compensated current ramp signal to the loop error voltage from the internal error amplifier (COMP pin). This comparator is optimized for speed in order to achieve minimum controllable duty cycles. The comparator polarity is such that 0V on the COMP pin will produce zero duty cycle in the buck stage. Error Amplifier An internal high gain wide-bandwidth error amplifier is provided within the LM5041A. The amplifier’s non-inverting input is tied to a 0.75V reference. The inverting input is connected to the FB pin. In non-isolated applications the power converter output is connected to the FB pin via the voltage setting resistors. Loop compensation components are connected between the COMP and FB pins. For most isolated applications the error amplifier function is implemented on the secondary side of the converter and the internal error amp is not used. The internal error amplifier is configured as an open drain output and can be disabled by connecting the FB pin to ground. An internal 5kΩ pull-up resistor between the 5V reference and COMP can be used as the pull-up for an opto-coupler in isolated applications. Oscillator and Sync Capability The LM5041A oscillator is set by a single external resistor connected between the RT pin and GND. To set a desired oscillator frequency (F), the necessary RT resistor can be calculated from: The buck stage will switch at the oscillator frequency and each push-pull output will switch at half the oscillator frequency in a push-pull configuration. The LM5041A can also be synchronized to an external clock. The external clock must have a higher frequency than the free running frequency set by the RT resistor. The clock signal should be capacitively coupled into the RT pin with a 100pF capacitor. A peak voltage level greater than 3V is required for detection of the sync pulse. The sync pulse width should be set in the 15 to 150ns range by the external components. The RT resistor is always required, whether the oscillator is free running or externally synchronized. The voltage at the RT pin is internally regulated to 2V. The RT resistor should be located very close to the device and connected directly to the pins of the IC (RT and GND). Current Limit/Current Sense The LM5041A provides cycle-by-cycle over-current protection. If the voltage at the CS comparator (CS pin voltage plus slope comp voltage) exceeds 0.5V the present buck stage duty cycle is terminated (cycle by cycle current limit). A small RC filter located near the controller is recommended to filter current sense signals at the CS pin. An internal MOSFET discharges the external CS pin for an additional 50ns at the beginning of each cycle to reduce the leading edge spike that occurs when the buck stage MOSFET is turned on. The LM5041A current sense and PWM comparators are very fast, and may respond to short duration noise pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS 11 www.national.com LM5041A Slope Compensation Soft-start and Shutdown The PWM comparator compares the current sense signal to the voltage at the COMP pin. The output stage of the internal error amplifier generally drives the COMP pin. At duty cycles greater than 50 percent, current mode control circuits are subject to sub-harmonic oscillation. By adding an additional fixed ramp signal (slope compensation) to the current sense ramp, oscillations can be avoided. The LM5041A integrates this slope compensation by buffering the internal oscillator ramp and summing a current ramp generated by the oscillator internally with the current sense signal. Additional slope compensation may be provided by increasing the source impedance of the current sense signal. The soft-start feature allows the power converter to gradually reach the initial steady state operating point, thereby reducing start-up stresses and surges. At power on, a 10uA current is sourced out of the soft-start pin (SS) to charge an external capacitor. The capacitor voltage will ramp up slowly and will limit the maximum duty cycle of the buck stage. In the event of a fault as indicated by VCC Under-voltage, line Under-voltage the output drivers are disabled and the softstart capacitor is discharged to 0.7V. When the fault condition is no longer present, a soft-start sequence will begin again and buck stage duty cycle will gradually increase as the soft-start capacitor is charged. Thermal Protection Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 165 degrees Celsius, the controller is forced into a low-power standby state, disabling the output drivers and the bias regulator. This feature is provided to prevent catastrophic failures from accidental device overheating. www.national.com 12 LM5041A Typical Application 20137806 FIGURE 1. Simplified Cascaded Half-Bridge 13 www.national.com www.national.com 14 Application Circuit: Input 35-80V, Output 2.5V, 50A 20137807 LM5041A LM5041A Physical Dimensions inches (millimeters) unless otherwise noted Molded TSSOP-16 NS Package Number MTC16 16-Lead LLP Surface Mount Package NS Package Number SDA16A 15 www.national.com LM5041A Cascaded PWM Controller Notes National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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