NSC LMH6739_07

LMH6739
Very Wideband, Low Distortion Triple Video Buffer
General Description
Features
The LMH6739 is a very wideband, DC coupled monolithic selectable gain buffer designed specifically for ultra high resolution video systems as well as wide dynamic range systems
requiring exceptional signal fidelity. Benefiting from National's
current feedback architecture, the LMH6739 offers gains of
−1, 1 and 2. At a gain of +2 the LMH6739 supports ultra high
resolution video systems with a 400 MHz 2 VPP
3 dB Bandwidth. With 12-bit distortion level through 30 MHz
(RL = 100Ω), 2.3nV/√Hz input referred noise, the LMH6739
is the ideal driver or buffer for high speed flash A/D and D/A
converters. Wide dynamic range systems such as radar and
communication receivers requiring a wideband amplifier offering exceptional signal purity will find the LMH6739’s low
input referred noise and low harmonic distortion make it an
attractive solution. The LMH6739 is offered in a space saving
SSOP package.
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750 MHz −3 dB small signal bandwidth (AV = +1)
−85 dBc 3rd harmonic distortion (20 MHz)
input noise voltage
2.3 nV/
3300 V/μs slew rate
32 mA supply current (10.6 mA per op amp)
90 mA linear output current
0.02/0.01 Diff. Gain/ Diff. Phase (RL = 150Ω)
2mA shutdown current
Applications
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RGB video driver
High resolution projectors
Flash A/D driver
D/A transimpedance buffer
Wide dynamic range IF amp
Radar/communication receivers
DDS post-amps
Wideband inverting summer
Line driver
Connection Diagram
16-Pin SSOP
20104110
Top View
Ordering Information
Package
16-Pin SSOP
Part Number
Package Marking
LMH6739MQ
LH6739MQ
LMH6739MQX
Transport Media
95 Units/Rail
2.5k Units Tape and Reel
NSC Drawing
MQA16
VIP10™ is a trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation
201041
www.national.com
LMH6739 Very Wideband, Low Distortion Triple Video Buffer
December 10, 2007
LMH6739
Soldering Information
Infrared or Convection (20 sec.)
Wave Soldering (10 sec.)
Storage Temperature Range
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 3)
Human Body Model
Machine Model
Supply Voltage (V+ - V–)
IOUT
Common Mode Input Voltage
Maximum Junction Temperature
Storage Temperature Range
Electrical Characteristics
Operating Ratings
2000V
200V
13.2V
(Note 4)
±VCC
+150°C
−65°C to +150°C
235°C
260°C
−65°C to +150°C
(Note 1)
Temperature Range (Note 5)
Supply Voltage (V+ - V–)
Thermal Resistance
Package
−40°C to +85°C
8V to 12V
(θJC)
36°C/W
16-Pin SSOP
(θJA)
120°C/W
(Note 2)
TA = 25°C, AV = +2, VCC = ±5V, RL = 100Ω; unless otherwise specified.
Symbol
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
Max
(Note 7)
Units
Frequency Domain Performance
UGBW
−3 dB Bandwidth
Unity Gain, VOUT = 200 mVPP
750
SSBW
−3 dB Bandwidth
VOUT = 200 mVPP
480
VOUT = 2 VPP
400
0.1 dB Bandwidth
VOUT = 2 VPP
150
MHz
Rolloff
@ 300 MHz, VOUT = 2 VPP
1.0
dB
LSBW
GFR2
MHz
MHz
Time Domain Response
TRS
Rise and Fall Time
(10% to 90%)
2V Step
0.9
TRL
5V Step
1.7
SR
Slew Rate
5V Step
3300
V/µs
ts
Settling Time to 0.1%
2V Step
10
ns
te
Enable Time
From Disable = rising edge.
7.3
ns
td
Disable Time
From Disable = falling edge.
4.5
ns
2nd Harmonic Distortion
2 VPP, 5 MHz
−80
HD2
2 VPP, 20 MHz
−71
HD2H
2 VPP, 50 MHz
−55
ns
Distortion
HD2L
HD3L
3rd Harmonic Distortion
2 VPP, 5 MHz
−90
HD3
2 VPP, 20 MHz
−85
HD3H
2 VPP, 50 MHz
−65
dBc
dBc
Equivalent Input Noise
VN
Non-Inverting Voltage
>1 MHz
2.3
nV/
ICN
Inverting Current
>1 MHz
12
pA/
NCN
Non-Inverting Current
>1 MHz
3
pA/
Video Performance
DG
Differential Gain
4.43 MHz, RL = 150Ω
.02
%
DP
Differential Phase
4.43 MHz, RL = 150Ω
.01
degree
Static, DC Performance
VOS
Input Offset Voltage (Note 8)
IBN
Input Bias Current (Note 8)
Non-Inverting
IBI
Input Bias Current (Note 8)
Inverting
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−16
−21
2
0.5
±2.5
±4.5
mV
−8
0
+5
µV
−2
±30
±40
μA
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
Max
(Note 7)
Units
50
48.5
53
dB
46
44
50
dB
PSRR
Power Supply Rejection Ratio (Note
8)
CMRR
Common Mode Rejection Ratio
(Note 8)
ICC
Supply Current (Note 8)
All three amps Enabled, No Load
32
35
40
mA
Supply Current Disabled V+
RL = ∞
1.9
2.2
mA
Supply Current Disabled V−
RL = ∞
1.1
1.3
mA
450
525
Ω
0.2
±1.1
%
Internal Feedback & Gain Set
Resistor Value
Gain Error
375
RL = ∞
Miscellaneous Performance
RIN+
Non-Inverting Input Resistance
CIN+
Non-Inverting Input Capacitance
RIN−
Inverting Input Impedance
Output impedance of input buffer.
RO
Output Impedance
DC
VO
Output Voltage Range (Note 8)
1000
kΩ
.8
pF
30
Ω
0.05
Ω
RL = 100Ω
±3.25
±3.1
±3.5
RL = ∞
±3.65
±3.5
±3.8
±1.9
±1.7
±2.0
V
80
60
90
mA
V
CMIR
Common Mode Input Range (Note CMRR > 40 dB
8)
IO
Linear Output Current (Notes 4, 8) VIN = 0V, VOUT < ±30 mV
ISC
Short Circuit Current (Note 9)
VIN = 2V Output Shorted to Ground
160
mA
IIH
Disable Pin Bias Current High
Disable Pin = V+
10
μA
IIL
Disable Pin Bias Current Low
Disable Pin = 0V
−350
μA
VDMAX
Voltage for Disable
Disable Pin ≤ VDMAX
VDMIM
Voltage for Enable
Disable Pin ≥ VDMIN
0.8
V
2.0
V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ>
TA. See Applications Information for information on temperature de-rating of this device. Min/Max ratings are based on product characterization and simulation.
Individual parameters are tested as noted.
Note 3: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 4: The maximum output current (IOUT) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Information
for more details.
Note 5: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 7: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 8: Parameter 100% production tested at 25° C.
Note 9: Short circuit current should be limited in duration to no more than 10 seconds. See the Power Dissipation section of the Application Information for more
details.
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LMH6739
Symbol
LMH6739
Typical Performance Characteristics
AV = +2, VCC = ±5V, RL = 100Ω; unless otherwise specified).
Large Signal Frequency Response
Small Signal Frequency Response
20104131
20104132
Frequency Response vs. VOUT
Frequency Response vs. Supply Voltage
20104101
20104116
Gain Flatness
Gain Flatness, Dual Input Buffer
20104139
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20104140
4
Frequency Response vs. Capacitive Load
20104122
20104114
Series Output Resistance vs. Capacitive Load
Open Loop Gain and Phase
20104126
20104119
Distortion vs. Frequency
10 MHz HD vs. Output Level
20104135
20104134
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LMH6739
Pulse Response
LMH6739
Distortion vs. Supply Voltage
CMRR vs. Frequency
20104111
20104118
PSRR vs. Frequency
Closed Loop Output Impedance |Z|
20104104
20104121
Disable Timing
DC Errors vs. Temperature
20104124
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20104112
6
Disabled Channel Isolation vs. Frequency
20104133
20104141
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LMH6739
Crosstalk vs. Frequency
LMH6739
Application Information
GENERAL INFORMATION
The LMH6739 is a high speed current feedback selectable
gain buffer (SGB), optimized for very high speed and low distortion. With its internal feedback and gain-setting resistors
the LMH6739 offers excellent AC performance while simplifying board layout and minimizing the affects of layout related
parasitic components. The LMH6739 has no internal ground
reference so single or split supply configurations are both
equally useful.
SETTING THE CLOSED LOOP GAIN
The LMH6739 is a current feedback amplifier with on-chip
RF = RG = 450Ω. As such it can be configured with an
AV = +2, A V = +1, or an AV = −1 by connecting pins 3 and 4
as described in the chart below.
20104105
GAIN AV
FIGURE 1. Recommended Non-Inverting Gain Circuit,
Gain = +2
INPUT CONNECTIONS
Non-Inverting
Inverting
−1 V/V
Ground
Input Signal
+1 V/V
Input Signal
NC (Open)
+2 V/V
Input Signal
Ground
The gain of the LMH6739 is accurate to ±1% and stable over
temperature. The internal gain setting resistors, RF and RG,
match very well. However, over process and temperature
their absolute value will change. Using external resistors in
series with RG to change the gain will result in poor gain accuracy over temperature and from part to part.
20104108
20104130
FIGURE 2. Recommended Non-Inverting Gain Circuit,
Gain +1
FIGURE 4. Correction for Unity Gain Peaking
20104103
FIGURE 3. Recommended Inverting Gain Circuit,
Gain = –1
20104129
FIGURE 5. Frequency Response for Circuit in Figure 4
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8
DRIVING CAPACITIVE LOADS
Capacitive output loading applications will benefit from the
use of a series output resistor ROUT. Figure 8 shows the use
of a series output resistor, ROUT, to stabilize the amplifier output under capacitive loading. Capacitive loads of 5 to 120 pF
are the most critical, causing ringing, frequency response
peaking and possible oscillation. The charts “Suggested
ROUT vs. Cap Load” give a recommended value for selecting
a series output resistor for mitigating capacitive loads. The
values suggested in the charts are selected for .5 dB or less
of peaking in the frequency response. This gives a good compromise between settling time and bandwidth. For applications where maximum frequency response is needed and
some peaking is tolerable, the value of ROUT can be reduced
slightly from the recommended values.
LAYOUT CONSIDERATIONS
Whenever questions about layout arise, use the evaluation
board as a guide. The LMH730275 is the evaluation board
supplied with samples of the LMH6739.
To reduce parasitic capacitances ground and power planes
should be removed near the input and output pins. Components in the feedback loop should be placed as close to the
device as possible. For long signal paths controlled
impedance lines should be used, along with impedance
matching elements at both ends.
Bypass capacitors should be placed as close to the device as
possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be
located farther from the device, the smaller ceramic capacitors should be placed as close to the device as possible. The
LMH6739 has multiple power and ground pins for enhanced
supply bypassing. Every pin should ideally have a separate
bypass capacitor. Sharing bypass capacitors may slightly degrade second order harmonic performance, especially if the
supply traces are thin and /or long. In Figure 1 and Figure 2
CSS is optional, but is recommended for best second harmonic distortion. Another option to using CSS is to use pairs of .01
μF and .1 μF ceramic capacitors for each supply bypass.
20104107
FIGURE 6. Alternate Unity Gain Compensation
VIDEO PERFORMANCE
The LMH6739 has been designed to provide excellent performance with production quality video signals in a wide variety of formats such as HDTV and High Resolution VGA.
NTSC and PAL performance is nearly flawless. Best performance will be obtained with back terminated loads. The back
termination reduces reflections from the transmission line and
effectively masks transmission line and other parasitic capacitances from the amplifier output stage. Figure 4 shows a
typical configuration for driving a 75Ω Cable. The amplifier is
configured for a gain of two to make up for the 6 dB of loss in
ROUT.
20104137
FIGURE 7. Frequency Response for Circuit in Figure 6
20104138
FIGURE 8. Decoupling Capacitive Loads
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LMH6739
UNITY GAIN COMPENSATION
With a current feedback Selectable Gain Buffer like the
LMH6739, the feedback resistor is a compromise between
the value needed for stability at unity gain and the optimized
value used at a gain of two. The result of this compromise is
substantial peaking at unity gain. If this peaking is undesirable
a simple RC filter at the input of the buffer will smooth the
frequency response shown as Figure 4. Figure 5 shows the
results of a simple filter placed on the non-inverting input. See
Figure 6 and Figure 7 for another method for reducing unity
gain peaking.
LMH6739
An effective way to reduce the junction temperature for the
SSOP-16 package (and other plastic packages) is to use the
copper board area to conduct heat. With no enhancement the
major heat flow path in this package is from the die through
the metal lead frame (inside the package) and onto the surrounding copper through the interconnecting leads. Since
high frequency performance requires limited metal near the
device pins the best way to use board copper to remove heat
is through the bottom of the package. A gap filler with high
thermal conductivity can be used to conduct heat from the
bottom of the package to copper on the circuit board. Vias to
a ground or power plane on the back side of the circuit board
will provide additional heat dissipation. A combination of front
side copper and vias to the back side can be combined as
well.
Follow these steps to determine the maximum power dissipation for the LMH6739:
1. Calculate the quiescent (no-load) power: PAMP = ICC*
(VS) VS = V+-V−
2. Calculate the RMS power dissipated in the output stage:
PD (rms) = rms ((VS - VOUT)*IOUT) where VOUT and IOUT
are the voltage and current across the external load and
VS is the total supply current
3. Calculate the total RMS power: PT = PAMP+PD
The maximum power that the LMH6739 package can dissipate at a given temperature can be derived with the following
equation (See Figure 9):
PMAX = (150º – TAMB)/ θJA, where TAMB = Ambient temperature
(°C) and θJA = Thermal resistance, from junction to ambient,
for a given package (°C/W). For the SSOP package θJA is
120°C/W.
20104102
FIGURE 9. Maximum Power Dissipation
POWER DISSIPATION
The LMH6739 is optimized for maximum speed and performance in the small form factor of the standard SSOP-16
package. To achieve its high level of performance, the
LMH6739 consumes an appreciable amount of quiescent
current which cannot be neglected when considering the total
package power dissipation limit. The quiescent current contributes to about 40° C rise in junction temperature when no
additional heat sink is used (VS = ±5V, all 3 channels on).
Therefore, it is easy to see the need for proper precautions to
be taken in order to make sure the junction temperature’s absolute maximum rating of 150°C is not violated.
To ensure maximum output drive and highest performance,
thermal shutdown is not provided. Therefore, it is of utmost
importance to make sure that the TJMAX is never exceeded
due to the overall power dissipation (all 3 channels).
With the LMH6739 used in a back-terminated 75Ω RGB analog video system (with 2 VPP output voltage), the total power
dissipation is around 435 mW of which 340 mW is due to the
quiescent device dissipation (output black level at 0V). With
no additional heat sink used, that puts the junction temperature to about 140° C when operated at 85°C ambient.
To reduce the junction temperature many options are available. Forced air cooling is the easiest option. An external addon heat-sink can be added to the SSOP-16 package, or
alternatively, additional board metal (copper) area can be utilized as heat-sink.
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ESD PROTECTION
The LMH6739 is protected against electrostatic discharge
(ESD) on all pins. The LMH6739 will survive 2000V Human
Body model and 200V Machine model events.
Under closed loop operation the ESD diodes have no effect
on circuit performance. There are occasions, however, when
the ESD diodes will be evident. If the LMH6739 is driven by
a large signal while the device is powered down the ESD
diodes will conduct.
The current that flows through the ESD diodes will either exit
the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal
applied to the input pins. Shorting the power pins to each other
will prevent the chip from being powered up through the input.
10
LMH6739
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin SSOP
NS Package Number MQA16
11
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LMH6739 Very Wideband, Low Distortion Triple Video Buffer
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