LCT265
1C7笳
五 位数 字频率 显 示器
外形 图
简要说 明
Km“ /Ⅱ”甾 频率显示器 可 以显示 FM、 MW/
LW波 段的接收频率 ,并 能选择多种中频率 (FM:8种 、
MW/LW:3种
该器件有消隐和显示保持功能 ,工 作
电源电压范围宽 (4.5~1σ V),采 用 7.2MIn晶 体振荡
)。
产生基准频率。
ItV9ss驱 动 TΠn显 示 ;Ⅱ”“ 驱动荧光管显示。
电 路 框 图 [vDD【 l~)〓
+11v,‰ ㈤ =ssOmW⑴ “ 邪
,TA≤ “ ℃ ),PD【 ~,〓
300mW⑴ “ 硒
,TA≤ ,s℃ )]
seg OUT
BLK
HLD
∶
F-FM3
IF-FM2
-FMj
IF-AM2
-AMl
l/1000∞
汁数
50Hz
TEsT
・ 1585 ・
7X6,7灰 ⒗ -1
引出瑞排列
引出端符号
引 出端序号
咖
氵
⒛
^/F
FM-IN
AM-IN
9
F-FM1
F-Π⒑
12
F∷ 羽昭
r~^M1
I0
IF-川 陀
15
m
19
BLK
17
IILD
16
唧
10
VDD
啪
田
缅
21
%(吻 )
⒛
”
9
叱(d,)
刀
⒛
10
o,(龟 )
%
刀
12
fz(岛 )
犭
药
13
&(&)
”
I4
aa(as)
・
30
32
bJ(bJ)
瑜
X。
引出端序号
引 出端符号
1t99m
16
q(q)
笳
药
19
d3(da)
m
3s
⒛
oJ(oJ)
17
钟
fg(fa)
32
&(&)
39
37
△(助 )
39
39
1
(hG)
21
夕
3s
8
q(%)
I
6
6
d。
(d。 )
⒚
0z
kIIz(k【 1z)
7
7
Gc(龟 )
41
41
sO△
⒛
⒛
1(‘ )
订
0o
0o
2
2
4
4
5
5
眦
`(MIIz)
bac1(bac1)
⒛
2'I
助(助 )
z
犭
h。
虿
(生 )
b&q(b&砝 )
岱($)
沣 :① 段辖出 幻“,Ur符 号 :( )内 为 E”甾 的 ;不 带 ( )为 Km6的 。
垅(bz)
30
②段檎出符号脚标表示显示器位效。
允许工作条件
电源 电压
:
VDD
4.5~10V
FM-IN:正 弦 波 ,电 容 耦 合 ,VI亍 0・ 7%-p
枯入频率
珏 AM-【 N:正 弦波,电 容耦合,VI亠 0.5%~p艹
o.2~7.5MIIz
风
FM-【N:正 弦波 ,电 容耦合 ,马 〓1~1gM隔
输人福度
%Lp
AM-IN:正 弦波 ,电 容耦合 ,岛 =0.5~3叩 动
X:l:正 弦波 ,电 容耦合 ,珏
・ 1586 ・
1~18吼
o‘ ~3MIn
=0.2~7.5M盹
(0.7~0。
9VDD)%~p
5+~0。 9VDD)Vp|0
ω。
(1.0~0.9VDD)Vpˉ
p
72⒍;,%-1
纹表
MIIz、
o~30mA
b&e、 b&c
咖
o~15mA
其它端
段输 出电流
‰
啷
MIIz
o~9mA
b&e、 b&c
o~3mA
o~1.5mA
其它端
兴岛
=Q.5~0・ 9m△
时 ,VDD〓
8~10V,%~p≥
1・
Ovpˉ
p°
vm=4.5~10V,`〓 Φ
电参数 【
ˉ
输人高电平电流
Im
IL
输人低电平电流
r~FMI~r~FMa,F~AMl,r~AMz;VIF VDD
o~10uA
BLK:V1=VDD
o~2uA
F-FM1~1F-I吣 B、 r-AM1、 「 -AⅢ ⒓:VI〓 V$
o~10uA
BLK:VI〓
o~2uA
Vs
zO~500uA
A/F:V1=V$
输人 /檎 出滑 电流
檎出低电平电压
Iom
V∝
面面:输 出截止 ,VI〓 VDD
o~2uA
面D:输 出导通 ,I。 =1mA
o~1V
o~1.OV
sOo:I。 H〓 0.9mA
檎 人低 电平 电压
b&e、 b&c、 m‰ :I。 L〓 30mA
VoL
咖
o~0.7V
其它 &8out端 :I。 L=1smA
sOWⅡ △:I。 Ho-3mA
檎 出高 电平 电压
V。
H
弘5
.IJC∶
b&e、 b&c:IoR=-ImA
`2《
其它 蝴 out端
檎 出滑 电流
Ior
电源 电流
IDD
:I。 H〓
≥(VDDˉ
-0.5mA
o~10uA
It99s,Vo〓 13V
所有 ⒌g out端
檎 出截止
L￡ 刀266,Vo〓
DV
(VDDˉ 1B)V
o~3uA
≤ 18mA
特点与馋能
3
帘
25
%干 乃F习 F=v$
I●
宁
2・
>ˇ
烈璎
ε【
】
墨
<
.
<埤
∶;!}0,
!丨
{|i丨
FMl端 辖人频率Fκ Hz,
235710M
AMI翰 人 频 率 Fκ H0
I587 ・
ZX6,7灰 ⒗ -1
上极限 VDD>15V
⌒
匕 °。 >田 俐紫 妒
ρ 滔 ° >留 妒 紫 型
FMI端 搐 人频 率 FI(MHz,
HLD端
Jm嬴
°ε ˇ宜宝靼嗒
岛
岛
汪蚤
蓟
颂
衷酪
高
贯日 ˇ轹 扯 座玄 邃蜚 ˇ
为了获得 ls的 保刂
吝时l司 ,使
所接的时间常数等 f” llms
AMI端 输 人 频率
翅
馁釜iHLD的 时闷常数 (￠ CR)(n!s)
〓
0.凵
j
电源电压VD“ 、
・ 1588 ・
VDD上 升时 间若是
BLK0黹 夕
卜
常数应 为 饣≥⒛Oms
rc=1〃 R:2∞ k或 更大
200n1s、
VDD上 升时间 (msJ
⌒>ˇ 田 型迥 室蜚 ˇ凵∞
⌒>ˇ 田型迥医婪
鲫
q(MIIz)
TzCs,7X‘
-1
典型应用
FMI
LC722o
PD2
系列
I怠
ε
LC7265(LED)
淡 h噬
应 用说 明
1.%g out(段 特出)内 邯结构
2.环 、
接 7.2MIIz晶 体或作为基准频率的输人放大器。
汽沪 卜
3.FM中 频选择
r~FM1
L
L
L
L
H
H
H
H
F-眦
L
L
H
H
L
L
H
H
r~FM3
L
H
L
H
L
H
L
H
中频频率(MIIz)
+10。 900
+10。 钙
+10。 b,s
+IO。 9so
-10.7∞
-10。 犭
-IO。 b9s
-10。 卸
・ 1589 ・
Z巧 6,7X‘ △ 1
4.AM中 频选择
r~AⅢ 1
L
L
H
H
r~AMz
L
H
L
H
中频廒率(k巳 )
+0so
+亻 ⒑
+0ss
+469
显示坩且(kIn)
1
10
I
1
5.在 波段转换时 ,为 了在ˉ定的时间内保持显示 内容 ,该 椿仵设且有 HLD螨 。当该蟥且低电平时 ,显 示 内
容可保持 一定时间 ,保 持时间由外接 C、 R时 间常效决定。
2ms
∷
`
H
内部时钟
A,′
F
H1.D
保持显示内容
6.Ⅱ K:消 隐拄制端
∷
开机消隐连接图
7.VF:FM/AM频 率显示选择控制螨 ,矽 F端 开路或南电平时 ,显 示 FM频 率 ;低 电平时 ,显 示
MW/
^M或
LW频 率。
8.sOHz:st【
Hz基 准信号籀出端
、
9.唧 :测 试端 。器 件使 用时使其 开路或接 Vs。
”
10.显 示 范 围 (最 南位 ℃ 被消隐 ) ∷
FM:∞ .∞ MI】zˉ
199。 9s田 比(显 示坩且
sOkIIz);
MW/LW:∞ OkIIz~19s9Ⅲ 吖显示坩Ι Ⅱ比 或 10瓯〕。
刂
1I
¨,
・ 1590
Ordering number: EN 1197F
CMOS IC
LC7265
Received Frequency Display for Radio Receivers
Package Dimensions
Features
. Displays received frequency of each band of FM, MW, LW
static display).
. (LED
Counts local oscillation frequency and displays received
. frequency.
Number of display digits : FM-5 digits, MW-4 digits, LW-3
. digits.
Covers intermediate frequencies shown below.
unit : mm
3025B-DIP42S
[LC7265]
FM :
.
.
.
.
.
+10.700, +10.725, +10.750, +10.675 MHz
–10.700, –10.725, –10.675, –10.650 MHz
MW, LW : +450 kHz : 10 kHz step display
+450 kHz : 1 kHz step display
+455 kHz : 1 kHz step display
+469 kHz : 1 kHz step display
Contains blanking circuit to turn off display.
Contains hold circuit to hold display contents.
Uses crystal resonator having 7.2 MHz reference frequency.
Uses LB3500 (÷8 prescaler) jointly at the time of FM
reception.
Supply voltage VDD : 4.5 V to 10 V
SANYO : DIP42S
Specifications
Absolute Maximum Ratings at Ta = 25 °C, VSS = 0 V
Parameter
Maximum supply voltage
Symbol
Conditions
VDD max
Ratings
Unit
–0.3 to +11
V
Input voltage
VIN
All input pins
–0.3 to VDD+0.3
V
Output voltage
VO1
XOUT, HLD, 50 Hz, output: off
–0.3 to VDD+0.3
V
VO2
Output pins other than VO1
Allowable power dissipation
Allowable power dissipation of
segment outputs
Pd max
Ta % 65 °C
0 to 15
V
550
mW
Pd (seg)1
MHz, b&c, b&e, VDD = 4.5 to 6.5 V,
IOL = 33 mA
30
mW
Pd (seg) 2
Other outputs, VDD = 4.5 to 6.5 V,
IOL = 16.5 mA
15
mW
Pd (seg) 3
MHz, b&c, b&e, VDD = 6.0 to 10 V,
IOL = 36 mA
25
mW
Pd (seg) 4
Other outputs, VDD = 6.0 to 10 V,
IOL = 18 mA
12
mW
Operating temperature
Topr
–30 to +65
°C
Storage temperature
Tstg
–40 to +125
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
63098HA(II)/6088YT/9105KI/3173KI/D162KI/7162KI/6242KI,TS No.1197-1/6
LC7265
Allowable Operating Ranges at Ta = 25 °C, VDD = 4.5 to 10 V, VSS = 0 V
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Input frequency
Input amplitude
Segment current
Symbol
Conditions
min
VDD
typ
max
Unit
4.5
10
V
VIH1
A/F, BLK
0.7VDD
VDD
V
VIH2
FIF1, FIF2, FIF3, AIF1, AIF2
0.9VDD
VDD
V
VIL1
A/F, BLK
0
0.3VDD
V
VIL2
FIF1, FIF2, FIF3, AIF1, AIF2
0
0.1VDD
V
fIN1
FMI, sine wave, capacitive coupling,
VIN1 = 0.7Vp-p
1
18
MHz
fIN2
AMI, sine wave, capacitive coupling,
VIN2 = 0.5Vp-p*
0.5
3
MHz
fIN3
XIN
0.2
7.5
MHz
VIN1
FMI, sine wave, capacitive coupling,
fIN1 = 1 to 18 MHz
0.7
0.9VDD
Vp-p
VIN2
AMI, sine wave, capacitive coupling,
fIN2 = 0.5 to 3 MHz
0.5*
0.9VDD
Vp-p
VIN3
XIN, sine wave, capacitive coupling,
fIN3 = 0.2 to 7.5 MHz
1.0
0.9VDD
Vp-p
Iseg1
MHz, b&e, b&c
0
30
mA
Iseg2
Other outputs
0
15
mA
*: For fIN2 = 0.5 MHz to 0.9 MHz and VDD = 8 to 10 V, VIN2 min = 1.0 Vp-p applies.
Electrical Characteristics at Ta = 25 °C, VDD = 4.5 to 10 V, VSS = 0 V
Parameter
Input high-level current
Symbol
Conditions
IIH1
FIF1, FIF2, FIF3, AIF1, AIF2
IIH2
BLK
IIL1
FIF1, FIF2, FIF3, AIF1, AIF2
IIL2
BLK
min
VI = VDD
VI = VDD
VI = VSS
typ
0
max
Unit
10
µA
0
2
µA
0
10
µA
0
2
µA
IIL3
A/F
VI = VSS
VI = VSS
Input floating voltage
VIF
A/F
VI = open
Input/output high-level leakage
current
IOFF
HLD, output off, VI = VDD
0
2
µA
VOL1
HLD, output on, IO = 1 mA
0
1
V
VOL2
b&e, b&c, MHz VDD = 4.5 to 10 V,
IOL = 30 mA
0
0.7
V
VOL3
Segments other than above
VDD = 4.5 to 10 V, IOL = 15 mA
0
0.7
V
VOL4
50 Hz, IO = 0.2 mA
0
1.0
V
Input low-level current
Output low-level voltage
Input high-level threshold voltage
Output off leakage current
Current drain
Vth
IOFF2
IDD
HLD
All segments output pins, VO = 13 V, output off
FM mode, A/F = open or VDD, fIN1 = 18 MHz,
0.7Vp-p or (AM mode, A/F = VSS, fIN2 =
3 MHz, 0.5Vp-p) fIN3 = 7.2 MHz, 1Vp-p
FIF1, FIF2, FIF3 = VDD
AIF1, AIF2 = VDD
HLD, BLK = VDD
other pins open
20
500
µA
0.8VDD
VDD
V
0.4VDD 0.5VDD 0.7VDD
V
0
10
µA
0
18
mA
Pin Assignment
Top view
No.1197-2/6
LC7265
Equivalent Circuit Block Diagram
1. Display
1-1 Display font
1-2 Lighting system
Static lighting
1-3
.
Display range (High-order 1 digit : zero blanking)
. FM
MHz to 199.95 MHz 50 kHz step
. MW, LW :: 00.00
000 kHz to 1999 kHz
10 kHz or 1 kHz step
2. Pin Description
2-1
2-2
2-3
. a to g, b&c, b&e, MHz, kHz : LED
.V ,V
.X , X
DD
IN
SS
OUT
: Power supply pins
: Crystal resonator or input amp pin
No.1197-3/6
LC7265
2-4
2-5
. FIF1, FIF2, FIF3 : FM IF select pins
FIF1
0
0
0
0
1
1
1
1
FIF2
0
0
1
1
0
0
1
1
FIF3
0
1
0
1
0
1
0
1
IF (MHz)
+10.700
+10.725
+10.675
+10.750
–10.700
–10.725
–10.675
–10.650
. AIF1, AIF2 : AM IF select pins
AIF1
0
0
1
1
AIF2
0
1
0
1
IF (kHz)
+450 (2)
+450 (1)
+455
+469
1 : High level (VDD)
0 : Low level (VSS)
(Note) 450 kHz(1) : 10 kHz step display, others : 1 kHz step display
2-6
. HLD : Display contents hold pin
Normally, this pin is set at high level. To hold display contents, this pin is set at low level. Connecting time constant circuit
to this pin makes it possible to hold display contents for a certain period of time at the time of FM/MW, LW band
selection.
Internal clock
A/F
Depending on C, R
HLD
Display contents hold
2-7
Threshold
voltage of e
. BLK : Display blanking pin
Example of blanking misdisplay
at the time of application of power.
2-8
. FMI, AMI : Local oscillation signal input pins
FMI — For FM
: 0.7Vp-p input sensitivity
AMI — For MW, LW : 1.0Vp-p input sensitivity (VDD = 8 to 10 V, fIN = 0.5 to 0.9 MHz)
0.5Vp-p input sensitivity (other than above)
2-9
. A/F : FM/MW, LW select pin
FM
— Pin open or high level
MW, LW — Low level
2-10
. 50 Hz : 50 Hz time base output pin
No.1197-4/6
LC7265
Hold time – time constant connected to HLD pin
Time constant connected to BLK pin − VDD rise time
Time constant connected
to BLK pin (t = CR) – ms
Hold time – ms
To obtain 1-s hold time make time
constant connected to HLD pin 720 ms.
C = 2.2 µF
R = 470 kΩ
Note: time constant connected to HLD
pin must be 100 ms or more.
For FMI input : 18 MHz, 0.7Vp-p,
A/F = VDD
For AMI input : 3 MHz, 0.5Vp-p,
A/F = VSS
For FMI input
Common conditions
For AMI input
Other pins open
VDD rise time – ms
IDD – Ta
Current drain, IDD – mA
Current drain, IDD – mA
Time constant connected to HLD pin, (t = CR) – ms
IDD – VDD
If VDD rise time is 200 ms,
make time constant externally
connected to BLK pin 200 ms
or more.
C = 1 µF or more
R = 200 kΩ
For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD
For AMI input : 3 MHz, 0.5Vp-p,A/F = VSS
For FMI input
For AMI input
Common conditions
Other pins open
Ambient temperature, Ta – °C
Vp-p – fIN2
Input amplitude – mVp-p
Input amplitude – mVp-p
Supply voltage, VDD – V
Vp-p – fIN1
FMI input frequency, fIN1 – Hz
VDD – fIN1
AMI input frequency, fIN2 – Hz
VDD – fIN2
Lower standard value
FMI input frequency, fIN1 – MHz
Supply voltage, VDD – V
Supply voltage, VDD – V
Upper standard value. VDD = 15 V or more
Upper standard value
Lower standard value
AMI input frequency, fIN2 – MHz
No.1197-5/6
LC7265
Upper standard value
high-level threshold voltage
Lower standard value
low-level threshold voltage
Vt – VDD
BLK threshold voltage, Vt – V
HLD threshold voltage, Vt – V
Vt – VDD
Supply voltage, VDD – V
Supply voltage, VDD – V
Segment outputs (IOL = 15 mA)
other than 5b&e, 1b&c, MHz
IOL – VOL
Output current, IOL – mA
Output impedance, ROUT – Ω
ROUT – VDD
Segment outputs other
than MHz, b&c, b&e
This data is in case of
flowing current to one
segment only.
Segment outputs (IOL = 30 mA)
of 5b&e, 1b&c, MHz
Supply voltage, VDD – V
Output voltage, VOL – V
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment,
nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or
indirectly cause injury, death or property loss.
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors
and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and
expenses associated with such use:
2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO
ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume
production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use
or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice.
No.1197-6/6