ETC AP1661

Data Sheet
POWER FACTOR CORRECTION CONTROLLER
General Description
Features
The AP1661 is an active power factor control IC which
is designed mainly for use as pre-converter in electronic ballast, AC-DC adapters and off-line SMPS
applications.
·
·
·
·
The AP1661 includes an internal start-up timer for
stand-alone applications, a one-quadrant multiplier to
realize near unity power factor and a zero current
detector to ensure DCM boundary conduction operation. The totem pole output stage is capable of driving
power MOSFET with 600mA source current and
800mA sink current.
·
·
·
·
Designed with advanced BiCMOS process, the
AP1661 features low start-up current, low operation
current and low power dissipation. The AP1661 also
has rich protection features including over-voltage protection, input under-voltage lockout with hysteresis
and multiplier output clamp to limit maximum peak
current.
·
AP1661
Zero Current Detection Control for DCM Boundary Conduction Mode
Adjustable Output Voltage with Precise OverVoltage Protection
Low Start-up Current with 50μA Typical Value
Low Operating Supply Current with 4mA Typical
Value
1% Precision Internal Reference Voltage
Internal Start-up Timer
Disable Function for Reduced Current
Consumption
Totem Pole Output with 600mA Source Current
and 800mA Sink Current Capability
Under-Voltage Lockout with 2.5V of Hysteresis
Applications
·
·
·
This IC is available in SOIC-8 and DIP-8 packages.
SOIC-8
AC-DC Adapter
Off-line SMPS
Electronic Ballast
DIP-8
Figure 1. Package Types of AP1661
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
1
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Pin Configuration
M Package/P Package
(SOIC-8/DIP-8)
INV
1
8
VCC
COMP
2
7
GD
MULT
3
6
GND
CS
4
5
ZCD
Figure 2. Pin Configuration of AP1661 (Top View)
Pin Description
Pin Number
Pin Name
1
INV
Function
2
COMP
Output of the error amplifier
3
MULT
Input of the multiplier
4
CS
Inverting input of the error amplifier
Input of the current control loop comparator
5
ZCD
Zero current detection input. If it is connected to GND, the device is
disabled
6
GND
Ground. Current return for gate driver and control circuits of the IC
7
GD
8
VCC
Gate driver output
Supply voltage of gate driver and control circuits of the IC
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
2
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Functional Block Diagram
COMP
MULT
2
INV
CS
3
4
1
Multiplier
Voltage
Regulation
VCC
Overvoltage
Detection
13V
8
R Q
S
Internal
R1 Supply 7.5V
22V
VCC
7
GD
Driver
Vref
R2
Zero Current
Detector
2.1V
1.6V
Starter
Enable
Disable
6
5
ZCD
GND
Figure 3. Functional Block Diagram of AP1661
Ordering Information
AP1661
-
Circuit Type
E1: Lead Free
G1: Green
Package
M: SOIC-8
P: DIP-8
TR: Tape and Reel
Blank: Tube
Package
Temperature
Range
SOIC-8
-40 to 85oC
DIP-8
-40 to 85oC
Part Number
Lead Free
Marking ID
Green
Lead Free
Green
Packing Type
AP1661M-E1
AP1661M-G1
1661M-E1
1661M-G1
Tube
AP1661MTR-E1
AP1661MTR-G1
1661M-E1
1661M-G1
Tape & Reel
AP1661P-E1
AP1661P-G1
AP1661P-E1
AP1661P-G1
Tube
BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Products with
"G1" suffix are available in green packages.
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
3
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
Value
Unit
Power Supply Voltage
VCC
20
V
Operating Supply Current
ICC
30
mA
Driver Output Current
IOUT
±800
mA
-0.3 to 7
V
-0.3 to 7
V
Input/Output of Error Amplifier, Input of
Multiplier
Current Sense Input
VINV, VCOMP,
VMULT
VCS
Zero Current Detector Input
IZCD
Thermal Resistance Junction-Ambient
RθJA
Power Dissipation and Thermal Characteristics @ TA=50oC
PTOT
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10
Seconds)
Source
-50
Sink
10
DIP-8
100
SOIC-8
150
DIP-8
1
SOIC-8
0.65
mA
oC/W
W
TJ
-40 to150
oC
TSTG
-65 to 150
oC
TLEAD
260
o
C
ESD (Human Body Model)
3000
V
ESD (Machine Model)
300
V
Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device reliability.
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
4
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Electrical Characteristics
VCC=14.5V, TA=-25oC to 125oC, unless otherwise specified.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
11
12
13
V
8.7
9.5
10.3
V
2.2
2.5
2.8
V
20
V
50
90
μA
CL=1nF @frequency=70KHz
4
5.5
In OVP condition Vpin1=2.7V
1.4
2.1
2.6
4
mA
Under Voltage Lockout Section
Turn-on Threshold
VCC-ON
VCC rising
Turn-off Threshold
VCC-OFF
VCC falling
Hysterisis
VCC-HYS
VCC Operating Range
VCC
After turn-on
10.3
Total Supply Section
Start-up Current
Operating Supply Current
ISTART-UP
ICC
Quiescent Current
IQ
Quiescent Current
IQ
VCC Zener Voltage
VZ
VCC=11V before turn-on
20
Vpin5≤150mV, VCC>VCC-OFF
mA
1.4
2.1
mA
Vpin5≤150mV, VCC<VCC-OFF
20
50
90
μA
ICC=20mA
20
22
24
V
2.465
2.5
2.535
Error Amplifier Section
Voltage Feedback Input
Threshold
VINV
Line Regulation
TA=25 oC
10.3V<VCC<20V
VCC=10.3V to 20V
Input Bias Current
IINV
VINV=0V
Voltage Gain
GV
Open Loop
Gain Bandwidth
GB
Output
Voltage
Output
Current
2.44
60
V
2.56
2
5
mV
-0.1
-1
μA
80
dB
1
MHz
Upper Clamp
Voltage
VCOMP-H
ISOURCE=0.5mA
5.8
Lower Clamp
Voltage
VCOMP-L
ISINK=0.5mA
2.25
Source Current
ICOMP-H
VCOMP=4V, VINV=2.4V
-2
-4
Sink Current
ICOMP-L
VCOMP=4V, VINV=2.6V
2.5
4.5
V
Enable Threshold
-8
720
VINV-TH
mA
mV
Multiplier Section
Linear Input Voltage Range
Output Maximum Slope
Gain
VMULT
ΔVCS/
ΔVMULT
k
0 to 3
VMULT: 0 to 0.5V,
VCOMP=Upper Clamp Voltage
VMULT=1V, VCOMP=4V
Aug. 2008 Rev. 1. 1
0 to 3.5
V
1.7
0.45
0.6
0.75
1/V
BCD Semiconductor Manufacturing Limited
5
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Electrical Characteristics (Continued)
VCC=14.5V, TA=-25oC to 125oC, unless otherwise specified.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
-0.05
-1.0
μA
Current Sense Section
Input Bias Current
ICS
Current Sense Offset Voltage
VCS-OFFSET
Current Sense Reference
Clamp
VCS-CLAMP
Delay to Output
VCS =0V
VMULT=0V
30
VMULT=2.5V
5
VCOMP=Upper Clamp Voltage,
VMULT=2.5V
1.6
td(H-L)
mV
1.7
1.8
V
200
450
ns
Zero Current Detection Section
Input Threshold Voltage,
VZCD Rising Edge
Hysteresis Voltage
Upper Clamp Voltage
VZCD-R
(Note 2)
VZCD-RTH
(Note 2)
0.3
0.5
0.7
IZCD=20μA
4.5
5.1
5.9
IZCD=3mA
4.7
5.2
6.1
IZCD=-3mA
0.3
0.65
VZCD-H
2.1
V
V
V
Lower Clamp Voltage
VZCD-L
1
V
Source Current Capability
IZCD-SR
-3
-10
mA
Sink Current Capability
IZCD-SN
3
10
mA
250
mV
Sink Bias Current
IZCD-B
Disable Threshold
VZCD-DIS
Disable Hysterisis
VZCD-HYS
Restart Current After
Disable
IZCD-RES
1V≤VZCD≤4.5 V
μA
2
150
200
100
VZCD<VDIS; VCC>VCC-OFF
-100
-200
mV
-300
μA
Drive Output Section
Dropout Voltage
VOH
VOL
IGD-SOURCE=200 mA, VCC=12V
2.5
3
IGD-SOURCE=20 mA, VCC=12V
2
2.6
IGD-SINK=200 mA, VCC=12V
0.9
1.9
V
V
Output Voltage Rise Time
tR
CL=1nF
40
100
ns
Output Voltage Fall Time
tF
CL=1nF
40
100
ns
13
15
V
1.1
V
Output Clamp Voltage
UVLO Saturation
VO-CLAMP
VOS
IGD-SOURCE=5 mA, VCC=20V
10
VCC=0 to VCC-ON, ISINK=10mA
Output Over Voltage Section
OVP Triggering Current
Static OVP Threshold
IOVP
35
40
45
μA
VOVP_TH
2.1
2.25
2.4
V
tSTART
70
150
400
μs
Restart Timer
Restart Timer
Note 2: Limits over the full temperature are guaranteed by design, but not tested in production.
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
6
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Typical Performance Characteristics
6
33.5
33.0
5
Supply Current (mA)
32.5
32.0
IOVP (μA)
31.5
31.0
30.5
30.0
29.5
4
3
2
1
29.0
28.5
-40
0
-20
0
20
40
60
80
100
120
140
0
5
10
15
20
25
Supply Voltage (V)
O
Temperature ( C)
Figure 5. Supply Current vs. Supply Voltage
Figure 4. OVP Current Threshold vs. Temperature
12.5
2.550
VCC-ON
2.525
12.0
2.500
Voltage (V)
Voltage (v)
11.5
11.0
2.475
2.450
2.425
10.5
2.400
VCC-OFF
10.0
2.375
9.5
-60
-40
-20
0
20
40
60
80
100
120
2.350
-40
140
-20
0
20
40
60
80
100
120
140
O
O
Temperature ( C)
Temperature ( C)
Figure 6. Under Voltage Lockout Threshold vs. Temperature
Aug. 2008 Rev. 1. 1
Figure 7. Voltage Feedback Input Threshold
vs. Temperature
BCD Semiconductor Manufacturing Limited
7
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Typical Performance Characteristics (Continued)
0.0
4.5
4.0
-0.5
3.5
-1.0
Voltage (V)
Voltage (V)
3.0
2.5
2.0
1.5
-1.5
-2.0
1.0
-2.5
0.5
0.0
-3.0
0
100
200
300
400
500
0
100
200
Current (mA)
300
400
500
Current (mA)
Figure 9. Output Saturation Voltage vs. Source Current
Figure 8. Output Saturation Voltage vs. Sink Current
1.8
1.6
1.4
VCOMP=2.6
VCOMP=2.8
VCOMP=3
VCOMP=3.2
VCOMP=3.5
VCOMP=4
VCOMP=4.5
VCOMP=5
VCOMP=MAX
VCS (V)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VMULT (V)
Figure 10. Multiplier Characteristics Family
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
8
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
Functional Block Description
AP1661 is a high performance power factor correction
controller which operates in DCM boundary conduction mode. The PFC converter's switch will be turned
on when the inductor current reduces to zero and
turned off when the sensed inductor current reaches the
required reference which is decided by the output of
multiplier.
The error amplifier regulates the PFC output voltage.
The internal reference on the non-inverting input of the
error amplifier is 2.5V. The error amplifier's inverting
input (INV) is connected to an external resistor divider
which senses the output voltage. The output of error
amplifier is one of the two inputs of multiplier. A
compensation loop is connected outside between INV
and the error amplifier output. Normally, the
compensation loop bandwidth is set very low to realize
high power factor for PFC converter.
To make the over voltage protection fast, the internal
OVP function is added. If the output over voltage
happens, excess current will flow into the output pin of
the error amplifier through the feedback compensation
capacitor. (see Figure 11) The AP1661 monitors the
current flowing into the error amplifier output pin.
When the detected current is higher than 40μA, the
INV 1
R2
Error
Amplifier
COMP
MULT
2
3
R1 =
ΔVOVP
40 μA
Multiplier
The multiplier has two inputs. One (Pin 3) is the
divided AC sinusoidal voltage which makes the current
sense comparator threshold voltage vary from zero to
peak value. The other input is the output of error
amplifier (Pin 2). In this way, the input average current
wave will be sinusoidal as well as reflects the load
status. Accordingly a high power factor and good THD
are achieved. The multiplier transfer character is
designed to be linear over a wide dynamic range,
namely, 0 V to 3V for Pin 3 and 2.0 V to 5.8 V for Pin
2. The relationship between the multiplier output and
inputs is described as below equation.
VCS = k × (VCOMP − 2.5) × VMULT
where VCS (Multiplier output) is the reference for the
current sense, k is the multiplier gain, VCOMP is the
voltage on pin 2 (error amplifier output) and VMULT is
the voltage on pin 3.
I
R1
dynamic OVP is trigged. The IC will be disabled and
the drive signal is stopped. If the output over voltage
lasts so long that the output of error amplifier goes
below 2.25V, static OVP will take place. Also the IC
will be disabled until the output of error amplifier goes
back to its linear region. R1 and R2 (see Fig. 11) will
be selected as below:
R1
Vo
=
−1
R 2 2.5V
Error Amplifier and Over-Voltage Protection
VO
AP1661
Driver
IOVP
Multiplier
Current Sense/Current Sense Comparator
PWM
The PFC switch's turn-on current is sensed through an
external resistor in series with the switch. When the
sensed voltage exceeds the threshold voltage (the
multiplier output), the current sense comparator will
become low and the external MOSFET will be turned
off. This insures a cycle-by-cycle current mode control
operation. The maximum current sense reference is
1.8V. The max value usually happens at startup process
or abnormal conditions such as short load.
2.5V
2.25V
IOVP
40µA
+
AP1661
Figure 11. Error Amplifier and OVP Block
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
9
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
Functional Block Description
(Continued)
AP1661
voltage decreases below 1.6V, the gate drive signal
becomes high to turn on the external MOSFET. 500mV
of hysteresis is provided to avoid false triggering. The
ZCD pin can be used for disabling the IC. Making its
voltage below 0.15V or short to the ground will disable
the device thus reduce the IC supply current
consumption.
Zero Current Detection
AP1661 is a DCM boundary conduction current mode
PFC controller. Usually, the zero current detection
(ZCD) voltage signal comes from the auxiliary
winding of the boost inductor. When the ZCD pin
Typical Application
L2 160μH
L3
D2 MUR460
R1
820K
R6 180K
L1
500μH
C1
220nF/275V
R3
1M
D1
R7 180K
D3
1N4148
F1
2.5A/250V
NTC
C2
220nF
500V
C3
330nF
500V
L
N
Z1
15V
R9
68K
R4
680K
C10
22μF
25V
R5
10K
JC2
R2
470K
C7
680nF
R14
12K
C8
330nF
ZCD COMP
JC1
85 to 265V AC
GND
C6 R8
12nF 100
INV
VCC
GD
MULT
CS
R13
10
Q1
11N65C3
C9
47μF
450V
R10
8.2K
GND
C4
100nF
U1
AP1661
R16
0.33/1W
L3:
Core type RM10, material 3C90
primary: 660uH, 66 turns of litze wire 0.1mm*30
secondary: 7 turns wire of 0.2mm
Figure 12. 85 to 265V Wide Range Input 90W PFC Demo Board Electrical Schematic Circuit
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
10
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Mechanical Dimensions
DIP-8
Unit: mm(inch)
0.700(0.028)
7.620(0.300)TYP
1.524(0.060) TYP
6°
5°
6°
3.200(0.126)
3.600(0.142)
3.710(0.146)
4.310(0.170) 4°
4°
0.510(0.020)MIN
3.000(0.118)
3.600(0.142)
0.204(0.008)
0.360(0.014)
8.200(0.323)
9.400(0.370)
0.254(0.010)TYP
2.540(0.100) TYP
0.360(0.014)
0.560(0.022)
0.130(0.005)MIN
6.200(0.244)
6.600(0.260)
R0.750(0.030)
Φ3.000(0.118)
Depth
0.100(0.004)
0.200(0.008)
9.000(0.354)
9.400(0.370)
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
11
Data Sheet
POWER FACTOR CORRECTION CONTROLLER
AP1661
Mechanical Dimensions (Continued)
SOIC-8
4.700(0.185)
5.100(0.201)
7°
Unit: mm(inch)
0.320(0.013)
1.350(0.053)
1.750(0.069)
8°
8°
7°
0.675(0.027)
0.725(0.029)
D
5.800(0.228)
1.270(0.050)
6.200(0.244)
TYP
D
20:1
φ 0.800(0.031)
0.300(0.012)
R0.150(0.006)
0.100(0.004)
0.200(0.008)
0°
8°
1.000(0.039)
3.800(0.150)
4.000(0.157)
0.330(0.013)
0.190(0.007)
0.250(0.010)
1°
5°
0.510(0.020)
0.900(0.035)
R0.150(0.006)
0.450(0.017)
0.800(0.031)
Aug. 2008 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
12
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AP1661 Demo Board Manual
AP1661 Demo Board Manual
Content:
1. Description
2. Specifications
3. Design procedure
4. Schematics of the Demo Board
5. PCB Layout
6. Photo View of the Demo Board
7. BOM
8. Test Result for Typical Performance and Characteristics
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AP1661 Demo Board Manual
1. Description:
The AP1661 is an active power factor control IC which is designed mainly for use as
pre-converter in electronic ballast and off-line power supply applications. This Demo manual
provides the design procedure for a power factor correction demo board circuit and evaluates its
performance.
2. Specifications
The target specification is as below:
AC mains RMS voltage: Vinrms = 85 to 265V
DC output regulated voltage: Vo = 395V
Rated output power: Po = 90W
Minimum switching frequency: fsw(min) = 35kHz
Expected efficiency: η> 90%
Full load output voltage ripple: ∆VO≤±20V
Maximum output overvoltage: ∆VOVP = 50V
3. Design procedure
3.1 power stage design
Boost inductor
The Boost inductance (L) is usually determined so that the minimum switching frequency is
greater than the maximum frequency of the internal starter (15kHz) to ensure a correct DCM
boundary Conduction Mode operation.
After some algebra, the following instantaneous switching frequency along a line cycle equation
can be found:
f sw (θ) =
(Vo − 2 ⋅ Vin rms ⋅ sin( θ)) ⋅ Vin 2 rms ⋅ η
1
=
Ton + Toff
2 ⋅ L ⋅ PO ⋅ Vo
(1)
The switching frequency will be minimum at the top of the sinusoid, maximum at the zero
crossings of the line voltage.
The absolute minimum frequency fsw(min) can occur at either the maximum or the minimum mains
voltage, thus the inductor value is defined by:
L =
( Vo − 2 ⋅ Vin rms ) ⋅ Vin 2 rms ⋅ η
2 ⋅ f sw min ⋅ PO ⋅ Vo
(2)
where Vinrms can be either Vinrms(min) or Vinrms(max).
If we set the minimum switching frequency: fsw(min) = 15kHz, then after calculation according to
(2), the Boost inductor value is should be lower than 1.2mH. We choose 660uH in the design.
After calculation of the inductance, we should design the inductor. The maxim inductor current is:
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I L max_ peak =
AP1661 Demo Board Manual
2 2 ⋅ Vo ⋅ Io
η ⋅ Vinrms(min)
(3)
By AP method, we can select a type of core. Then the inductor primary turns can be calculated
according to (4)
N=
L ⋅ I L max_ peak
(4)
Bs ⋅ A e
The boost inductor winding turns ratio, m, should be selected as following:
m≤
Vo − 2 ⋅ Vinrms(max)
2. 1
(5)
In this design, we choose RM10/I core with 3C90 ferrite material, which effective area
Ae=96.6mm2, Bs=0.3T. The inductor primary is 70 turns of lize wire 30*0.1mm, secondary is 8
tunrs wire of 0.2mm diameter.
Output capacitor
The output bulk capacitor (Co) selection depends on the DC output voltage, the allowed
overvoltage, the output voltage ripple and ripple current on the capacitor.
To achieve high power factor, the output voltage feedback control loop is slow. As a result, there is
twice the mains frequency fline (100 to 120Hz) voltage ripple across the output capacitor. Besides,
high frequency ripple because of Boost converter switching appears on the ESR of the output
capacitor.
∆Vo = Io ⋅
1
+ ESR 2
(4π ⋅ f line ⋅ Co ) 2
With a low ESR capacitor,
Po
Co ≥
4π ⋅ f line ⋅ Vo ⋅ ∆Vo
(6)
(7)
If the load is resistive, the ripple current of output capacitor is:
Ico (rms) =
32 2 ⋅ Po 2
Vo
− ( )2
2
9π ⋅ η ⋅ Vinrms ⋅ Vo Ro
(8)
We choose 47uF/450V electric capacitor as the output capacitor.
MOSFET selection
MOSFET RMS current is obtained by (9) and the conduction loss of the MOSFET is calculated by
(10). The circuit works in DCM boundary conduction Mode, so the MOSFET turn on loss is
negligible. MOSFET turn off loss and discharge loss are obtained by (11) and (12) respectively.
The switching frequency varies according to the line condition and load condition. Therefore the
switching frequency is the average value during a line period. The total MOSFET loss can be
calculated by (13).
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I Qrms = I L max_peak ⋅
AP1661 Demo Board Manual
1 4 2Vinrms(min)
2 2 ⋅ Vo ⋅ Io
1 4 2Vinrms(min)
−
=
⋅
−
6
9πVo
η ⋅ Vinrms(min) 6
9πVo
2
Pon = IQrms
⋅ R DS
Pturn −off =
(9)
(10)
2
Vo 2 ⋅ Io
1
Vo ⋅ I L max_ peak ⋅t f ⋅f sw =
⋅t f ⋅f sw
⋅
3 η ⋅ Vinrms(min)
6
(11)
4
Pdisch arg e = Coss ⋅ Vo 2 ⋅ f sw
3
(12)
PMOSFET=Pon+Pturn-off+Pdischarge
(13)
The temperature rise of MOSFET will be ∆T = Rth j− a ⋅ PMOSFET
(14)
Boost Diode selection
Diode average current can be calculated by (15). The total diode loss can be calculated by (16).
IDavg=IOmax
(15)
PD=Vf IDavg
(16)
3.1 Control circuit design
1) Output voltage sensing resistor and feedback loop design
The error amplifier regulates the PFC output voltage. The internal reference on the
non-inverting input of the error amplifier is 2.5V. The error amplifier’s inverting input (INV) is
connected to an external resistor divider which senses the output voltage. The output of error
amplifier is one of the two inputs of multiplier. A compensation loop is connected outside between
INV and the error amplifier output. Normally, the compensation loop bandwidth is set very low to
realize good power factor for PFC converter.
To make the over voltage protection fast, the internal OVP function is added. The OVP alarm
level current is 40µA. When the OVP is trigged, it will disable the IC and stop the drive signal.
R1+ R2 and R10 (see fig.1) will be then selected as follow:
R1 + R 2
Vo
=
−1
R10
2.5V
R1 + R 2 =
∆VOVP
40µA
(17)
In this design, ∆VOVP = 50V, so the calculated value for R1+R2 is 1.25Mohm. We choose R1
820Kohm, R2 470Kohm and R10 value is 8.2Kohm.
Generally, the control loop bandwidth of PFC converter is set below 20Hz to eliminate the
100Hz ripple voltage. In the simplest case, this compensation is just a capacitor, which provides a
low frequency pole as well as a high DC gain. A simple method to define the capacitance value is
to provide ~40dB attenuation at 100Hz:
CCOMP =
10
2π ⋅ (R1 + R 2)
(18)
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AP1661 Demo Board Manual
2) Line voltage sense resistor design
The linear operation of the multiplier is guaranteed inside the range 0 to 3V of VMULT and the
range 0 to 1.6V of VCS. The maximum peak value VMULTpk for VMULT, will occur at maximum
mains voltage, should be 3V or below. The divider (see fig.13) will be as (19):
R3
VMULTpkx
=
(19)
R1 + R 2
2 ⋅ Vinrms(max)
3)current sense resistor design
The sense resistor value is calculated as (20):
RS ≤
VCSpk
(20)
I Rspk
where VCSpk is the maximum voltage of VCS, can be set 1.6V for linear operation in the whole
working range.
and: I Rspk = I L max_ peak
(21)
The power dissipated in Rs, is given by: PRs = Rs ⋅ I Qrms 2 .
(22)
In this design, we choose Rs=0.33ohm/1W.
4) Zero current detection resistor design
The maximum sink current of ZCD pin is 10mA, therefore zero current detection resistor is
determined by（23）
R8 >
Vo
m ⋅ 10mA
(23)
5) Start-up circuit design
The start-up resistor is calculated by (24)
R st ≤
Vin ( peak _ min) − VCC _ ON
ISTART _ U
(24)
The start-up capacitor should maintain Vcc voltage higher than the UVLO voltage before the
auxiliary winding supplies IC operating current. So the start-up capacitor is calculated by (25).
Cst ≥
4mA
2π ⋅ f line ⋅ 2.5V
(25)
In this design, VCC_ON is 12V, ISTAR_U is 90uA (max), so the calculated Rst<1.2Mohm. We choose
R6 and R7 as 2 180Kohm resistors in series. The start-up capacitor is 47uF.
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.4.
AP1661 Demo Board Manual
Schematics of the Demo Board
The designed demo board electrical schematic is shown in Fig.1
Fig.1 Demo board schematic
5. PCB Layout
Figure 2. demo board PCB and Component layout( Top view, real size1 25mm×56mm )
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AP1661 Demo Board Manual
Figure 3. demo board PCB and Component layout( Bottom view, real size 125mm×56mm)
6. Photo View of the Demo Board
Figure 4. Photo view of the demo board
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7. BOM
Part Type
Designator
Part Type
Designator
XC 220nF/275V
C1
660uH
L3
220 nF /500V
C2
11N60
Q1
330 nF /500V
C3
820K
R1
10 nF /25V
C4
470K
R2
220pF /25V
C5
1M
R3
12 nF /25V
C6
680K
R4
680pF /25V
C7
10K
R5
330nF /25V
C8
180K
R6, R7
47uF /450V
C9
100
R8
47uF /25V
C10
68K
R9
RS205M
D1
8.2K
R10
MUR460
D2
1K
R12
1N4148
D3
10
R13
Fuse 2.5A/250V
F1
12K
R14
AC Socket
J1
0.33Ohm/1W
R16
DC Socket
J2
AP1661
U1
500uH
L1
18V
Z1
160uH
L2
5D-9
NTC
8. Test Result for Typical Performance and Characteristics
DEMO BOARD EVALUATION RESULTS
To evaluate the performance of the PFC demonstration board, the following parameters have been
measured: PF (Power Factor), THD (Current Total Harmonic Distortion), ∆ (Peak-to-Peak Output
Voltage Ripple), Vo (Output Voltage), η (Efficiency). The demo board evaluation results are as
below:
8.1 Performance test results at full load
Vinrms
Pin
Po
η
Vo
∆Vo
PF
THD
Harmonic
(V)
(W)
(W)
(%)
(V)
(V)
(%)
passed?
85
98.4
90.93
0.92
388.6
24
0.999
3.5
passed
110
96.4
91.07
0.94
389.2
24
0.999
4.3
passed
150
95.2
91.10
0.96
389.3
24
0.998
4.7
passed
230
94.2
91.03
0.97
389.0
24
0.991
6.3
passed
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250
94.1
91.10
0.97
389.3
24
0.987
7.7
passed
265
94.0
91.10
0.97
389.3
24
0.981
9.8
passed
PF
THD
Harmonic
(%)
passed?
8.2 Performance test results at half load
Vinrms
Pin
Po
η
Vo
∆Vo
(V)
(W)
(W)
(%)
(V)
(V)
85
49.39
45.96
0.93
389.5
22
0.999
4.52
passed
110
48.98
45.96
0.94
389.5
22
0.998
5.56
passed
150
48.80
45.97
0.94
389.6
22
0.995
7.21
passed
230
48.40
45.91
0.95
389.1
22
0.974
10.36
passed
250
48.60
45.98
0.95
389.7
22
0.963
12.87
passed
265
48.50
46.00
0.95
389.8
22
0.949
13.19
passed
PF
THD
Harmonic
(%)
passed?
8.3 Performance test results at quarter load
Vinrms
Pin
Po
η
Vo
∆Vo
(V)
(W)
(W)
(%)
(V)
(V)
85
25.04
22.99
0.92
389.5
21
0.997
5.7
passed
110
25.05
22.99
0.92
389.5
21
0.995
6.85
passed
150
25.23
22.99
0.91
389.6
21
0.984
10.23
passed
230
25.44
23.00
0.90
389.1
21
0.906
13.45
passed
250
25.38
22.99
0.91
389.7
21
0.885
22.2
passed
265
25.45
23.00
0.90
389.8
21
0.875
23.73
passed
8.4 Current waveform and THD analysis
input voltage(Ch2) and input current(Ch1) waveform and current harmonics analysis at 230V,
75W input
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AP1661 Demo Board Manual
input voltage(Ch2) and input current(Ch1) waveform and current harmonics analysis at 230V, full
load
8.5 PFC inductor current waveform
PFC inductor current waveform
8.6 Output Voltage Ripple
Output Voltage Ripple waveform @ 230V/50Hz, Pout=90W
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8.7 Vds and Vgs waveform of MOSFET
Vds(Ch1) and Vgs(Ch2) of MOSFET at 85V ac input, full load
Vds(Ch1) and Vgs(Ch2) of MOSFET at 265V ac input, full load
8.8 Start up waveform
Ch1: Vo at start up
Ch2: input current
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8.9 Vcs (pin 4 of AP1661) waveform
Vcs at 85V ac input, full load
8.10 Efficiency
97
96
efficiency %
95
94
fullload
halfload
93
92
91
90
80
100
120
140
160
180
200
220
240
260
280
input voltage
Efficiency @ Full Load and Half Load
8.11 Transient Load Response
Output from no load to full load
Output from full load to no load
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AP1661 Demo Board Manual
Nomenclature
Ae: the core effective area
Bs: maximum saturation flux density
IL(peak_max) : maximum inductor current peak value
ID : boost diode current
IQrms : MOSFET rms current
IDavg : diode average current
IO : output current
Ico(rms) : ripple current of output capacitor RMS value
ISTAR_U: IC Start-up Current
IRSpk: the maximum current of current sense resistor
Vin (rms) : input voltage RMS value
Vin (rms_max) : maximum input voltage RMS value
Vin (rms_min) : minimum input voltage RMS value
Vin (peak_min) : minimum input voltage peak value
VCSpk: maximum voltage of VCS
Vcc_on: Vcc Turn-on Threshold of IC
VO : output voltage
∆VO : output voltage ripple
∆VOVP : maximum output over voltage
VCSpk: the maximum voltage of VCS
PO : output power
Pin : input power
η: converter efficiency
RST : start up resistance
Rs: current sense resistor
CST : start up capacitance
CCOMP: compensation capacitor of error amplifier
ton : switch on time
toff : switch off time
fline : AC line frequency
θ: AC line angular frequency
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90W AP3101+AP1661 Demo Board Manual
Content:
1. Description
2. Specifications
3. Schematics of the PCB
4. PCB Layout
5. Photo View of the Demo Board
6. PCB Dimensions
7. BOM
8. Test Result
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90W AP3101+AP1661 Demo Board Manual
I. Description:
This note describes a 90-W off-line flyback AC/DC adapter providing a 19.3-V regulated
output at 4.65 A of load current, operating from a universal ac input.. Its electrical specification
is tailored on a typical hi-end laptop computer power adapter. The peculiarity of this target
design is its extremely low no-load input consumption (<0.6 W). The architecture is based on a
two-stage approach: a front-end PFC pre-regulator based on the AP1661 DCMB PFC controller
which aims at meeting EN61000-3-2 harmonic emissions requirements and a back-end DC-DC
converter in flyback topology which uses AP3101 PWM controller. Moreover, the system is
also designed to turn off the PFC stage to make it possible meeting the severe no-load
consumption requirement.
The AP1661 is a popular IC intended to control PFC pre-regulator by using the boundary
mode technique. The most significant features of the AP1661 includes: low power dissipation,
OVP, UVLO with hysteresie, internal starter and Zero Current Detection circuit for boundary
operation, multiplier for wide range mains applications with excellent THD;
The AP3101 flyback Green-Mode Controller, which integrates built-in state of the art
energy saving features with high-level protection features to provide cost effective solutions for
energy efficient power, supplies. AP3101 provides better protection features, such as leading
edge blanking, synchronized slope compensation, over-current, over-temperature and short
circuit protection.
II. Specifications
AC Input Voltage
90VAC~264VAC
Rated Output Voltage
Typ
19.3V
Rated Output Current
Typ
4.64A(Max5.2A)
Output Ripple
Max
300mV
Line Regulation
Max
0.5%（100mV）
Load Regulation
Max
5%
Standby Power @230Vac
Max
0.6W
Active Mode Efficiency
0.25,0.5,0.75,1.0(Po)
>85%
Turn on delay time
＜1s
Short Circuit Protection
Yes
Over Voltage Protection
Yes
Over Current Protection
Yes
Harmonic
Pin=75W@230V
EN61000-3-2
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90W AP3101+AP1661 Demo Board Manual
III.
Schematic of the Demo Board
IV.
PCB Layout of the Demo Board
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90W AP3101+AP1661 Demo Board Manual
V. Photo View of the Demo Board
63mm
138mm
VI.
Photo Bottom View of the Demo Board
U1
U6
U4
U5
U1 AP1661, U4 AP3101, U5 AS358, U6 AP4310
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90W AP3101+AP1661 Demo Board Manual
VII. BOM
Part number
Discrption
Part number
Discrption
BR1
BRIDGE1,GBL406
R14
10k
C1
0.47uF/275V
R15
1k
C10
10n/25V
R16
0.22/1W
C11
100n/25V
R18 R50 R57
10K
C12 C14
22u/35V
R19 R26 R28
33K
R2 R7
750K
C13
2.2n/250V
C16,C19
option
R21
1K
R27
27K
R3
1M
10
C2
0.47uF/500V
C21
100PF/25V
R30 R34
C22
470nF/25V
R31
8.2K
C23
1nF
R32
8K
C24
1uF
R33 R39 R41
2K
C25
0.47UF
R35-36
1K
C26
330PF
R37 R71 R78
100K
C27-28
100nF/25V
R38
240
C29 C31
1nF/100V
R4
680k
C3
0.47u
R40
2k
C30
36nF/25V
R42
1.1k
C32
22n/25V
R43 R51
20K
C38
VAR
R45 R48
510K
C4
220pF/25
R49 R68
47K
C40
100n/100V
R52
1.5K
C5
100u/450V
R53 R58-59
120
C6 C20 C36
100n
R55
27K
C7
0.33u
R56
24k
R5-6 R46-47
2M
C8 C33
1n
C9
0.1U/25V
R60
40
D12
LED
R61
20
D1-2
STPS20H100CTT
R62
4.7K
D13
DIODE,FR107
R63
50
DIODE,1N4148
R64
6m
0
R67
75K
DIODE,STPS1150A,ST
R69
120K
R72
3000K
R73
200k
D3,5,7,8,9, D11
D14 D17 D20
DJ3 RJ7
D6
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90W AP3101+AP1661 Demo Board Manual
Part number
Discrption
Part number
J3
SOCKET
L1
CM CHOKE
R8 R17
L2
CM CHOKE
R9
18K
L3
INDUCTOR/260uH
RJ2
300
Q1
MOSFET_N, 20N65C3, Infinion
RJ3
39K
Q10
AZ432,BCD
RTH(NTC)1
Q2,3,4
PNP,3906
T1
TRAN-2,TRAN-2
11N65C3,Infinion
T2
TRAN-3C,TRAN-3C
NPN,3904
U1
AP1661,BCD
Q7
NPN,13001,500V
U2
PC817-C,SHARP
Q8
MOSFET_N,2N7002
U4
AP3101,BCD
R1
1M
U5
AS358,BCD
R1_2
1.5M
U6
AP4310.BCD
R10
68k
ZD1,ZD4-6
ZENER/18V
R11
10K
ZD3
ZENER,36V
R12 R66
30
D16 ZD2
ZENER/16V
R13
20k
D4
ZENER/18V
U3
Triac,BCR1AM06
ZD7
ZENER/3.6V
Q5
Q6 Q9
R74
Discrption
56k
100K/1206
5
T1: XFMR Structure
Sandwich structure, L1-3: 0.6mH(L1-3 L11-8 L4-6=29:5:6)
L11-8: 0.65mH(L11-8 L2-5=:68:8
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VIII. Test Results
VIII.1 Line/Load Regulation
Input
No load
Full Load
95V/50Hz
19.363V
19.146V
265V/50Hz
19.369V
19.176V
Line Regulation @ No load:
Line Regulation @ Full load:
Load Regulation @ Vin=85V/50Hz:
Load Regulation @ Vin=265V/50Hz:
7mV
30mV
0.8%
1%
VIII.2 Output Voltage Ripple
Output Voltage Ripple @ 90V/50Hz, Full load
Demo Spec
Output Ripple(Spec Max<300mV)
Test Result
@90V, Full load
100mV
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Efficiency(%)
VIII.3 Efficiency @ Full Load &Peak Load (Test by WT210)
90.5
90.0
89.5
89.0
88.5
88.0
87.5
87.0
86.5
86.0
85.5
Po=90W
70
100
130
160
Po=100W
190
220
250
280
Line Voltage(V)
Pin=75W
90Vac
110 Vac
220 Vac
230 Vac
264 Vac
THD(%)
4.92
5.06
8.54
9.12
15.42
0.9999
0.9999
0.9524
0.9441
0.8882
PF
VIII.4 Efficiency @ Iout=1/4Po~Po
91.0
Efficiency(%)
90.0
89.0
88.0
87.0
86.0
85.0
90V
110V
230V
84.0
83.0
10
30
50
70
90
Output Power(W)
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 8 OF 11
90W AP3101+AP1661 Demo Board Manual
BCD Semi Ltd Co.
VIII.5 Input Power @ 0W & 0.5W Load
Input Power(W)
1.5
1.2
0.9
Po=0W
Po=0.5W
0.6
0.3
0
70
100
130
160
190
220
250
280
Line Voltage(V)
VIII.6 Turn on delay time
2- BUS Voltage ,
1-Output Voltage
Demo Spec
Turn delay(Spec Max<1S)
Test Result
@90V, Full load
<1s
PROPRIETARY & CONFIDENTIAL
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PAGE 9 OF 11
BCD Semi Ltd Co.
90W AP3101+AP1661 Demo Board Manual
VIII.7 Transient Load Response
1kHz,0.1A/uS
Full load- no load
Vout
Single, 0.1A/uS
Full load- no load
Bus voltage
Demo
Variant Max(Spec Max<5%
VIII.8
Test Result
@90V, Iout:Full-no load
<5%
Protection
Over Current Protection
5.6A
Over Voltage Protection
Pass/23V
Short Circuit Protection
Pass
PROPRIETARY & CONFIDENTIAL
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PAGE 10 OF 11
BCD Semi Ltd Co.
90W AP3101+AP1661 Demo Board Manual
VIII.9 Characterization Results Summary
Test Item
1．Input characteristic
Specification
Test result
Standby power@230V
≤0.6W
0.52W
Active Mode Efficiency
≥85%
>86%
Harmonic
Class D
Pass
Line regulation
0.5%(100mV)
30mV
Load regulation
5%
1%
300mV
100mV
<1s
0.9s
2．Output characterisitc
Output Ripple
3．Time sequence
Turn on delay time
4．Protection
Over current protection
5.6A
Over voltage protection
Pass
Short Circuit protection
Pass
PROPRIETARY & CONFIDENTIAL
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PAGE 11 OF 11
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
Content:
1. Description
2. Specifications
3. Schematics of the Demo Board
4. PCB Layout
5. Photo View of the Demo Board
6. PCB Dimensions
7. BOM
8. Test Result
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 1 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
1 Description:
The AP1661 is an active power factor control IC which is designed mainly for use as
pre-converter in electronic ballast and off-line power supply applications. This Demo manual
provides a design example of 2*36W lamps ballast using AP1661 for power factor correction
circuit and evaluates the demo board performance.
2 Specifications
AC Input Voltage
184VAC~265VAC
Rated input power
Typ
Pin = 80W
Rated Lamp current
Typ
Ila=320mA
Typ
Vo = 395V
Power factor
Min
PF>0.96
Total harmonic distortion
Max
THD<10%
Lamp current crest factor
Max
CF<1.7
Full Load
η> 85%
PFC output regulated voltage
Efficiency
Lamp short circuit protection
Lamp open Protection
Yes
Yes
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 2 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
3 Schematic of the Demo Board
Figure 1. Demo board schematic
4 PCB Layout of the Demo Board
Figure 2. demo board PCB and components ( Top view, real size1 275mm×26mm )
Figure 3. demo board PCB layout( Bottom view, real size 275mm×26mm)
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 3 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
5 Photo View of the Demo Board
Figure 4. photo view of the demo board
6 PCB Dimensions
7 BOM
Part Type
Designator
Part Type
MOSFET 6N60C
Designator
X-CAP 220nF/275V
C11 C12
Q21
Y-CAP 3.3nF/250V
C13
TRANSISTOR 13005
Q31 Q32
220nF/630V
C21
TRANSISTOR 9014
Q33 Q34
22uF/450V
C22
BT169
Q51
220pF/50V
C23
1M
R10
1uF/16V
C24
680K
R11
22uF/50V
C25 C51 C52
10K
R12 R54
220nF/400V
C31 C32
180K
R14 R15
100n/250V
C33
68K
R20
2.7nF/1600V
C41 C42
1ohm
R21
470pF/1KV
C61
20 ohm
R23
10nF/50V
C62
1Kohm
R22
100nF/25V
C63
120ohm
R24
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 4 OF 9
AP1661 2*36W ballast Demo Board Manual
BCD Semi Ltd Co.
1N4007
D1 D2 D3 D4
D54
820K
R26
FR107
D21 D31 D32
D35
470K
R27
1N4148
D22 D33 D34
D51 D52 D53
D54 D61
8.2K
R28
DB3
DB3
0.33ohm
R31 R32
Fuse 3A/250V
F1
220K
R311 R53
CONNECTOR-3P
J1
150K
R33 R34
CONNECTOR-7P
J2
6.8ohm
R35 R37
1mH
L11
51ohm
R36 R38
18mH
L12
10ohm
R39 R310
1.5mH
L21
39K
10uH
L31
1.8mH
PTC
L32
R51 R52 R55
RING CORE 2:2:2
T1
L41 L42
ZENER 15V
Z1
P1 P2
ZENER 27V
Z2
8 Test Results
To evaluate the performance of the ballast demo board, the following parameters have been
measured: Pin (Input Power), Pla (Lamp Power), η (Efficiency), VBus (PFC output DC bus voltage),
∆VBus (PFC output DC bus voltage ripple), PF (Power Factor), THD (Current Total Harmonic
Distortion), Ila (Lamp current), CF (Lamp Current Crest Factor). The demo board evaluation
results are as below:
8.1 Performance test results at full load
Vinrms
Pin
Pla
η
VBus
∆VBus
(V)
(W)
(W)
(%)
(V)
(V)
184
79.7
70.5
88.5
394
24
196
79.2
71.0
89.6
394
220
78.6
71.2
90.6
240
78.4
71.3
264
78.3
71.2
PF
THD
Ila
CF
(%)
(mA)
0.9981
5.8
323
1.52
24
0.9976
5.49
324
1.53
394
24
0.9960
5.65
324
1.54
90.9
394
24
0.9938
6.17
324
1.54
90.9
394
24
0.9907
8.75
324
1.53
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 5 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
8.2 Input Current waveform
Figure 5. input voltage(Ch1) and input current(Ch2) waveform at 220V AC input
8.3 PFC inductor current waveform
Figure 6. PFC inductor current waveform and zoom
The PFC inductor works in DCM boundary conduction mode. The inductor current envelop is
sine wave. This insures good power factor correction.
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 6 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
8.4 PFC Output DC BUS Voltage Ripple
Figure 7. PFC output DC bus voltage ripple waveform
8.5 Vds and Vgs waveform of PFC MOSFET
Figure 8. Vds(Ch1) and Vgs(Ch2) of MOSFET at 220V ac input
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 7 OF 9
BCD Semi Ltd Co.
AP1661 2*36W ballast Demo Board Manual
8.6 Start up waveform
Figure 9. Ch1: PFC output DC bus voltage at start up
Ch2: input current at start up
8.7 Lamp current waveform
Figure 10. lamp current waveform
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 8 OF 9
AP1661 2*36W ballast Demo Board Manual
BCD Semi Ltd Co.
8.8 Half bridge voltage and current waveform
Figure 11. Half bridge midpoint voltage and current waveform
The half bridge works in inductive mode. There is enough phase margin to ensure Zero
Voltage Switching of the half bridge switches.
8.9 Characterization Results Summary
Test Item
Specification
Test result
input power
80W
78-79W
Power factor
PF>0.96
PF>0.99
Total harmonic distortion
THD<10%
THD<10%
Lamp current
Ila=320mA
324mA
PFC output regulated voltage
Vo = 395V
394V
Lamp current crest factor:
CF<1.7
CF<1.6
Expected efficiency
η> 85%
η> 88%
Lamp short circuit protection
Pass
Lamp open Protection
Pass
PROPRIETARY & CONFIDENTIAL
ADVANCED ANALOG CIRCUITS CORPORATION
PAGE 9 OF 9
Analog ICS and Power Management Solution Provider
AP1661 用于 28V/2.15A LED 照明灯管解决方案
目录
1. 预览………………………………………………………………………………..2
2. 电气规格要求……………………………………………………………………..3
3. 电路原理图………………………………………………………………………..4
4. 物料清单…………………………………………………………………………..5
5. 变压器规格………………………………………………………………………..6
5.1. 原理示意图……………………………………………………………………..6
5.2. 绕制结构图……………………………………………………………………..7
5.3. 材料清单………………………………………………………………………..7
6. PCB Layout………………………………………………………………………..8
7. 测试报告…………………………………………………………………………..8
7.1. 测试项目………………………………………………………………………..9
7.2. 基本电气性能测试……………………………………………………………..9
7.2.1.
基本输出参数测试………………………………………………………9
7.2.2.
输出电压电流波形……………………………………………………....9
7.2.3.
输出纹波……………………………………………………………….....9
7.2.4.
开关机过冲………………………………………………………………10
7.2.5.
开机延迟时间…………………………………………………………....11
7.2.6.
输出上升时间……………………………………………………………11
7.2.7.
输出短路测试……………………………………………………………11
7.2.8.
动态负载测试……………………………………………………………12
7.2.9.
温升测试…………………………………………………………………12
7.3 EMC 测试…………….………………………………………………………...13
7.3.1
传导…………..……………………………………………………..…....13
7.4 THD 测试……………………………………………………………………14-16
1 / 16
Analog ICS and Power Management Solution Provider
一、 预览
特点： 适用范围广：宽输入电压范围 85-265Vac
高效率： 230Vac 输入满载≥90%
高恒流精度：≤±3%
高性价比方案：单级 PFC 拓扑结构
高可靠性：具有过压保护，短路保护，开路保护等
2 / 16
Analog ICS and Power Management Solution Provider
二、 电气规格要求
描述
最小
典型
最大
单位
条件
输入
电压
85
264
V
频率
43
63
Hz
PF
0.9
3
W
30.24
V
±10
%
2.25
A
空载最大输入功率
输出
输出电压
28
输出纹波电压
输出电流
2.05
输出功率 (Pno)
2.15
60
20M 带宽
W
效率
常规输入电压，满载
保护
输出短跑保护
输出过压保护
输出开路保护
EMI
85
%
有，自恢复
有，自恢复
有，自恢复
过 EN55015 标准并留有 6dB 裕量
3 / 16
Analog ICS and Power Management Solution Provider
三、
电路原理图
4 / 16
Analog ICS and Power Management Solution Provider
四、 物料清单
No.
Component description
Part number
Qty
Supplier
1
IC PWM,AP1661AMTR-E1, SOIC-8
U1
1
BCD
2
3
IC AP4313KTR-E1, SOT23-6
Bridge Rectifier GBU406 4A 600V
U3
BR1
1
1
BCD
4
Diode Rectifier 1000V,1A FR107,DO-41
D1 D2
2
5
6
Diode Rectifier 75V 200mA 1N4148 DO-35
FUSE 2A 250V
D3 D5
F1
2
1
7
N-Channel Infineon Cool-Mosfet 11N65C3 TO-220
Q1
1
8
NC
T1
1
9
Common Choke 30mH
T2
1
10
MOV 10D471K
MOV1
1
11
PC817 DIP-4
U2
1
12
Schottky Diode MBR20200CT-E1 TO-220-3
D4
1
13
Transformer PQ3220
T4
1
14
Zener 10V
Z2
1
15
NC
Q2 Z1 T3
3
16
X-Capacitor 100nF/250V
C1
1
17
Capacitor CBB 0.68UF/400V
C2
1
18
Capacitor Ceramic 10nF/1KV
C3
1
19
Y-Capacitor 3300PF/250V
CY1
1
20
Capacitor Ceramic 0.1UF/50V 0805
C8 C12 C14
3
21
Capacitor Ceramic 1000PF/100V 0805
C7 C9 C13
3
22
Capacitor Ceramic 0.47UF/50V 0805
C4 C11
2
23
Capacitor Ceramic 0.047UF/50V 0805
C10
1
24
Capacitor Ceramic 0.01UF/50V 0805
C6
1
25
Capacitor Ceramic 10pF/50V 0805
C5
1
26
Capacitor Electrolytic 1000UF/35V
EC2 EC3 EC4 EC5
4
27
Capacitor Electrolytic 47UF/50V
EC1
1
28
Capacitor Electrolytic 100UF/50V
EC6
1
29
Resistor 0.1ohm 3W
R22
1
30
Resistor 1Kohm 5% 0805
R20
1
31
Resistor 0.68ohm 5% 1206
R16 R17 R18
3
32
Resistor 1ohm 5% 1206
R23
1
33
Resistor 0ohm 1206
R4
1
34
Resistor 10ohm 5% 0805
R11
1
35
Resistor 10ohm 5% 1206
R21 R27
2
36
Resistor 10ohm 5% 1206
R10
1
37
Resistor 1.5Kohm 1% 0805
R28
1
38
Resistor 2.2Kohm 5% 0805
R34
1
39
Resistor 3Kohm 1% 0805
R12
1
BCD
5 / 16
Analog ICS and Power Management Solution Provider
40
Resistor 4.7Kohm 1% 0805
R14 R25 R32 R36
4
41
Resistor 10Kohm 1% 1206
R38 R39
2
42
Resistor 10Kohm 5% 0805
R26 R30
2
43
Resistor 15Kohm 5% 0805
R24
1
44
Resistor 20Kohm 5% 0805
R13
1
45
Resistor 36Kohm 5% 0805
R29
1
46
Resistor 47Kohm 5% 0805
R41
1
47
Resistor 68Kohm 5% 0805
R15
1
48
Resistor 75Kohm 5% 0805
R31
1
49
Resistor 100Kohm 5% 1W
R3
1
50
Resistor 100Kohm 5% 1206
R7 R8 R9
3
51
Resistor 1Mohm 5% 1206
R1 R2
2
52
Resistor 1.5Mohm 5% 1206
R5 R6
2
53
Resistor 1Mohm 5% 0805
R29A
1
54
NC
R19 R33 R35 R37
4
Total
72
五、 变压器规格
5.1 电气原理图
No
名称
测量端
测量值
测试条件
测试仪器
HP4277A/
Zehteeh3302/Zeh
teeh3252
1
电感量
L1：6-5
470uH
f=1KHz,Vos=0.25V
2
漏电感
L1：6-5
20µH Max
f=1KHz,Vos=0.25V
短路其它绕组
Zehteeh 3302/
Zehteeh3252
6 / 16
Analog ICS and Power Management Solution Provider
3
4
匝
比
绝缘电阻
N1:N2:N3
48:14:8
/
初级与次级
100MΩ\MIN
DC500V、1 分钟
初级与磁芯
100MΩ\MIN
DC500V、1 分钟
次级与磁芯
100MΩ\MIN
DC500V、1 分钟
抗电强度
PASS
无击穿、飞弧
初级与磁芯
EXTECH 7410
2500VAC 漏电流 5mA
1 分钟
1500VAC
次级与磁芯
5.2
CS2676C/
3750VAC 漏电流 5mA
1 分钟
初级与次级
5
/
漏电流 5mA
1 分钟
CJ2671/
CS2672C/
EXTECH 7410
绕制结构图
注：上图中由下至上对应骨架为由里至外
1
绕制顺
序
N1
2
N2
8
7
3
4
5
N1
E1
N3
2
3
3
5
序号
起始脚
终止脚
导线规格
6
2
Φ0.5mm *1
Φ0.5mm*2
双重绝缘线
Φ0.5mm*1
屏蔽铜箔
Φ0.2mm*1
4
匝
数 方 式
3Ts
24
14
24
1.2
8
胶带
并绕
3Ts
1.2Ts
1.2Ts
1.2Ts
5.3 材料清单
7 / 16
Analog ICS and Power Management Solution Provider
材料规格
阻燃等级
No.
名称
型号
1
磁芯
PQ3220
2
漆包铜线
UEW
3
骨架
PQ3220
4
绝缘胶带
NO.PF
5
双重绝缘线
6
铜箔
/
7
锡
/
SN99.90
/
/
8
清漆
8562D
8562D
155℃
E200154
Ф0.5mm
Ф0.2mm
酚醛树脂
T375J
Ф0.5mm
温度
制造商
安规认证号备注
/
/
130℃
E85640（S）
130℃
E59481（S）
180℃
E165111(N)
130℃
E180908
150℃
六、 PCB 布线
8 / 16
Analog ICS and Power Management Solution Provider
七、 测试报告
7.1 测试项目
NO.
测试项目
1．基本电性能测试
1.1
基本输出参数测试
1.2
输入电压电流波形
1.3
输出纹波
1.4
开关机过冲
1.5
开机延时
1.6
输出上升时间
1.7
输出短路保护
1.8
输出动态负载测试
1.9
温度测试
2. EMC 测试
2.1
传导测试
3. THD 测试
3.1
THD 测试
条件， 规格
判定
满足规格书的要求
满足
满足
满足
满足
满足
满足
满足
满足
满足
输入电压 90V 和 264V，满载 要求≦±10%
输入电压 90V 和 264V，负载空载、满载，要求≦±10%
输入电压 90V 和 264V，满载 要求≦2S
输入电压 90V 和 264V，满载
满足规格书的要求
满足规格书的要求
EN55015
满足
IEC61000-3-2
满足
备注
7.2 基本电气性能指标的测试
7.2.1 基本参数测试
输入电
压(Vac)
满载输入电
流(<1A)
满载输入
功率
（W）
满载 PF
值
（>0.9）
恒压 28V 输出电
流
（2.05~2.25A）
满载效率
（>85%）
空载输出电压
(28.80~30.24V)
满载输出纹
波(2.8Vpp)
90
0.78
69.4
0.936
2.15
86.72%
29.3
1.78
115
0.60
68.1
0.969
2.15
88.71%
29.3
1.72
230
0.30
66.3
0.942
2.15
90.91%
29.3
1.6
264
0.27
66.2
0.913
2.15
90.92%
29.3
1.58
标准：是否满足规格书的要求
判定：满足
7.2.2 输入电压与电流波形
90V输入，满载输出
264V输入，满载输出
9 / 16
Analog ICS and Power Management Solution Provider
7.2.3 输出纹波
90V输入，满载输出
标准：<2.8VDC
264V输入，满载输出
判定：满足
7.2.4 开关机过冲
90V输入，空载输出
264V输入，空载输出
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Analog ICS and Power Management Solution Provider
90V输入，满载输出
标准：<30.24VDC
264V输入，满载输出
判定：满足
7.2.5 开机延时
90V输入，满载输出
标准：<2.0S
264V输入，满载输出
判定：满足
7.2.6 输出上升时间
90V输入，满载输出
标准：是否满足规格书的要求
264V输入，满载输出
判定：满足
7.2.7 输出短路保护
测试要求：长期短路后，移除短路保护条件，应能正常工作。
标准：是否满足规格书的要求
判定：满足
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7.2.8 输出负载跃变测试
在0%~100%~0%负载时进行负载跃变测试，观察输出电压的变化。电流变化的速率为0.1A/us。电压过冲
最大值小于30.24V。
115V输入，输出满空载跃变
标准：是否满足规格书的要求
264V输入，输出满空载跃变
判定：满足
7.2.9 温度测试
测试条件：恒温 60℃ 恒湿 90%
Item
U1
(AP1661)
BR1
(GBU4K)
T4
(PQ3220)
Q1
(F10NK60ZFP)
D4
(UF1604FCT)
整机工作2H稳定后，记录数据如下表
90Vac
115Vac
230Vac
264Vac
82.1℃
81.4℃
85.8℃
86.7℃
93.4℃
88.6℃
84.7℃
83.4℃
113.0℃
111.2℃
107.3℃
104.7℃
106.2℃
102.5℃
95.1℃
94.7℃
108.4℃
104.8℃
100.4℃
100.8℃
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Analog ICS and Power Management Solution Provider
7.3
.EMC 传导测试
标准：是否满足EN55015要求，并留有6dB裕量
判定： OK
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Analog ICS and Power Management Solution Provider
7.4
THD测试
14 / 16
Analog ICS and Power Management Solution Provider
15 / 16
Analog ICS and Power Management Solution Provider
16 / 16
BCD Semi Ltd Co.
AP1661 Demo Board Manual
AP1661 Demo Board Manual
Content:
1. Description
2. Specifications
3. Design procedure
4. Schematics of the Demo Board
5. PCB Layout
6. Photo View of the Demo Board
7. BOM
8. Test Result for Typical Performance and Characteristics
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AP1661 Demo Board Manual
1. Description:
The AP1661 is an active power factor control IC which is designed mainly for use as
pre-converter in electronic ballast and off-line power supply applications. This Demo manual
provides the design procedure for a power factor correction demo board circuit and evaluates its
performance.
2. Specifications
The target specification is as below:
AC mains RMS voltage: Vinrms = 85 to 265V
DC output regulated voltage: Vo = 395V
Rated output power: Po = 90W
Minimum switching frequency: fsw(min) = 35kHz
Expected efficiency: η> 90%
Full load output voltage ripple: ∆VO≤±20V
Maximum output overvoltage: ∆VOVP = 50V
3. Design procedure
3.1 power stage design
Boost inductor
The Boost inductance (L) is usually determined so that the minimum switching frequency is
greater than the maximum frequency of the internal starter (15kHz) to ensure a correct DCM
boundary Conduction Mode operation.
After some algebra, the following instantaneous switching frequency along a line cycle equation
can be found:
f sw (θ) =
(Vo − 2 ⋅ Vin rms ⋅ sin( θ)) ⋅ Vin 2 rms ⋅ η
1
=
Ton + Toff
2 ⋅ L ⋅ PO ⋅ Vo
(1)
The switching frequency will be minimum at the top of the sinusoid, maximum at the zero
crossings of the line voltage.
The absolute minimum frequency fsw(min) can occur at either the maximum or the minimum mains
voltage, thus the inductor value is defined by:
L =
( Vo − 2 ⋅ Vin rms ) ⋅ Vin 2 rms ⋅ η
2 ⋅ f sw min ⋅ PO ⋅ Vo
(2)
where Vinrms can be either Vinrms(min) or Vinrms(max).
If we set the minimum switching frequency: fsw(min) = 15kHz, then after calculation according to
(2), the Boost inductor value is should be lower than 1.2mH. We choose 660uH in the design.
After calculation of the inductance, we should design the inductor. The maxim inductor current is:
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I L max_ peak =
AP1661 Demo Board Manual
2 2 ⋅ Vo ⋅ Io
η ⋅ Vinrms(min)
(3)
By AP method, we can select a type of core. Then the inductor primary turns can be calculated
according to (4)
N=
L ⋅ I L max_ peak
(4)
Bs ⋅ A e
The boost inductor winding turns ratio, m, should be selected as following:
m≤
Vo − 2 ⋅ Vinrms(max)
2. 1
(5)
In this design, we choose RM10/I core with 3C90 ferrite material, which effective area
Ae=96.6mm2, Bs=0.3T. The inductor primary is 70 turns of lize wire 30*0.1mm, secondary is 8
tunrs wire of 0.2mm diameter.
Output capacitor
The output bulk capacitor (Co) selection depends on the DC output voltage, the allowed
overvoltage, the output voltage ripple and ripple current on the capacitor.
To achieve high power factor, the output voltage feedback control loop is slow. As a result, there is
twice the mains frequency fline (100 to 120Hz) voltage ripple across the output capacitor. Besides,
high frequency ripple because of Boost converter switching appears on the ESR of the output
capacitor.
∆Vo = Io ⋅
1
+ ESR 2
(4π ⋅ f line ⋅ Co ) 2
With a low ESR capacitor,
Po
Co ≥
4π ⋅ f line ⋅ Vo ⋅ ∆Vo
(6)
(7)
If the load is resistive, the ripple current of output capacitor is:
Ico (rms) =
32 2 ⋅ Po 2
Vo
− ( )2
2
9π ⋅ η ⋅ Vinrms ⋅ Vo Ro
(8)
We choose 47uF/450V electric capacitor as the output capacitor.
MOSFET selection
MOSFET RMS current is obtained by (9) and the conduction loss of the MOSFET is calculated by
(10). The circuit works in DCM boundary conduction Mode, so the MOSFET turn on loss is
negligible. MOSFET turn off loss and discharge loss are obtained by (11) and (12) respectively.
The switching frequency varies according to the line condition and load condition. Therefore the
switching frequency is the average value during a line period. The total MOSFET loss can be
calculated by (13).
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I Qrms = I L max_peak ⋅
AP1661 Demo Board Manual
1 4 2Vinrms(min)
2 2 ⋅ Vo ⋅ Io
1 4 2Vinrms(min)
−
=
⋅
−
6
9πVo
η ⋅ Vinrms(min) 6
9πVo
2
Pon = IQrms
⋅ R DS
Pturn −off =
(9)
(10)
2
Vo 2 ⋅ Io
1
Vo ⋅ I L max_ peak ⋅t f ⋅f sw =
⋅t f ⋅f sw
⋅
3 η ⋅ Vinrms(min)
6
(11)
4
Pdisch arg e = Coss ⋅ Vo 2 ⋅ f sw
3
(12)
PMOSFET=Pon+Pturn-off+Pdischarge
(13)
The temperature rise of MOSFET will be ∆T = Rth j− a ⋅ PMOSFET
(14)
Boost Diode selection
Diode average current can be calculated by (15). The total diode loss can be calculated by (16).
IDavg=IOmax
(15)
PD=Vf IDavg
(16)
3.1 Control circuit design
1) Output voltage sensing resistor and feedback loop design
The error amplifier regulates the PFC output voltage. The internal reference on the
non-inverting input of the error amplifier is 2.5V. The error amplifier’s inverting input (INV) is
connected to an external resistor divider which senses the output voltage. The output of error
amplifier is one of the two inputs of multiplier. A compensation loop is connected outside between
INV and the error amplifier output. Normally, the compensation loop bandwidth is set very low to
realize good power factor for PFC converter.
To make the over voltage protection fast, the internal OVP function is added. The OVP alarm
level current is 40µA. When the OVP is trigged, it will disable the IC and stop the drive signal.
R1+ R2 and R10 (see fig.1) will be then selected as follow:
R1 + R 2
Vo
=
−1
R10
2.5V
R1 + R 2 =
∆VOVP
40µA
(17)
In this design, ∆VOVP = 50V, so the calculated value for R1+R2 is 1.25Mohm. We choose R1
820Kohm, R2 470Kohm and R10 value is 8.2Kohm.
Generally, the control loop bandwidth of PFC converter is set below 20Hz to eliminate the
100Hz ripple voltage. In the simplest case, this compensation is just a capacitor, which provides a
low frequency pole as well as a high DC gain. A simple method to define the capacitance value is
to provide ~40dB attenuation at 100Hz:
CCOMP =
10
2π ⋅ (R1 + R 2)
(18)
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AP1661 Demo Board Manual
2) Line voltage sense resistor design
The linear operation of the multiplier is guaranteed inside the range 0 to 3V of VMULT and the
range 0 to 1.6V of VCS. The maximum peak value VMULTpk for VMULT, will occur at maximum
mains voltage, should be 3V or below. The divider (see fig.13) will be as (19):
R3
VMULTpkx
=
(19)
R1 + R 2
2 ⋅ Vinrms(max)
3)current sense resistor design
The sense resistor value is calculated as (20):
RS ≤
VCSpk
(20)
I Rspk
where VCSpk is the maximum voltage of VCS, can be set 1.6V for linear operation in the whole
working range.
and: I Rspk = I L max_ peak
(21)
The power dissipated in Rs, is given by: PRs = Rs ⋅ I Qrms 2 .
(22)
In this design, we choose Rs=0.33ohm/1W.
4) Zero current detection resistor design
The maximum sink current of ZCD pin is 10mA, therefore zero current detection resistor is
determined by（23）
R8 >
Vo
m ⋅ 10mA
(23)
5) Start-up circuit design
The start-up resistor is calculated by (24)
R st ≤
Vin ( peak _ min) − VCC _ ON
ISTART _ U
(24)
The start-up capacitor should maintain Vcc voltage higher than the UVLO voltage before the
auxiliary winding supplies IC operating current. So the start-up capacitor is calculated by (25).
Cst ≥
4mA
2π ⋅ f line ⋅ 2.5V
(25)
In this design, VCC_ON is 12V, ISTAR_U is 90uA (max), so the calculated Rst<1.2Mohm. We choose
R6 and R7 as 2 180Kohm resistors in series. The start-up capacitor is 47uF.
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.4.
AP1661 Demo Board Manual
Schematics of the Demo Board
The designed demo board electrical schematic is shown in Fig.1
Fig.1 Demo board schematic
5. PCB Layout
Figure 2. demo board PCB and Component layout( Top view, real size1 25mm×56mm )
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AP1661 Demo Board Manual
Figure 3. demo board PCB and Component layout( Bottom view, real size 125mm×56mm)
6. Photo View of the Demo Board
Figure 4. Photo view of the demo board
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AP1661 Demo Board Manual
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7. BOM
Part Type
Designator
Part Type
Designator
XC 220nF/275V
C1
660uH
L3
220 nF /500V
C2
11N60
Q1
330 nF /500V
C3
820K
R1
10 nF /25V
C4
470K
R2
220pF /25V
C5
1M
R3
12 nF /25V
C6
680K
R4
680pF /25V
C7
10K
R5
330nF /25V
C8
180K
R6, R7
47uF /450V
C9
100
R8
47uF /25V
C10
68K
R9
RS205M
D1
8.2K
R10
MUR460
D2
1K
R12
1N4148
D3
10
R13
Fuse 2.5A/250V
F1
12K
R14
AC Socket
J1
0.33Ohm/1W
R16
DC Socket
J2
AP1661
U1
500uH
L1
18V
Z1
160uH
L2
5D-9
NTC
8. Test Result for Typical Performance and Characteristics
DEMO BOARD EVALUATION RESULTS
To evaluate the performance of the PFC demonstration board, the following parameters have been
measured: PF (Power Factor), THD (Current Total Harmonic Distortion), ∆ (Peak-to-Peak Output
Voltage Ripple), Vo (Output Voltage), η (Efficiency). The demo board evaluation results are as
below:
8.1 Performance test results at full load
Vinrms
Pin
Po
η
Vo
∆Vo
PF
THD
Harmonic
(V)
(W)
(W)
(%)
(V)
(V)
(%)
passed?
85
98.4
90.93
0.92
388.6
24
0.999
3.5
passed
110
96.4
91.07
0.94
389.2
24
0.999
4.3
passed
150
95.2
91.10
0.96
389.3
24
0.998
4.7
passed
230
94.2
91.03
0.97
389.0
24
0.991
6.3
passed
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AP1661 Demo Board Manual
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250
94.1
91.10
0.97
389.3
24
0.987
7.7
passed
265
94.0
91.10
0.97
389.3
24
0.981
9.8
passed
PF
THD
Harmonic
(%)
passed?
8.2 Performance test results at half load
Vinrms
Pin
Po
η
Vo
∆Vo
(V)
(W)
(W)
(%)
(V)
(V)
85
49.39
45.96
0.93
389.5
22
0.999
4.52
passed
110
48.98
45.96
0.94
389.5
22
0.998
5.56
passed
150
48.80
45.97
0.94
389.6
22
0.995
7.21
passed
230
48.40
45.91
0.95
389.1
22
0.974
10.36
passed
250
48.60
45.98
0.95
389.7
22
0.963
12.87
passed
265
48.50
46.00
0.95
389.8
22
0.949
13.19
passed
PF
THD
Harmonic
(%)
passed?
8.3 Performance test results at quarter load
Vinrms
Pin
Po
η
Vo
∆Vo
(V)
(W)
(W)
(%)
(V)
(V)
85
25.04
22.99
0.92
389.5
21
0.997
5.7
passed
110
25.05
22.99
0.92
389.5
21
0.995
6.85
passed
150
25.23
22.99
0.91
389.6
21
0.984
10.23
passed
230
25.44
23.00
0.90
389.1
21
0.906
13.45
passed
250
25.38
22.99
0.91
389.7
21
0.885
22.2
passed
265
25.45
23.00
0.90
389.8
21
0.875
23.73
passed
8.4 Current waveform and THD analysis
input voltage(Ch2) and input current(Ch1) waveform and current harmonics analysis at 230V,
75W input
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AP1661 Demo Board Manual
input voltage(Ch2) and input current(Ch1) waveform and current harmonics analysis at 230V, full
load
8.5 PFC inductor current waveform
PFC inductor current waveform
8.6 Output Voltage Ripple
Output Voltage Ripple waveform @ 230V/50Hz, Pout=90W
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8.7 Vds and Vgs waveform of MOSFET
Vds(Ch1) and Vgs(Ch2) of MOSFET at 85V ac input, full load
Vds(Ch1) and Vgs(Ch2) of MOSFET at 265V ac input, full load
8.8 Start up waveform
Ch1: Vo at start up
Ch2: input current
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8.9 Vcs (pin 4 of AP1661) waveform
Vcs at 85V ac input, full load
8.10 Efficiency
97
96
efficiency %
95
94
fullload
halfload
93
92
91
90
80
100
120
140
160
180
200
220
240
260
280
input voltage
Efficiency @ Full Load and Half Load
8.11 Transient Load Response
Output from no load to full load
Output from full load to no load
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AP1661 Demo Board Manual
Nomenclature
Ae: the core effective area
Bs: maximum saturation flux density
IL(peak_max) : maximum inductor current peak value
ID : boost diode current
IQrms : MOSFET rms current
IDavg : diode average current
IO : output current
Ico(rms) : ripple current of output capacitor RMS value
ISTAR_U: IC Start-up Current
IRSpk: the maximum current of current sense resistor
Vin (rms) : input voltage RMS value
Vin (rms_max) : maximum input voltage RMS value
Vin (rms_min) : minimum input voltage RMS value
Vin (peak_min) : minimum input voltage peak value
VCSpk: maximum voltage of VCS
Vcc_on: Vcc Turn-on Threshold of IC
VO : output voltage
∆VO : output voltage ripple
∆VOVP : maximum output over voltage
VCSpk: the maximum voltage of VCS
PO : output power
Pin : input power
η: converter efficiency
RST : start up resistance
Rs: current sense resistor
CST : start up capacitance
CCOMP: compensation capacitor of error amplifier
ton : switch on time
toff : switch off time
fline : AC line frequency
θ: AC line angular frequency
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