R7731A Burst Triple-Mode PWM Flyback Controller General Description Features The R7731A is a high-performance, low cost, low start-up current and current mode PWM controller with burst triplemode to support green mode power saving operation. The R7731A integrates functions of soft start, Under VoItage LockOut (UVLO), Leading Edge Blanking (LEB), Over Temperature Protection (OTP) and internal slope compensation. It provides the users a superior AC/DC power application of higher efficiency, low external component counts and lower cost solution. l To protect the external power MOSFET from being damaged by supply over voltage, the R7731A output driver is clamped at 12V. Furthermore, R7731A features fruitful protections like Over Load Protection (OLP) and Over Voltage Protection (OVP) to eliminate the external protection circuits and provide reliable operation. R7731A is available in SOT-23-6 and DIP-8 packages. l l l l l l l l l l l l l l l l Very Low Start-up Current (<30uA) 10/14V UVLO Soft Start Function Current Mode Control Jittering Switching Frequency Internal Leading Edge Blanking Built-in Slope Compensation Burst Triple-Mode PWM for Green-Mode Cycle-by-Cycle Current Limit Feedback Open Protection Output Over Voltage Protection Over Temperature Protection Over Load Protection Soft Driving for Reducing EMI High Noise Immunity Opto-Coupler Short Protection RoHS Compliant and Halogen Free Applications l l l l l l Adaptor and Battery Charger ATX Standby Power Set-Top Box (STB) DVD and CD(R) TV/Monitor Standby Power PC Peripherals Typical Application Circuit VO+ AC Mains (90V to 265V) VO- RT VDD # R7731A COMP GATE GND CS # See Application Information R7731A-06 June 2009 1 R7731A Ordering Information R7731A Package Type E : SOT-23-6 N : DIP-8 Operating Temperature Range G : Green (Halogen Free with Commercial Standard) Note : Richpower Green products are : } RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. } Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richpower distributor located in your area, otherwise visit our website for detail. Pin Configurations (TOP VIEW) GND COMP NC GATE VDD 6 CS 5 4 2 3 8 RT 7 6 5 2 3 4 NC CS GND COMP RT SOT-23-6 GATE VDD DIP-8 2 R7731A-06 June 2009 R7731A Function Block Diagram OVP - OTP Shutdown Logic + - UVLO Counter 14V/10V Bias & Bandgap OLP Jittering Oscillator SS Constant Power RT Dmax Soft Driver S COMP Slope Ramp CS + PWM Comparator GATE Q R COMP Burst Triple Mode LEB 27V POR Brownout Sensing COMP Open Sensing VDD + X3 VBURL VBURH VDD GND Functional Pin Description Pin No. SOT-23-6 DIP8 Pin Name Pin Function 1 8 GND 2 7 COMP 3 5 RT Set the switching frequency by connecting a resistor to GND. 4 4 CS Primary current sense pin. 5 2 VDD IC power supply pin. 6 1 GATE Gate driver output to drive the external MOSFET. -- 3, 6 NC No internal connection. R7731A-06 June 2009 Ground. Comparator input pin. By connecting a opto-coupler to this pin, the peak current set point is adjusted accordingly to the output power requirement. 3 R7731A Absolute Maximum Ratings l l l l l l l l l l (Note 1) Supply Input Voltage, VDD ----------------------------------------------------------------------------------------GATE Pin -------------------------------------------------------------------------------------------------------------RT, COMP, CS Pin -------------------------------------------------------------------------------------------------IDD ----------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOT-23-6 --------------------------------------------------------------------------------------------------------------DIP-8 ------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOT-23-6, θJA --------------------------------------------------------------------------------------------------------DIP-8, θJA -------------------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ----------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------ Recommended Operating Conditions l l l l −0.3V to 30V −0.3V to 20V −0.3V to 6.5V 10mA 0.4W 0.714W 250°C/W 140°C/W 150°C 260°C −65°C to 150°C 4kV 250V (Note 4) Supply Input Voltage, VDD ----------------------------------------------------------------------------------------Operating Frequency -----------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------Ambient Temperature Range -------------------------------------------------------------------------------------- 12V to 25V 50k to 130kHz −40°C to 125°C −40°C to 85°C Electrical Characteristics (VDD = 15V, RT = 100kΩ, TA = 25°C, unless otherwise specified) Parameter Symbol Conditions Min Typ Max Unit 25.5 27 28.5 V VDD Section VDD Over Voltage Protection Level V OVP On Threshold Voltage V TH_ON 13 14 15 V VDD On/Off Hysteresis V DD_HYS 3 4 5 V Start-up Current IDD_ST -- 20 30 µA Operating Current IDD_OP -- 1.1 2.2 mA VDD Holdup Mode Hysteresis VDD = VTH_ON – 0.1V VDD = 15V, RT = 100kΩ, GATE = Open, VCOMP = 2.5V V DD_HYS VCOMP < 1.6V -- 11.5 -- V VDD Holdup Mode Entry Level V DD_LOW VCOMP < 1.6V -- 11 -- V VDD Clamp Voltage V DD_CLAMP -- 29 -- V 60 65 70 kHz Ending Level Oscillator Section (RT pin) Normal PWM Frequency fOSC RT = 100kΩ To be continued 4 R7731A-06 June 2009 R7731A Parameter Symbol Conditions Frequency Jittering Range PWM Frequency Jitter Period TJIT Maximum Duty Cycle DMAX Frequency Variation Versus VDD Deviation Frequency Variation Versus Temperature Deviation For 65 kHz Min Typ Max Unit -- ±6 -- % -- 4 -- ms 70 75 80 % fDV VDD = 12V to 25V -- -- 2 % fDT TA = −30°C to 105°C (Note 5) -- -- 5 % 5.2 5.6 6 V COMP Input Section Open Loop Voltage COMP Open-loop Protection Delay Cycles Short Circuit Current VCOMP_OP COMP pin open TOLP RT = 100kΩ -- 60 -- ms IZER O VCOMP = 0V -- 1.2 2.2 mA 0.8 0.85 0.9 V Current-Sense Section Initial Peak Current Limit Offset VCSTH Leading Edge Blanking Time TLEB -- 420 520 ns Propagation Delay Time TPD -- 100 -- ns GATE Section Rising Time TR VDD = 15V, CL = 1nF -- 250 350 ns Falling Time TF VDD = 15V, CL = 1nF -- 150 250 ns Gate Output Clamping Voltage VCLAMP VDD = 22V -- 12 -- V Over Temperature Protection TOTP 140 -- -- °C OTP Hysteresis TOTP_H YS -- 30 -- °C Note 1. Stresses beyond those listed under “ Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design. R7731A-06 June 2009 5 R7731A Typical Operating Characteristics VTH vs. Temperature IDD_ST vs. Temperature 15 28 26 14 V TH_ON 24 I DD_ST (uA) V DD (V) 13 12 11 22 20 18 16 VTH_OFF 14 10 12 VDD = 13V 9 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -15 10 35 60 85 110 135 110 135 Temperature (°C) Temperature (°C) fOSC vs. Temperature IDD_OP vs. Temperature 1.55 63 1.50 62 VDD = 11V VDD = 15V f OSC (kHz) I DD_OP (mA) VDD = 27V 1.45 VDD = 11V 1.40 61 VDD = 27V 60 1.35 59 1.30 58 VDD = 15V VCOMP = 2V, CL = 1nF 57 1.25 -40 -15 10 35 60 85 110 -40 135 -15 10 35 60 85 Temperature (°C) Temperature (°C) VCOMP vs. Temperature DMAX vs. Temperature 5.6 80 79 5.56 78 76 VCOMP D MAX (%) 77 75 74 5.52 5.48 73 72 5.44 71 COMP Open Voltage 70 5.4 -40 -20 0 20 40 60 80 Temperature (°C) 6 100 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) R7731A-06 June 2009 R7731A GATE (Rising/Falling) vs. Temperature VCLAMP vs. Temperature 13.0 350 300 250 12.0 GATE (ns) VCLAMP (V) 12.5 11.5 11.0 Rising 200 150 Falling 100 10.5 50 VDD = 20V, CL = 1nF VDD = 20V, CL = 1nF 10.0 0 -40 -15 10 35 60 85 110 135 -40 -25 -10 5 Temperature (°C) 20 35 50 65 80 95 110 125 Temperature (°C) ISUPPLY vs. VDD ISUPPLY vs. Temperature 0.426 0.50 0.424 0.422 I SUPPLY (mA) I SUPPLY (mA) 0.45 0.40 0.35 COMP Pin Open No Gate Output ISUPPLY = IDD_OP − ICOMP 0.420 0.418 0.416 0.414 0.412 COMP Pin Open No Gate Output ISUPPLY = IDD_OP − ICOMP 0.410 0.408 0.30 -40 -20 0 20 40 60 80 100 11 120 12 13 14 15 Temperature (°C) 17 18 19 20 21 22 VDD (V) VCLAMP vs. VDD VGATE_OFF vs. VDD 13 600 575 12 550 VCLAMP (V) VGATE_OFF (mV) 16 525 500 475 11 10 9 450 8 425 ISOURCE = 20mA ISINK = 20mA 7 400 11 12 13 14 15 16 17 VDD (V) R7731A-06 June 2009 18 19 20 21 22 11 12 13 14 15 16 17 18 19 20 21 22 VDD (V) 7 R7731A Application Information UVLO Under Voltage LockOut (UVLO) block is to ensure VDD has reached proper operation voltage before we enable the whole IC blocks. To provide better temperature coefficient and precise UVLO threshold voltage, the reference voltage of hysteresis voltage (10V / 14V) is from band-gap block directly. By this way, R7731A can operate more reliable in different environments. Jittering Oscillator For better EMI performance, R7731A will operate the system with ±6% frequency deviation around setting frequency. To guarantee precise frequency, it is trimmed to 5% tolerance. It also generates slope compensation saw-tooth, 75% maximum duty cycle pulse and overload protection slope. By adjusting resistor of RT pin according to the following formula : 6500 fOSC (kHz) = R T (k Ω ) It can typically operate between 50kHz to 130kHz. Note that RT pin can't be short or open otherwise oscillator will not operate. layout. Also, we amplify current sense signal to compare with feedback signal instead of dividing feedback signal. All the effort is to provide clean and reliable current mode operation. Soft Start During initial power on, especially at high line, current spike is kind of unlimited by current limit. Therefore, besides cycle-by-cycle current limiting, R7731A still provides soft start function. It effectively suppresses the start-up current spike. As shown in the Figure 1 and Figure 2, the start-up VCS is about 0.3V lower than competitor. The typical soft start duration is 4ms (R T=100kΩ). Again, this will provide more reliable operation and possibility to use smaller current rating power MOSFET. V CS V OUT VOUT (2V/Div) VCS (500mV/Div) Built-in Slope Compensation To reduce component counts, slope compensation is implemented by internal built-in saw-tooth. Since it's builtin, it's compromised between loop gain and sub-harmonic reduction. In general design, it can cancel sub-harmonic to 90Vac. Leading Edge Blanking (LEB) Figure 1. Competitor V OUT V CS MOSFET COSS , secondary rectifier reverse recovery current and gate driver sourcing current comprise initial current spike. The spike will seriously disturb current mode operation especially at light load and high line. R7731A provides built-in 420ns LEB to guarantee proper operation in diverse design. VOUT (2V/Div) VCS (500mV/Div) Noise Immunity Current mode controller is very sensitive to noise. R7731A takes the advantages of Richpower long term experience in designing high noise immunity current mode circuit and 8 Figure 2. R7731A R7731A-06 June 2009 R7731A Gate Driver touches VBURL(Typical value is 1.75V). Clock signal will A totem pole gate driver is fine tuned to meet both EMI be blanked and system ceases to switching. After VOUT and efficiency requirement in low power application. An internal pull low circuit is activated after pretty low VDD to prevent external MOSFET from accidentally turning on during UVLO. drops and feedback signal goes back to VBURH(1.8V, typically), switching will be resumed. Burst mode so far is widely used in low power application because it's simple, reliable and will not have any patent infringement issue. Burst Triple-Mode l To fulfill green mode requirement, there are 3 operation modes in R7731A. Please also refer to Figure 3 for details. l PWM Mode : For most of load condition, the circuit will run at traditional PWM current mode. l Burst Mode : During light load, switching loss will dominate the power efficiency calculation. This mode is to cut switching loss. As shown in Figure 3, when the output load gets light, feedback signal drops and Normal Operation Light Load VDD Holdup Mode : When the VDD drops down to VDD turn off threshold voltage, the system will be shut down. During shut down period, controller does nothing to any load change and might cause VOUT down. To avoid this, when VDD drops to a setting threshold, 11V, the hysteresis comparator will bypass PWM and burst mode loop and force switching at a very low level to supply energy to VDD pin. The designed value is 11.25V with 0.5V hysteresis band. No Load (VDD Holdup Mode) Load VDD VDD_HIGH VDD_LOW VCOMP VBURH VBURL VGATE Figure 3. Burst Triple-Mode Protection thermal will be averaged to an acceptable level over the ON/OFF cycle of IC. This will last until fault is removed. # It’s highly recommended to add a resistor in parallel with the opto-coupler. To provide sufficient bias current to make TL-431 regulate properly, 1.2kΩ resistor is suggested. R7731A provides fruitful protection functions that intend to protect system from being damaged. All the protection functions can be listed as below: l l Cycle-by-Cycle Current Limit : This is a basic but very useful function and it can be implemented easily in current mode controller. l Brownout Protection : During heavy load, this will trigger 60ms protection and shut down the system. If it's in light load condition, system will be shut down after VDD is running low and triggers UVLO. l OVP : Output voltage can be roughly sensed by VDD pin.If the sensed voltage reaches 27V threshold, system will be shut down after 20us deglitch delay. Over Load Protection : Long time cycle-by-cycle current limit will lead to system thermal stress. To further protect system, system will be shut down after about 4096 clock cycles. it's about 60ms delay in 67kHz operation. After shutdown, system will resume and behave as hiccup. By proper start-up resistor design, R7731A-06 June 2009 9 R7731A l Feedback Open and Opto-Coupler Short : This will trigger OVP or 60ms delay protection. It depends on which one occurs first. l OTP : Internal OTP function will protect the controller itself from suffering thermal stress and permanent damage. It stops the system from switching until the temperature is under threshold level. Meanwhile, if VDD reaches VDD turn off threshold voltage, system will hiccup till over temperature condition is gone. 10 R7731A-06 June 2009 R7731A PCB Layout Guide A proper PCB layout can abate unknown noise interference MOSFET(b), auxiliary winding(c) and IC control circuit (d). and EMI issue in the switching power supply. Please refer to the guidelines when you want to design PCB layout for switching power supply: Finally, connect them together on bulk capacitor ground(a). The areas of these ground traces should be kept large. The current path (1) from bulk capacitor, transformer, MOSFET, Rcs return to bulk capacitor is a huge high frequency current loop. It must be as short as possible to decrease noise coupling and kept a space to other low voltage traces, such as IC control circuit paths, especially. Besides, the path(2) from RCD snubber circuit to MOSFET is also a high switching loop, too. So keep it as small as possible. It is good for reducing noise, output ripple and EMI issue to separate ground traces of bulk capacitor(a), AC Mains (90V to 265V) CBULK Placing bypass capacitor for abating noise on IC is highly recommended. The bypass capacitor should be placed as close to controller as possible. To minimize reflected trace inductance and EMI minimize the area of the loop connecting the secondary winding, the output diode, and the output filter capacitor. In addition, provide sufficient copper area at the anode and cathode terminal of the diode for heatsinking. Provide a larger area at the quiet cathode terminal. A large anode area can increase high-frequency radiated EMI. (2) (a) + CBULK Ground (a) 5 3 2 RT COMP VDD GATE 6 (c) IC Ground (d) R7731A GND Trace CS 4 Trace Auxiliary Ground (c) Trace MOSFET Ground (b) (1) 1 (d) R7731A-06 June 2009 (b) 11 R7731A Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package 12 R7731A-06 June 2009 R7731A A B E J C L I D F Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 9.068 9.627 0.357 0.379 B 6.198 6.604 0.244 0.260 C 3.556 4.318 0.140 0.170 D 0.356 0.559 0.014 0.022 E 1.397 1.651 0.055 0.065 F 2.337 2.743 0.092 0.108 I 3.048 3.556 0.120 0.140 J 7.366 8.255 0.290 0.325 0.381 L 0.015 8-Lead DIP Plastic Package RICHPOWER MICROELECTRONICS CORP. RICHPOWER MICROELECTRONICS CORP. Headquarter Taipei Office (Marketing) Room 2102, 1077 ZuChongZhi Road, Zhang Jiang Hi-TechPark, Pudong New Area, Shanghai, China 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Tel: (8621)50277077 Fax: (8621)50276966 Tel: (8862)89191466 Fax: (8862)89191465 Taipei County, Taiwan, R.O.C. Email: [email protected] Information that is provided by Richpower Technology Corporation is believed to be accurate and reliable. Richpower reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richpower products into any application. No legal responsibility for any said applications is assumed by Richpower. R7731A-06 June 2009 13