LNK584 LinkZero-AX ™ 零待机功耗的集成离线式开关IC 产品特色 零待机功耗实现最低系统成本 • + + DC PIN <0.00 W at 325 VDC in Power Down Mode 系统配置简单，通过用户控制的唤醒功能即可实现零待机/ Output 断电功耗 • 非常严格的IC参数容差可提高系统制造良品率 • 适合低成本无箝位设计 • 频率调制技术可极大降低EMI滤波元件的成本 • 增大的封装爬电距离可提高系统的应用可靠性 Wide Range High-Voltage DC Input D LinkZero-AX 迟滞热关断保护－自动恢复功能降低了电源从故障现场的回收 • 通用输入范围可在全世界范围内使用 • 自动重启动功能在短路及开环电路故障状况下可将输出功率 降低85%以上 • 简单的ON/OFF控制，无需环路补偿 • 高带宽提供了快速的无过冲启动 EcoSmart™ – 高效节能 • 在325VDC输入下待机/断电功耗低于3mW（注释1） • 无需增加任何元件，轻松满足全球所有的节能标准 • ON/OFF控制可在极轻负载时具备恒定的效率 应用 • 超低功耗隔离式或非隔离式待机及辅助电源 说明 LinkZero-AX可设计出业界使用元件数最少的待机电源，并实现极 Power Down Pulse ≥2.5 ms S CBP 先进的保护/安全特性 • FB BP/M Reset/Wake Up Pulse CBP <1.5 V PI-5909-100410 图1.典型应用电路图 输出功率表 产品3 230VAC±15% 2 85-265VAC 敞开式 敞开式2 LNK584GG 3W 3W LNK584DG 3W 3W 表1.输出功率表 注释： 1. IEC62301第4.5条规定低于5mW的待机功率为零功耗。 2. 最大的实际持续输出功率是在敞开式设计及有足够的散热、环境温度为50ºC 的条件下测量得到的。 3. 封装：D:SO-8C，G:SMD-8C。 低的待机/断电功耗。该器件在230 VAC下的断电功耗(PD)低于3 mW，符合IEC 62301定义的零功耗标准，并且在大部分功率表 中都无法测量出来。LinkZero-AX使用外部信号进入断电模式，将 反馈引脚拉高2.5ms。此类信号可由系统微控制器或红外控制器 生成。在断电模式下，旁路引脚仍维持调整，通过复位脉冲将旁 路引脚拉低到复位阈值以下，即可将LinkZero-AX唤醒。因此，不 需要使用继电器断开输入电压就能实现超低系统功耗。 LinkZero-AX专门用于设计隔离式或非隔离式转换器。无论设计哪 种转换器，严格指定的反馈(FB)引脚电压参考都能实现通用输入 下在初级侧稳压的电源，以经济高效的方式替换非稳压线性变压 器和其他开关电源。启动及工作时的功率直接来自于漏极引脚。 通过内部振荡器频率的抖动大大降低了准峰值和平均值的EMI， 从而降低滤波器成本。 www.powerint.com 2010年10月 LNK584 BYPASS/ MULTI FUNCTION (BP/M) PU GENERATOR FEEDBACK REF 1.70 V OPEN LOOP PULL UP OVERVOLTAGE PROTECTION + + 3V 6.45 V 5.85 V 4.85 V + AUTO-RESTART COUNTER FEEDBACK (FB) RESET + DRAIN (D) REGULATOR 5.85 V + BYPASS PIN UNDERVOLTAGE - FAULT CURRENT LIMIT + JITTER - VI 0.9 V LIMIT CLOCK CC CUT BACK 1.70 V - 0.9 V ADJ DCMAX S Q R Q OSCILLATOR SYSTEM POWER DOWN POWER DOWN COUNTER 160 fOSC CYCLES RESET LEADING EDGE BLANKING PU PI-5912-090810 SOURCE (S) 图2.功能结构图 引脚功能描述 漏极(D)引脚： 功率MOSFET的漏极连接点。在启动、稳态和断电模式工作时 G Package (SMD-8C) D Package (SO-8C) 提供内部操作电流。 旁路/多功能(BP/M)引脚： 一个0.1μF或更大的外部旁路电容连接到这个引脚，用于生成内 BP/M 1 FB 2 部的5.85V供电电源。为维持内部电路工作，电容的最小值应为 D 7 S 5 4 止MOSFET开关。 3a 反馈(FB)引脚： BP/M FB 1 8 2 7 6 S S D 4 5 S S S S 3b PI-5910-090810 在正常工作下，功率MOSFET的开关由此引脚控制。当一个高 于内部VFB参考电压的电压施加到该引脚时，MOSFET开关将被 S 6 0.1μF。在进入断电模式时则需要更高的电容值（参见应用指南 部分）。如果该引脚上的电压升高到6.45V以上，过压保护将禁 8 图3.引脚配置 禁止。VFB的参考电压内部设置在1.70 V。当反馈引脚电压降至 0.9V时，LinkZero-AX进入自动重启动模式。 源极(S)引脚： 这个引脚是功率MOSFET的源极连接点。它也是旁路和反馈引 脚的接地参考。 2 版本A10/10 www.powerint.com LNK584 LinkZero-AX功能描述 输出功率限制 LinkZero-AX在一片晶圆上包括一个700 V的功率MOSFET开关及 当反馈引脚电压在满载条件下降低到1.70V以下时，振荡器频率 一个电源控制器。与通常的PWM（脉冲宽度调制）控制器不同， 开始线性下降，到自动重启动阈值电压0.9V时频率通常会降到 它使用了一个简单的ON/OFF控制来调节输出电压。这个控制 60%的水平上。这一功能可限定电源的输出电流及输出功率。 器包括一个振荡器、反馈（感测及逻辑）电路、5.85V稳压器、 5.85 V稳压器 旁路引脚欠压电路、过热保护、频率抖动、电流限流电路及前沿 只要MOSFET处在关断状态，5.85 V稳压器就会从漏极吸收电流， 消隐功能。此外，该控制器还采用了拥有专利的断电模式，可自 动将待机功耗降至大部分功率表都难以测量的超低水平。 将连接到旁路引脚的旁路电容充电到5.85V。旁路引脚是内部供 电电压节点。当MOSFET导通时，器件使用存储在旁路电容中 断电模式 的能量。内部电路极低的功率耗散使LinkZero-AX可使用从漏极 内部控制器在跳过160个开关周期后将进入断电模式。出现这一 吸收的电流持续工作。一个0.1µF的旁路电容就足够实现高频率 情况的原因是：反馈引脚在接收到外部断电脉冲信号后被拉 高，或者变压器上的总负载（输出负载加上反馈电路负载）被 的去耦及能量存储。 降至满载的约0.6%，即出现轻载条件。器件然后以超低功耗模 6.45 V箝位及分流稳压器 式工作，此时开关被完全禁止。当旁路引脚被拉低到1.5V以下， 另外，当有电流从外部提供给旁路引脚时，一个6.45V的分流稳 然后释放并通过与内部漏极相连的5.85V稳压器电路（见图2） 压箝位电路会将旁路引脚电压箝在6.45V。在非隔离设计中，这 重新充电时，控制器被唤醒（或复位）。当旁路电容对旁路引 有助于通过电阻从偏置绕组或电源输出端对器件进行外部供 脚充电到阈值VBP时，器件开始开关并正常工作。如果反馈引脚 电，从而降低器件功耗并提高电源效率。 拉高并再次跳过160个周期，器件将返回上述断电模式工作。 振荡器 6.45V分流稳压器只在正常工作模式下带有负载。在断电模式下， 典型的振荡器频率内部设置在100kHz的平均水平。一个内部电 电压较高时（典型值为8.5V）第二箝位将对旁路引脚进行箝位。 路会检测MOSFET开关导通时间的占空比并调整振荡器的频 率，以使振荡器频率在较长的导通间隔（低输入电压）内达到 约100kHz，在较短的导通间隔（高输入电压）内达到约78kHz。 进行这种内部频率调整是为了让峰值功率点始终高于输入电 旁路引脚欠压保护 旁路引脚欠压电路在旁路引脚电压下降到4.85V以下时关断功率 MOSFET。一旦旁路引脚电压下降到4.85V以下，它就必须上升 压。此振荡器产生两个信号：最大占空比信号(DCMAX)及显示每 回5.85V才能重新导通功率MOSFET。 个开关周期开始的时钟信号。 旁路引脚过压保护 振荡器具有的电路可导入少量的频率抖动，通常为6%的开关频 率以将EMI降低到最小。频率抖动的调制速率设置在1 kHz的水 平，目的是降低平均及准峰值的EMI，并给予优化。频率抖动与 如果旁路引脚的电压被拉升到6.45V以上且分流稳压器中的电流 超过6.5mA，将设定锁存，功率MOSFET将停止开关。要对此锁 存进行复位，必须将旁路引脚的电压拉低到1.5V以下。 振荡器频率成正比，测量时应把示波器触发设定在漏极电压波 过热保护 形的下降沿来测量。当反馈引脚电压降到1.70V以下时，振荡器 热关断电路检测结的温度。阈值设置在142°C并具备70°C的迟 频率将逐渐降低。 滞范围。当结温度超过这个阈值(142°C)，功率MOSFET开关被 反馈输入电路恒压模式 禁止，直到结温度下降70°C，MOSFET才会重新使能。 反馈输入电路的参考电压设置在1.70V。当反馈引脚电压达到VFB 电流限流点 参考电压(1.70 V)时，反馈电路的输出端会产生一个低逻辑电平 （禁止）。在每个周期开始时，对输出进行采样。如果高，功 率MOSFET会在那个周期导通（使能），否则功率MOSFET将仍 电流限流电路检测功率MOSFET的电流。当电流超过内部阈值 (I LIMIT )时，在该周期剩余阶段会关断功率MOSFET。在功率 处于关断状态（禁止）。由于采样仅在每个周期开始时进行， MOSFET导通后，前沿消隐电路会将电流限流比较器抑制片刻 此周期中随后产生的反馈引脚电压的变化对MOSFET状态都不 (tLEB)。通过设置前沿消隐时间，可以防止由电容及整流管反向恢 构成影响。 复时间产生的电流尖峰引起导通的MOSFET提前误关断。 3 www.powerint.com 版本A10/10 LNK584 自动重启动 型滤波器得以实现。LinkZero-AX具有专利的频率抖动功能，无 一旦出现故障，比如输出短路，LinkZero-AX进入自动重启动 需使用任何Y电容或共模电感。绕线式电阻RF1属于可熔阻燃型 操作。每当反馈引脚电压超过反馈引脚的自动重启动阈值电压 电阻，也可以用作保险丝来限定浪涌电流。对于输入电压高于 (VFB(AR))的典型值0.9 V时，一个由振荡器计时的内部计数器会进 132VAC的设计，建议使用绕线式电阻，以便在首次施加交流电 行复位。如果反馈引脚电压下降到VFB(AR)并超过了145 ms到170 ms 时能够承受瞬时功耗。 （具体取决于输入电压大小），功率MOSFET开关被禁止。 自动重启动电路以一个12%典型占空比对功率MOSFET进行交 输出电压直接通过反馈电阻R3和R9进行检测，并由LinkZero-AX 替使能和禁止，直到故障排除为止。 (U1)通过反馈引脚进行调整。电容C7对反馈引脚提供高频滤波， 以进行噪声滤波并避免开关周期脉冲束流。U1中的控制器通过 反馈引脚开环情况 反馈电阻R9和R3接收来自输出端的反馈，并根据该反馈使能或 当检测到反馈引脚的开环情况时，内部电流源会将反馈引脚电 压拉升到VFB(1.70 V)以上，器件停止开关，并在160个时钟周期 后进入锁存断电模式。 禁止其集成MOSFET的开关，以维持输出电压的稳定。一旦超出 反馈引脚阈值电压(1.70V)，将跳过开关周期。当反馈引脚电压 低于禁止阈值(1.70V)时，开关周期将重新使能。通过调整使能 应用范例 与禁止开关周期的比例，可以调整输出电压。当加重的负载超出 输出峰值功率值时（跳过所有开关周期），反馈引脚电压开始随 图4所示为一个使用LinkZero-AX设计的典型非隔离式5 V、300 mA 电源输出电压的下降而降低。在这种情况下，开关频率也将下 输出辅助电源的电路图。隔离式设计也可以与LinkZero-AX完全 降，以限制最大输出过载功率。当反馈引脚电压下降到低于自动 兼容，因为反馈引脚接收来自初级反馈/偏置绕组的信号或通过 重启动阈值（反馈引脚通常为0.9V）时，电源进入自动重启动 光耦器接收信号。图4电路是白色家电产品应用中常用的辅助电 模式。在此模式下，电源将关断约1.2s，然后重新导通约170ms。 源，通常不要求隔离。AC输入差模滤波可由C1、C2和L3形成的π 自动重启动功能可在输出短路情况下减小平均输出电流。 C4 R8 220 pF 5.1 Ω 100 V L3 1 mH D6 SS15 R2 4.7 kΩ D1 1N4007 L4 1.8 µH T1 3 EE16 8 D2 1N4007 1 10 C6 220 µF 25 V C9 330 nF 50 V C1 3.3 µF 400 V R9 1 kΩ 1% LinkZero-AX U1 LNK584DG C2 3.3 µF 400 V D Q1 MMBT3904 FB BP/M R16 750 Ω S D3 1N4007 5 V, 300 mA RTN RF1 10 Ω 2W 85 - 265 VAC C8 R13 56 µF 510 Ω 16 V R12 20 kΩ D4 1N4007 C5 150 nF 25 V C10 47 µF 25 V C7 1 nF 50 V R3 511 Ω 1% PD Set Q2 MMBT3904 SW1 R10 20 kΩ R4 10 kΩ R14 PD Reset 2 kΩ RTN PI-6121-092010 图4.非隔离式1.5W,5V,300mA,0.00W待机功耗电源的电路图 4 版本A10/10 www.powerint.com LNK584 LinkZero-AX器件通过漏极引脚进行自偏置。在非隔离式设计 使用低值反馈引脚电容来充当假负载。反馈电阻的建议值大小应 中，可选外部偏置可来自第三层绕组，也可来自输出电压母线。 能够吸收约1%的满载电流。最后，可以将一个电容与电压端反 通过提供超过IS2（LNK584为310μA）的外部供电电流，可使内 馈电阻并联，用来提高环路的速度（图4中的C9）。 部5.85V稳压器电路关断，这样能迅速降低器件温度和提升效率， 在高压下特别有效。 这些建议适用于满载，可使瞬时负载降至零。对于负载范围更 为有限的应用来说，可能不用将假负载及电容与高压端反馈电 由于器件采用了流限调节技术，使得限流点容差非常精确， 同时采用了专利的变压器结构技术，得以在初级电路中实现无 箝位电路的设计。因此，峰值漏极电压在265VAC输入时可以控 制在550V以下，对700V耐压(BVDSS)的MOSFET来说具有非常大 的裕量。 阻并联。 布局注意事项 LinkZero-AX PCB板布局的注意事项 布局 输出的整流滤波由输出整流管D6和滤波电容C6来实现。由于自 参见图5LinkZero-AX(U1)的推荐电路板布局。 动重启动特性，平均短路输出电流大大低于1A，因而可以使用低 单点接地 电流额定值和低成本的整流管D6。输出电路只要能处理电源输出 在输入滤波电容与连接源极引脚的铜铂区域使用一个单一接地 短路时的持续短路电流就可以了。本设计在电源输出端使用了一 点(Kelvin)。 个假负载电阻R13，以防止在负载断开时自动触发断电模式。 旁路电容(CBP)、反馈引脚噪声滤波电容(CFB)及反馈电阻 LinkZero-AX断电(PD)模式设计指南 为减小环路面积，这两个电容的物理位置应分别尽量接近旁路 LinkZero-AX会在跳过160个连续开关周期后进入断电模式。这种 扰，反馈电阻RFB1和RFB2应靠近反馈引脚放置。 和源极引脚，以及反馈和源极引脚。另请注意，为降低噪声干 情况发生在输出负载过低或反馈引脚被拉高（例如，通过图4中 的Q1和R16）的条件下。旁路引脚电容的值必须足够高，才能在 超过160个开关周期的时长内维持足够的电流流经R16，从而成 初级环路面积 连接输入滤波电容、变压器初级及LinkZero-AX的初级环路面积 应尽可能小。 功触发断电模式。在低输入电压(90VAC)下，当内部振荡器频率 为100kHz时，160个开关周期的时长约为1.6ms。然而，随着输 入电压的升高，内部振荡器频率将逐渐降低，以使最大输出功率 保持相对稳定。因此在高压(265VAC)下，内部振荡器频率可低 至78 kHz（参见参数表注释C）。因此，为了提供足够的裕量以 确保触发断电模式，建议断电脉冲（见图1）应为2.5ms（80kHz 初级箝位电路 可以使用一个外部箝位来控制MOSFET在关断状态时漏极引脚 的峰值电压。在初级绕组上使用一个RCD箝位或一个齐纳稳压 管(~200V)及二极管箝位即能够实现。在任何情况下，为改善 EMI，从箝位元件到变压器再到LinkZero-AX(U1)的电路路径应 保证最小。 时跳过个200开关周期）。LinkZero-AX在触发断电模式时可立即 停止开关。只有在旁路引脚通过复位/唤醒脉冲被拉低到1.5V以 下（见图1），然后能够通过与内部漏极相连的5.85V稳压器电 路重新充电至5.85 V时，IC才会恢复开关。可使用晶体管Q2或机 械开关SW1以电子或机械方式来复位断电模式。 散热考量 LinkZero-AX(U1)之下的铜铂区域不仅仅是一个接地点，而且还 起到一个散热片的作用。因它连接到安静的源极节点，应将这 个区域扩大以使U1实现良好的散热。这同样适用于输出二极管 的阴极。 设计出的电源必须能够确保瞬态负载和其他外部事件不会意外 Y电容 触发断电模式，也即不会造成跳过160个连续开关周期。建议添 应将Y电容（如使用）直接放置在初级输入滤波电容正极和变压 加一个假负载电阻，用来吸收约2%的满载电流（在3W电源中， 器次级的共地/返回极接脚之间。这样放置会使高幅值的共模浪 5V下为12mA）。虽然这样会稍微降低满载效率，但不会影响到 涌电流远离U1。注意：如果在输入端使用了π型EMI滤波器， 断电期间的功耗情况，因为电源输出在此时将完全放电。也可以 那么滤波器内的电感应放置在输入滤波电容的负极之间。 5 www.powerint.com 版本A10/10 LNK584 CB DB RS CS DBP RBP DO RFB2 CFB CO CBP RFB1 R6 Transformer U1 J3 Ð HV DC IN T1 Ð + + LV DC OUT PI-6098-092410 图5.一个2.1W,6V,350mA充电器的PCB布局 输出二极管(DO) 要达到最佳的性能，连接次级绕组、输出二极管(DO)及输出滤波 2. 最大漏极电流 – 在最高环境温度、最大输入电压及峰值输出 （过载）功率情况下，检查漏极电流以确定变压器是否出现 电容(CO)的环路区域面积应最小。此外，与二极管的阴极和阳极 饱和，另外也要检测电源开启时是否出现过高的前沿导通电 连接的铜铂区域应足够大，以便用来散热。最好在电气安静的 流尖峰。在稳态工作下重复以上操作，校验前沿电流尖峰在 阴极留有更大的铜铂区域。阳极铺铜区域过大会增加高频传导 t LEB(MIN)结束时低于ILIMIT(MIN)。在任何条件下，最大漏极电流应 及辐射EMI。电阻RS与CS形成次级侧RC缓冲电路。 低于规定的绝对最大额定值。 快速设计校验 3. 热检测–在规定的最大输出功率、最小输入电压及最高环境温 度情况下，检查LinkZero-AX、变压器、输出二极管及输出电 对于任何使用LinkZero-AX的电源设计，都应经过全面测试以确 容的温度没有超标。应有足够的温度裕量以保证LinkZero-AX 保在最差条件下元件的规格没有超过规定范围。建议至少进行 不会因元件与元件间R DS(ON) 的差异而引起过热问题，请参 如下测试： 1. 最大漏极电压 – 校验在最高输入电压和峰值（过载）输出功 率时VDS没有超过660V。给700V的BVDSS规格增加50V的裕 见数据手册中关于RDS(ON)的说明。建议在低压输入及最大输 出功率的情况下，LinkZero-AX源极引脚的最高温度不高于 100°C，这样就可以适应上述参数的变化。 量，使得在设计变更时留有一定的设计裕量，尤其是在无箝 位电路设计中。 6 版本A10/10 www.powerint.com LNK584 绝对最大额定值(1,6) 漏极电压....................................................................-0.3V至700V 峰值漏极电流(LNK584)........................................200(375)mA(2) 峰值负向脉冲漏极电流................................................. -100mA(3) 反馈电压........................................................................-0.3V至9V 反馈电流............................................................................. 100mA 旁路引脚电压................................................................-0.3V至9V 断电模式下的旁路引脚电压................................... -0.3V至11V(7) 贮存温度............................................................... -65°C至150°C 工作结温............................................................. -40°C至150°C(4) 引线温度(4)........................................................................... 260°C(5) 注释： 1. 所有电压都是以TA=25°C时的源极为参考点。 2. 在漏源极电压不超过400V时允许使用更高的峰值漏极电流。 3. 持续时间不超过2μs。 4. 通常由内部电路控制。 5. 在距壳体1/16英寸处测量，持续时间5秒。 6. 在短时间内施加器件允许的最大额定值不会引起产品永久性的 损坏。但长时间用在器件允许的最大额定值时，会对产品的可靠 性造成影响。 7. 流入引脚的最大电流为300μA。 热阻 热阻：D封装： (qJA)..................................100°C/W(2);80°C/W(3) (qJC)(1)........................................................30°C/W G封装： (qJA)....................................70°C/W(2);60°C/W(3) (qJC)(1)........................................................ 11°C/W 参数 注释： 1. 在靠近塑料表面的源极引脚测得。 2. 焊在0.36平方英寸(232mm2)、2盎司铜铂区域。 3. 焊在1平方英寸(645mm2)、2盎司铜铂区域。 符号 条件 源极=0V；T =-40°C至125°C J （除非另有说明） 最小值 典型值 最大值 单位 fOSC TJ=25°C VFB=1.70V，参见注释C 93 100 107 kHz 控制功能 输出频率 频率抖动 相对于平均频率抖动的峰峰值， TJ=25°C ±3 % TJ=25°C VFB=VFB(AR) 参见注释B 60 % % 自动重启动操作频率 与fOSC的比率 fOSC(AR) 最大占空比 DCMAX 60 63 不存在跳过周期时的 反馈引脚电压 VFB 1.63 1.70 1.77 V 自动重启动时的反馈 引脚电压 VFB(AR) 0.8 0.9 1.05 V 开关最短导通时间 tON(MIN) 700 ns 7 www.powerint.com 版本A10/10 LNK584 符号 条件 源极=0V；TJ=-40°C至125°C （除非另有说明） 最小值 典型值 最大值 IS1 反馈电压>VFB （MOSFET未开启） 150 195 260 IS2 0.9V≤VFB≤1.70V （MOSFET开启） 210 260 310 ICH1 VBP=0V,TJ=25°C -5.5 -3.8 -1.8 ICH2 VBP=4V,TJ=25°C -3.8 -2.5 -1.0 VBP 5.60 5.85 6.10 V 旁路引脚电压迟滞 VBP(H) 0.8 1.0 1.2 V 旁路引脚分流电压 BPSHUNT 6.0 6.45 6.9 V 旁路引脚供电电流 IBPSC 参见注释E 84 ILIMIT di/dt=40mA/ms TJ=25°C 126 136 146 mA 功率因数 I2f di/dt=40mA/ms TJ=25°C 1665 1850 2091 A2Hz 前沿消隐时间 tLEB TJ=25°C 220 265 旁路引脚关断阈值电流 ISD 6.2V<VBP<6.8V 5.0 6.5 8.0 mA 热关断温度 TSD 参见注释B 135 142 150 °C 热关断迟滞 TSD(H) 参见注释B 70 断电模式下的关断状态 漏极漏电流 IDSS(PD) TJ=25°C, VDRAIN=325V 参见图21 6.5 9 mA 旁路引脚通电复位阈值 （断电模式或在电源启 动时） VBP(PU) 1.5 3 4 V 断电模式下的旁路引脚 过压保护 VBP(PDP) IBP=300mA TJ≤100°C 7.25 8.5 10.9 V 断电模式下的旁路引脚 电压 VBP(PD) TJ=25°C VDRAIN=325V 参数 单位 控制功能（继上） 漏极供电电流 旁路引脚充电电流 旁路引脚电压 mA mA mA 电路保护 流限点 ns °C 断电(PD)模式 4 V 8 版本A10/10 www.powerint.com LNK584 参数 符号 条件 源极=0V；T =-40°C至125°C J （除非另有说明） 最小值 典型值 最大值 TJ=25°C 48 55 TJ=100°C 76 88 单位 输出 导通电阻 关断状态漏极漏电流 击穿电压 RDS(ON) ID=13mA IDSS VBP=6.2V,VDS=560V,VFB>1.70V TJ=125°C,参见注释A BVDSS VBP=6.2V,TJ=25°C 漏极供电电压 自动重启动导通时间 tAR 自动重启动关断时间 DCAR 输出使能延时 tEN 50 W mA 700 V 50 V VIN=85VAC,TJ=25°C, 参见注释D 145 ms 1.0 s 参见图8 14 ms 注释： A. 当占空比超过DCMAX时，LNK584在导通时间延长模式下工作。 B. 此参数是通过表征法得到的。 C. 输出频率规格适用于最终应用中的低输入电压。设计出的控制器可在高压输入下降低约20%的输出频率，使低压和高压下的最 大输出功率保持平衡。 D. 从低压输入到高压输入（85VAC至265VAC），自动重启动导通/关断时间延长20%。 E. 该电流仅是用来驱动旁路引脚与反馈引脚之间连接的光藕，不能用来给任何其它外部电路进行供电。 9 www.powerint.com 版本A10/10 LNK584 BP/M S FB S S 0-2 V 0.1 µF S1 D 470 Ω 5W S 50 V PI-6067-072110 图6.一般测试电路 DCMAX (internal signal) tP FB tEN VDRAIN tP = 1 fOSC PI-3707-112503 图8.输出使能定时 PI-4021-101305 DRAIN Current (mA) 图7.占空比测量 100 2 μs 0 -100 Time (μs) 图9.峰值负脉冲漏极电流波形 10 版本A10/10 www.powerint.com LNK584 典型性能特性 1.0 0.9 -50 -25 0 25 50 PI-6065-071910 1.2 Output Frequency (Normalized to 25 °C) PI-2213-012301 Breakdown Voltage (Normalized to 25 °C) 1.1 1.0 0.8 0.6 0.4 0.2 0 75 100 125 150 -50 -25 Junction Temperature (°C) 图10.击穿电压相对于温度的变化 25 50 75 100 125 图11.频率相对于温度的变化 1.0 0.8 PI-4057-071905 Current Limit (Normalized to 25 °C) 1.2 1.1 FEEDBACK Pin Voltage (Normalized to 25 °C) PI-6066-071910 1.4 1.0 0.6 0.4 0.2 0.9 0 0 50 100 -50 -25 150 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C) 图12.限流点相对于温度的变化 图13.反馈引脚电压相对于温度的变化 6 5 4 3 2 1 200 175 DRAIN Current (mA) PI-2240-012301 7 PI-3927-083104 -50 BYPASS Pin Voltage (V) 0 Junction Temperature (°C) 25 °C 150 100 °C 125 100 75 50 25 0 0 0 0.2 0.4 0.6 0.8 1.0 0 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) Time (ms) 图14.旁路引脚启动波形(CBP=0.22mF). 2 图15.输出特性 11 www.powerint.com 版本A10/10 LNK584 典型性能特性（继上） 100 Frequency (kHz) 100 10 PI-6068-071910 110 PI-3928-083104 Drain Capacitance (pF) 1000 90 80 70 1 60 0 100 200 300 400 500 0 600 10 Drain Voltage (V) 50 60 70 30 20 10 0 -10 -20 PI-6071-072110 40 0 FEEDBACK Pin Current (µA) PI-6070-072110 FEEDBACK Pin Current (µA) 40 图17.频率降低相对于占空比（线电压）的变化 50 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -30 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 7.0 FEEDBACK Pin Voltage (V) FEEDBACK Pin Voltage (V) 图18.反馈引脚的输入特性曲线 图19.输出功率限制期间反馈引脚的输入特性曲线（1.70V至0.9V） 9 Drain Current (µA) Auto-Restart PI-6111-081810 10 PI-6139-091010 FEEDBACK Pin Current (µA) 30 Duty Cycle (%) 图16.CDSS相对漏极电压的变化 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 20 8 7 6 5 4 3 2 1 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Frequency Normalized to 1 图20.输出功率限制期间频率下降 -50 -25 0 25 50 75 100 125 Temperature (°C) 图21.断电模式下典型漏极电流随温度的变化 12 版本A10/10 www.powerint.com LNK584 SO-8CDŽG ॖᓤDž 4 B 0.10 (0.004) C A-B 2X 2 DETAIL A 4.90 (0.193) BSC A 8 4 D 5 2 3.90 (0.154) BSC GAUGE PLANE SEATING PLANE 6.00 (0.236) BSC 0-8 C 1.04 (0.041) REF 0.10 (0.004) C D 2X Pin 1 ID 1 0.40 (0.016) 1.27 (0.050) 0.20 (0.008) C 2X 7X 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) M C A-B D 1.27 (0.050) BSC 1.35 (0.053) 1.75 (0.069) 4 0.25 (0.010) BSC 1.25 - 1.65 (0.049 - 0.065) 0.10 (0.004) 0.25 (0.010) DETAIL A 0.10 (0.004) C H 7X SEATING PLANE C Reference Solder Pad Dimensions 2.00 (0.079) D07C 1.27 (0.050) 4.90 (0.193) 0.17 (0.007) 0.25 (0.010) Notes: 1. JEDEC reference: MS-012. 2. Package outline exclusive of mold flash and metal burr. 3. Package outline inclusive of plating thickness. 4. Datums A and B to be determined at datum plane H. 5. Controlling dimensions are in millimeters. Inch dimensions are shown in parenthesis. Angles in degrees. 0.60 (0.024) PI-4526-040110 13 www.powerint.com 版本A10/10 LNK584 SMD-8CDŽG ॖᓤDž ⊕ D S .004 (.10) .046 .060 .060 .046 -E- .080 .086 Pin 1 .137 (3.48) MINIMUM Solder Pad Dimensions .420 .367 (9.32) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 5) .125 (3.18) .145 (3.68) .032 (.81) .037 (.94) .286 Pin 1 .100 (2.54) (BSC) -D- .186 .372 (9.45) .388 (9.86) ⊕ E S .010 (.25) .240 (6.10) .260 (6.60) Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 3. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. Pin 3 is omitted. 4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. Lead width measured at package body. 6. D and E are referenced datums on the package body. .048 (1.22) .053 (1.35) .004 (.10) .009 (.23) .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) 0°- 8° G08C PI-4015-101507 14 版本A10/10 www.powerint.com LNK584 元件订购信息 • LinkSwitch产品系列 • AX序列号 • 封装信息 D 塑封SO-8C G 塑封SMD-8C • 封装材料 G 绿色：无卤素和符合RoHS • 带装和卷轴装及其他包装形式 空白 LNK 584 D G - TL TL 标准配置 带装和卷轴装，D封装至少2500片，G封装至少1000片 15 www.powerint.com 版本A10/10 版本 A 注释 日期 初始版本 10/10 有关最新产品信息，请访问：www.powerint.com PowerIntegrationsreservestherighttomakechangestoitsproductsatanytimetoimprovereliabilityormanufacturability.Power Integrationsdoesnotassumeanyliabilityarisingfromtheuseofanydeviceorcircuitdescribedherein.POWERINTEGRATIONSMAKES NOWARRANTYHEREINANDSPECIFICALLYDISCLAIMSALLWARRANTIESINCLUDING,WITHOUTLIMITATION,THEIMPLIED WARRANTIESOFMERCHANTABILITY,FITNESSFORAPARTICULARPURPOSE,ANDNON-INFRINGEMENTOFTHIRDPARTYRIGHTS. Patent Information Theproductsandapplicationsillustratedherein(includingtransformerconstructionandcircuitsexternaltotheproducts)maybecovered byoneormoreU.S.andforeignpatents,orpotentiallybypendingU.S.andforeignpatentapplicationsassignedtoPowerIntegrations. AcompletelistofPowerIntegrationspatentsmaybefoundatwww.powerint.com.PowerIntegrationsgrantsitscustomersalicense undercertainpatentrightsassetforthathttp://www.powerint.com/ip.htm. Life Support Policy POWERINTEGRATIONSPRODUCTSARENOTAUTHORIZEDFORUSEASCRITICALCOMPONENTSINLIFESUPPORTDEVICESOR SYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFTHEPRESIDENTOFPOWERINTEGRATIONS.Asusedherein: 1. ALifesupportdeviceorsystemisonewhich,(i)isintendedforsurgicalimplantintothebody,or(ii)supportsorsustainslife,and(iii) whosefailuretoperform,whenproperlyusedinaccordancewithinstructionsforuse,canbereasonablyexpectedtoresultinsignificant injuryordeathtotheuser. 2. Acriticalcomponentisanycomponentofalifesupportdeviceorsystemwhosefailuretoperformcanbereasonablyexpectedtocause thefailureofthelifesupportdeviceorsystem,ortoaffectitssafetyoreffectiveness. ThePIlogo,TOPSwitch,TinySwitch,LinkSwitch,DPA-Switch,PeakSwitch,EcoSmart,Clampless,E-Shield,Filterfuse,StakFET,PIExpert andPIFACTSaretrademarksofPowerIntegrations,Inc.Othertrademarksarepropertyoftheirrespectivecompanies. ©2010,PowerIntegrations,Inc. Power Integrations全球销售支持网络 全球总部 5245HellyerAvenue SanJose,CA95138,USA. Main:+1-408-414-9200 CustomerService: Phone:+1-408-414-9665 Fax:+1-408-414-9765 e-mail:[email protected] 中国（上海） Room1601/1610,Tower1 KerryEverbrightCity No.218TianmuRoadWest Shanghai,P.R.C.200070 Phone:+86-21-6354-6323 Fax:+86-21-6354-6325 e-mail:[email protected] 中国（深圳） RmA,B&C4thFloor,BlockC, ElectronicsScienceand TechnologyBldg.,2070 ShennanZhongRd, Shenzhen,Guangdong, China,518031 Phone:+86-755-8379-3243 Fax:+86-755-8379-5828 e-mail:[email protected] 德国 Rüeckertstrasse3 D-80336,Munich Germany Phone:+49-89-5527-3910 Fax:+49-89-5527-3920 e-mail:[email protected] 印度 #1,14thMainRoad Vasanthanagar Bangalore-560052India Phone:+91-80-4113-8020 Fax:+91-80-4113-8023 e-mail:[email protected] 意大利 ViaDeAmicis2 20091BressoMI Italy Phone:+39-028-928-6000 Fax:+39-028-928-6009 e-mail:[email protected] 日本 KoseiDai-3Bldg. 2-12-11,Shin-Yokohama, Kohoku-ku Yokohama-shiKanagwan 222-0033Japan Phone:+81-45-471-1021 Fax:+81-45-471-3717 e-mail:[email protected] 韩国 RM602,6FL KoreaCityAirTerminalB/D,159-6 Samsung-Dong,Kangnam-Gu, Seoul,135-728,Korea Phone:+82-2-2016-6610 Fax:+82-2-2016-6630 e-mail:[email protected] 台湾 5F,No.318,NeiHuRd.,Sec.1 NeiHuDist. Taipei,Taiwan114,R.O.C. Phone:+886-2-2659-4570 Fax:+886-2-2659-4550 e-mail:[email protected] 欧洲总部 1stFloor,St.James’sHouse EastStreet,Farnham SurreyGU97TJ UnitedKingdom Phone:+44(0)1252-730-141 Fax:+44(0)1252-727-689 e-mail:[email protected] 技术支持热线 WorldWide+1-408-414-9660 新加坡 51NewtonRoad 技术支持传真 #15-08/10GoldhillPlaza WorldWide+1-408-414-9760 Singapore,308900 Phone:+65-6358-2160 Fax:+65-6358-2015 e-mail:[email protected] LNK584 LinkZero-AX ™ Zero Standby Consumption Integrated Off-Line Switcher Product Highlights Lowest System Cost with Zero Standby Consumption • Simple system configuration provides zero consumption standby/power down with user controlled wake up • Very tight IC parameter tolerances improves system manufacturing yield • Suitable for low-cost clampless designs • Frequency jittering greatly reduces EMI filter cost • Extended package creepage improves system field reliability Advanced Protection/Safety Features • Hysteretic thermal shutdown protection – automatic recovery reduces field returns • Universal input range allows worldwide operation • Auto-restart reduces delivered power by >85% during shortcircuit and open loop fault conditions • Simple ON/OFF control, no loop compensation needed • High bandwidth provides fast turn on with no overshoot EcoSmart™ – Energy Efficient • Standby/power down consumption less than 3 mW at 325 VDC input (Note 1) • Easily meets all global energy efficiency regulations with no added components • ON/OFF control provides constant efficiency to very light loads Applications • Ultra low consumption isolated or non-isolated standby and auxiliary supplies Description LinkZero-AX combines extremely low standby/power down energy use with the industry’s lowest component count standby supply solution. Below 3 mW at 230 VAC in power down (PD) mode meets IEC 62301 definition of zero power consumption and is immeasurable on most power meters. LinkZero-AX is set into PD mode using an external signal to pull the FEEDBACK pin high for 2.5 ms. Such an external signal can be generated by a system micro controller or infrared controller. In PD mode the BYPASS pin remains regulated allowing the LinkZero-AX to be woken up with a reset pulse to pull the BYPASS pin below a reset threshold. Ultra low system consumption is therefore achieved without needing to disconnect the input voltage with a relay. + + DC PIN <0.00 W at 325 VDC in Power Down Mode Wide Range High-Voltage DC Input Output D LinkZero-AX FB BP/M S CBP Power Down Pulse ≥2.5 ms Reset/Wake Up Pulse CBP <1.5 V PI-5909-100410 Figure 1. Typical Application Schematic. Output Power Table 230 VAC ±15% 85-265 VAC Open Frame2 Open Frame2 LNK584GG 3W 3W LNK584DG 3W 3W Product3 Table 1. Output Power Table. Notes: 1. IEC 62301 Clause 4.5 rounds standby power use below 5 mW to zero. 2. Maximum practical continuous power in an open frame design with adequate heatsinking, measured at 50 °C ambient. 3. Packages: D: SO-8C, G: SMD-8C. LinkZero-AX is designed to be used in isolated or non-isolated converters. In either, the tightly specified FEEDBACK (FB) pin voltage reference enables universal input primary side regulated power supplies that cost effectively replace unregulated linear transformer and other switched mode supplies. The start-up and operating power are derived directly from the DRAIN pin. The internal oscillator frequency is jittered to significantly reduce both quasi-peak and average EMI, minimizing filter cost. www.powerint.com October 2010 LNK584 BYPASS/ MULTI FUNCTION (BP/M) PU OPEN LOOP PULL UP OVERVOLTAGE PROTECTION + + GENERATOR FEEDBACK REF 1.70 V 3V 6.45 V 5.85 V 4.85 V + AUTO-RESTART COUNTER FEEDBACK (FB) RESET + DRAIN (D) REGULATOR 5.85 V + BYPASS PIN UNDERVOLTAGE - FAULT CURRENT LIMIT + JITTER - VI 0.9 V LIMIT CLOCK CC CUT BACK 1.70 V - 0.9 V ADJ DCMAX S Q R Q OSCILLATOR SYSTEM POWER DOWN POWER DOWN COUNTER 160 fOSC CYCLES RESET LEADING EDGE BLANKING PU PI-5912-090810 Figure 2. SOURCE (S) Functional Block Diagram. Pin Functional Description DRAIN (D) Pin: The power MOSFET drain connection provides internal operating current for both startup, steady-state and PD mode operation. BYPASS/MULTI-FUNCTIONAL (BP/M) Pin: An external bypass capacitor, 0.1 mF or greater for the internally generated 5.85 V supply is connected to this pin. The minimum value of capacitor is 0.1 mF for internal circuit operation. Higher values may be required to enter power down mode (see Application Considerations). An overvoltage protection disables MOSFET switching if the voltage on this pin rises above 6.45 V. FEEDBACK (FB) Pin: During normal operation, switching of the power MOSFET is controlled by this pin. MOSFET switching is disabled when a voltage greater than an internal VFB reference voltage is applied to this pin. The VFB reference voltage is internally set to 1.70 V. LinkZero-AX goes into auto-restart mode when the FEEDBACK pin voltage has come down to 0.9 V. G Package (SMD-8C) BP/M 1 FB 2 8 S 7 S 6 D 5 4 3a D Package (SO-8C) BP/M FB 1 8 2 7 6 S S D 4 5 S S S S 3b PI-5910-090810 Figure 3. Pin Configuration. SOURCE (S) Pin: This pin is the power MOSFET source connection. It is also the ground reference for the BYPASS and FEEDBACK pins. 2 Rev. A 10/10 www.powerint.com LNK584 LinkZero-AX Functional Description LinkZero-AX comprises a 700 V power MOSFET switch with a power supply controller on the same die. Unlike conventional PWM (pulse width modulation) controllers, it uses a simple ON/OFF control to regulate the output voltage. The controller consists of an oscillator, feedback (sense and logic) circuit, 5.85 V regulator, BYPASS pin undervoltage circuit, over-temperature protection, frequency jittering, current limit circuit, and leading edge blanking. The controller includes a proprietary power down mode that automatically reduces standby consumption to levels that are immeasurable on most power meters. Power Down Mode The internal controller will go into Power Down mode when 160 switching cycles are skipped. This can occur due to the FEEDBACK pin being pulled high using an external power down pulse signal or due to a light load condition where the total loading on the transformer (output plus feedback circuit loads) has reduced to ~0.6% of full load. The device then operates in an ultra low consumption power down mode where switching is disabled completely. The controller wakes up (or is reset) when the BYPASS pin is pulled below 1.5 V and then released to be recharged through the internal drain connected 5.85 V regulator block (see Figure 2). When the BYPASS capacitor recharges to the VBP BYPASS pin threshold, the device starts switching and operates normally. If the FEEDBACK pin is pulled high such that 160 cycles are again skipped, the device returns to power down mode operation as described above. Oscillator The typical oscillator frequency is internally set to an average of 100 kHz. An internal circuit senses the duty cycle of the MOSFET switch conduction time and adjusts the oscillator frequency so that during long conduction intervals (low line voltage) the frequency is about 100 kHz and at short conduction intervals (high line voltage) the oscillator frequency is about 78 kHz. This internal frequency adjustment is used to make the peak power point constant over line voltage. Two signals are generated from the oscillator: the maximum duty cycle signal (DCMAX) and the clock signal that indicates the beginning of a switching cycle. The oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 6% of the switching frequency, to minimize EMI. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak measurements. The frequency jitter, which is proportional to the oscillator frequency, should be measured with the oscilloscope triggered at the falling edge of the DRAIN voltage waveform. The oscillator frequency is gradually reduced when the FEEDBACK pin voltage is lowered below 1.70 V. Feedback Input Circuit CV Mode The feedback input circuit reference is set at 1.70 V. When the FEEDBACK pin voltage reaches a VFB reference voltage (1.70 V), a low logic level (disable) is generated at the output of the feedback circuit. This output is sampled at the beginning of each cycle. If high, the power MOSFET is turned on for that cycle (enabled), otherwise the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the FEEDBACK pin voltage during the remainder of the cycle are ignored. Output Power Limiting When the FEEDBACK pin voltage at full load falls below 1.70 V, the oscillator frequency linearly reduces to typically 60% at the auto-restart threshold voltage of 0.9 V. This function limits the power supply output current and power. 5.85 V Regulator The 5.85 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.85 V by drawing a current from the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node. When the MOSFET is on, the device runs off of the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows LinkZero-AX to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 0.1 µF is sufficient for both high frequency decoupling and energy storage. 6.45 V Clamp and Shunt Regulator In addition, there is a 6.45 V shunt regulator clamping the BYPASS pin at 6.45 V when current is provided to the BYPASS pin externally. This facilitates powering the device externally through a resistor from the bias winding or power supply output in non-isolated designs, to decrease device dissipation and increase power supply efficiency. The 6.45 V shunt regulator is only active in normal operation, and when in power down mode a second clamp at a higher voltage (typical 8.5 V) will clamp the BYPASS pin. BYPASS Pin Undervoltage Protection The BYPASS pin undervoltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 4.85 V. Once the BYPASS pin voltage drops below 4.85 V, it must rise back to 5.85 V to enable (turn on) the power MOSFET. BYPASS Pin Overvoltage Protection If the BYPASS pin gets pulled above 6.45 V and the current into the shunt exceeds 6.5 mA a latch will be set and the power MOSFET will stop switching. To reset the latch the BYPASS pin has to be pulled down to below 1.5 V. Over-Temperature Protection The thermal shutdown circuit senses the die temperature. The threshold is set at 142 °C typical with a 70 °C hysteresis. When the die temperature rises above this threshold (142 °C) the power MOSFET is disabled and remains disabled until the die temperature falls by 70 °C, at which point the MOSFET is re-enabled. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (ILIMIT ), the power MOSFET is turned off for the remainder of that cycle. The leading edge blanking circuit inhibits the current limit comparator for a short time (tLEB) after the power MOSFET is turned on. This leading edge blanking time has been set so 3 www.powerint.com Rev. A 10/10 LNK584 that current spikes caused by capacitance and rectifier reverse recovery time will not cause premature termination of the MOSFET conduction. Auto Restart In the event of a fault condition such as output short-circuit, LinkZero-AX enters into auto-restart operation. An internal counter clocked by the oscillator gets reset every time the FEEDBACK pin voltage exceeds the FEEDBACK pin auto-restart threshold voltage (VFB(AR) typical 0.9 V). If the FEEDBACK pin voltage drops below VFB(AR) for more than 145 ms to 170 ms depending on the line voltage, the power MOSFET switching is disabled. The auto-restart alternately enables and disables the switching of the power MOSFET at a duty cycle of typically 12% until the fault condition is removed. Open Loop Condition on the FEEDBACK Pin When an open loop condition on the FEEDBACK pin is detected, an internal current source pulls up the FEEDBACK pin to above the VFB (1.70 V), the part stops switching and after 160 clock cycles goes into latched power down mode. Applications Example The circuit shown in Figure 4 is a typical non-isolated 5 V, 300 mA output auxiliary power supply using LinkZero-AX. Isolated configurations are also fully compatible with the LinkZero-AX where the FEEDBACK pin receives a signal from a primary feedback/bias winding or through an optocoupler. The circuit of Figure 4 is typical of auxiliary supplies in white goods where isolation is often not required. AC input differential filtering is accomplished by the π filter formed by C1, C2 and L3. The proprietary frequency jitter feature of the LinkZero-AX eliminates the need for any Y capacitor or common-mode inductor. Wirewound resistor RF1 is a fusible, flame proof resistor which is used as a fuse as well as to limit inrush current. Wire wound types are recommended for designs that operate >132 VAC to withstand the instantaneous power dissipated when AC is first applied. The output voltage is directly sensed through feedback resistors R3 and R9, and regulated by LinkZero-AX (U1) via the FEEDBACK pin. Capacitor C7 provides high frequency filtering on the FEEDBACK pin to filter noise and to avoid switching cycle pulse bunching. The controller in U1 receives feedback from the output through feedback resistors R9 and R3. Based on that feedback, it enables or disables the switching of its integrated MOSFET to maintain output regulation. Switching cycles are skipped once the FEEDBACK pin threshold voltage (1.70 V) is exceeded. When the voltage on the FEEDBACK pin falls below the disable threshold (1.70 V), switching cycles are re-enabled. By adjusting the ratio of enabled to disabled switching cycles the output voltage is regulated. At increased loads, beyond the output peak power point, where all switching cycles are enabled, the FEEDBACK pin voltage begins to reduce as the power supply output voltage falls. Under this condition the switching frequency is also reduced to limit the maximum output overload power. When the FEEDBACK pin voltage drops below the auto-restart threshold (typically 0.9 V on the FEEDBACK pin), the power supply enters the auto-restart mode. In this mode, the power supply will turn off for approximately 1.2 s and then turn back on for approximately 170 ms. The auto-restart function reduces the average output current during an output short-circuit condition. C4 R8 220 pF 5.1 Ω 100 V L3 1 mH D6 SS15 R2 4.7 kΩ D1 1N4007 L4 1.8 µH T1 3 EE16 8 D2 1N4007 1 10 C6 220 µF 25 V C9 330 nF 50 V C1 3.3 µF 400 V R9 1 kΩ 1% LinkZero-AX U1 LNK584DG C2 3.3 µF 400 V D Q1 MMBT3904 FB BP/M R16 750 Ω S D3 1N4007 5 V, 300 mA RTN RF1 10 Ω 2W 85 - 265 VAC C8 R13 56 µF 510 Ω 16 V R12 20 kΩ D4 1N4007 C5 150 nF 25 V C10 47 µF 25 V C7 1 nF 50 V R3 511 Ω 1% PD Set Q2 MMBT3904 SW1 R10 20 kΩ R4 10 kΩ R14 PD Reset 2 kΩ RTN PI-6121-092010 Figure 4. Schematic of Non-Isolated 1.5 W, 5 V, 300 mA, 0.00 W Standby Consumption Power Supply. 4 Rev. A 10/10 www.powerint.com LNK584 The LinkZero-AX device is self biased through the DRAIN pin. An optional external bias, can be derived either from a third winding or from an output voltage rail in non-isolated designs. By providing an external supply current in excess of IS2 (310 mA for the LNK584) the internal 5.85 V regulator circuit is disabled providing a simple way to reduce device temperature and improve efficiency, especially at high line. A clampless primary circuit is achieved due to the very tight tolerance current limit device, plus the transformer construction techniques used. The peak drain voltage is therefore limited to typically less than 550 V at 265 VAC, providing significant margin to the 700 V minimum drain voltage specification (BVDSS). Output rectification and filtering is achieved with output rectifier D6 and filter capacitor C6. Due to the auto-restart feature, the average short circuit output current is significantly less than 1 A, allowing low current rating and low cost rectifier D6 to be used. Output circuitry is designed to handle a continuous short circuit on the power supply output. In this design a preload resistor R13 is used at the output of the supply to prevent automatic triggering of the power down mode when the load is removed. LinkZero-AX Power Down (PD) Mode Design Considerations LinkZero-AX goes into power down mode when 160 consecutive switching cycles have been skipped. This condition occurs when the output load is low or the FEEDBACK pin is pulled high (for example through Q1 and R16 in Figure 4). The value of the BYPASS pin capacitor must be high enough to sustain enough current through R16 for more than the period of 160 switching cycles to successfully trigger the power down mode. At low line input voltage (90 VAC) the 160 switching cycle period is ~1.6 ms as the internal oscillator frequency is 100 kHz. However as the input line voltage increases, the internal oscillator frequency is gradually reduced to keep the maximum output power relatively constant. At high line (265 VAC) therefore, the internal oscillator frequency can be as low as 78 kHz (see parameter table Note C). Therefore to provide sufficient margin to ensure power down mode is triggered it is recommended that the power down pulse (see Figure 1) is 2.5 ms (200 switching cycles at 80 kHz). LinkZero-AX stops switching once the power down mode is triggered. The IC does not resume switching until the BYPASS pin is pulled below 1.5 V using the reset/wake up pulse (see Figure 1) and then allowed to recharge back up to 5.85 V through the drain connected 5.85 V regulator block. Transistor Q2 or mechanical switch SW1 can be used for resetting the power down mode either electronically or mechanically. It is important to design the power supply to ensure that load transients and other external events do not unintentionally trigger power down mode by causing 160 consecutive switching cycles to be skipped. It is recommended that a preload resistor is added to draw ~2% of the full load current (12 mA at 5 V in a 3 W power supply). Although this reduces full load efficiency slightly, it has no influence on the power consumption during power down mode since the power supply output is fully discharged under this condition. Low value feedback resistors may also be used as a preload too. Recommended value of the feedback resistors is such that they should draw ~1% of full load current. Finally a capacitor in parallel to the high side feedback resistor can be used to increase the speed of the loop (C9 in Figure 4). These recommendations apply for full load to zero load transients. For applications with more limited load range, the preload and the capacitor in parallel to the high side feedback resistor may not be necessary. Layout Considerations LinkZero-AX Layout Considerations Layout See Figure 5 for a recommended circuit board layout for LinkZero-AX (U1). Single Point Grounding Use a single point ground (Kelvin) connection from the input filter capacitor to the area of copper connected to the SOURCE pins. Bypass Capacitor (CBP), FEEDBACK Pin Noise Filter Capacitor (CFB) and Feedback Resistors To minimize loop area, these two capacitors should be physically located as near as possible to the BYPASS and SOURCE pins, and FEEDBACK pin and source pins respectively. Also note that to minimize noise pickup, feedback resistors RFB1 and RFB2 are placed close to the FEEDBACK pin. Primary Loop Area The area of the primary loop that connects the input filter capacitor, transformer primary and LinkZero-AX should be kept as small as possible. Primary Clamp Circuit An external clamp may be used to limit peak voltage on the DRAIN pin at turn off. This can be achieved by using an RCD clamp or a Zener (~200 V) and diode clamp across the primary winding. In all cases, to minimize EMI, care should be taken to minimize the circuit path from the clamp components to the transformer and LinkZero-AX (U1). Thermal Considerations The copper area underneath the LinkZero-AX (U1) acts not only as a single point ground, but also as a heatsink. As it is connected to the quiet source node, this area should be maximized for good heat sinking of U1. The same applies to the cathode of the output diode. Y Capacitor The placement of the Y-type capacitor (if used) should be directly from the primary input filter capacitor positive terminal to the common/return terminal of the transformer secondary. Such a placement will route high magnitude common-mode surge currents away from U1. Note: If an input π EMI filter is used, the inductor in the π filter should be placed between the negative terminals on the input filter capacitors. 5 www.powerint.com Rev. A 10/10 LNK584 DB CB RS CS DBP RBP DO RFB2 CFB CO CBP RFB1 R6 Transformer U1 J3 – HV DC IN T1 + – + LV DC OUT PI-6098-092410 Figure 5. PCB Layout of a 2.1 W, 6 V, 350 mA Charger. Output Diode (DO) For best performance, the area of the loop connecting the secondary winding, the output diode (DO) and the output filter capacitor (CO)should be minimized. In addition, sufficient copper area should be provided at the anode and cathode terminals of the diode for heat sinking. A larger area is preferred at the electrically “quiet” cathode terminal. A large anode area can increase high frequency conducted and radiated EMI. Resistor RS and CS represent the secondary side RC snubber. Quick Design Checklist As with any power supply design, all LinkZero-AX designs should be verified on the bench to make sure that component specifications are not exceeded under worst-case conditions. The following minimum set of tests is strongly recommended: 1. Maximum drain voltage – Verify that VDS does not exceed 660 V at the highest input voltage and peak (overload) output power. This margin to the 700 V BVDSS specification gives margin for design variation, especially in clampless designs. 2. Maximum drain current – At maximum ambient temperature, maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading-edge current spikes at startup. Repeat under steady state conditions and verify that the leading-edge current spike event is below ILIMIT(MIN) at the end of the tLEB(MIN). Under all conditions, the maximum drain current should be below the specified absolute maximum ratings. 3. Thermal check – At specified maximum output power, minimum input voltage and maximum ambient temperature, verify that the temperature specifications are not exceeded for LinkZero-AX, transformer, output diode and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the RDS(ON) of LinkZero-AX as specified in the data sheet. Under low line and maximum power, maximum LinkZero-AX source pin temperature of 100 °C is recommended to allow for these variations. 6 Rev. A 10/10 www.powerint.com LNK584 Absolute Maximum Ratings(1,6) DRAIN Voltage ............................................ ..............-0.3 V to 700 V Peak DRAIN Current (LNK584).............................200 (375) mA(2) Peak Negative Pulsed Drain Current ............................. -100 mA(3) Feedback Voltage ......................................................... -0.3 V to 9 V Feedback Current ................................................................ 100 mA BYPASS Pin Voltage ................................................... -0.3 V to 9 V BYPASS Pin Voltage in Power Down Mode......... -0.3 V to 11 V(7) Storage Temperature ............................................ -65 °C to 150 °C Operating Junction Temperature...................... -40 °C to 150 °C(4) Lead Temperature(4) .............................................................. 260 °C(5) Notes: 1. All voltages referenced to SOURCE, TA = 25 °C. 2. Higher peak DRAIN current allowed while DRAIN source voltage does not exceed 400V. 3. Duration not to exceed 2 ms. 4. Normally limited by internal circuitry. 5. 1/16 in. from case for 5 seconds. 6. Maximum ratings specified may be applied, one at a time without causing permanent damage to the product. Exposure to Absolute Maximum ratings for extended periods of time may affect product reliability. 7. Maximum current into pin is 300 mA. Thermal Resistance Thermal Resistance: D Package: (qJA) ..................................100 °C/W(2); 80 °C/W(3) (qJC)(1) .........................................................30 °C/W G Package: (qJA) ....................................70 °C/W(2); 60 °C/W(3) (qJC)(1) ......................................................... 11 °C/W Parameter Notes: 1. Measured on the SOURCE pin close to plastic interface. 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. copper clad. 3. Soldered to 1 sq. in. (645 mm2), 2 oz. copper clad. Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C (Unless Otherwise Specified) Min Typ Max Units fOSC TJ = 25 °C VFB = 1.70 V, See Note C 93 100 107 kHz Control Functions Output Frequency Frequency Jitter Peak-Peak Jitter Compared to Average Frequency, TJ = 25 °C ±3 % TJ = 25 °C VFB = VFB(AR) See Note B 60 % % Ratio of Output Frequency at Auto-Restart to fOSC fOSC(AR) Maximum Duty Cycle DCMAX 60 63 FEEDBACK Pin Voltage at No Skipped Cycles VFB 1.63 1.70 1.77 V FEEDBACK Pin Voltage at AutoRestart VFB(AR) 0.8 0.9 1.05 V Minimum Switch ON-Time tON(MIN) 700 ns 7 www.powerint.com Rev. A 10/10 LNK584 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C (Unless Otherwise Specified) Min Typ Max IS1 FeedBack Voltage > VFB (MOSFET not Switching) 150 195 260 IS2 0.9 V ≤ VFB ≤ 1.70 V (MOSFET Switching) 210 260 310 Units Control Functions (cont.) DRAIN Supply Current mA BYPASS Pin Charge Current ICH1 VBP = 0 V, TJ = 25 °C -5.5 -3.8 -1.8 ICH2 VBP = 4 V, TJ = 25 °C -3.8 -2.5 -1.0 BYPASS Pin Voltage VBP 5.60 5.85 6.10 V VBP(H) 0.8 1.0 1.2 V BYPASS Pin Shunt Voltage BPSHUNT 6.0 6.45 6.9 V BYPASS Pin Supply Current IBPSC See Note E 84 ILIMIT di/dt = 40 mA/ms TJ = 25 °C 126 136 146 mA Power Coefficient I2f di/dt = 40 mA/ms TJ = 25 °C 1665 1850 2091 A2Hz Leading Edge Blanking Time tLEB TJ = 25 °C 220 265 BYPASS Pin Shutdown Threshold Current ISD 6.2 V < VBP < 6.8 V 5.0 6.5 8.0 mA Thermal Shutdown Temperature TSD See Note B 135 142 150 °C Thermal Shutdown Hysteresis TSD(H) See Note B 70 OFF-State Drain Leakage in Power Down Mode IDSS(PD) TJ = 25 °C, VDRAIN = 325 V See Figure 21 6.5 9 mA BYPASS Pin Power Up Reset Threshold (in Power Down Mode or at Power Supply Start-up) VBP(PU) 1.5 3 4 V BYPASS Pin Overvoltage Protection in Power Down Mode VBP(PDP) IBP = 300 mA TJ ≤ 100 °C 7.25 8.5 10.9 V BYPASS Pin Voltage in Power Down Mode VBP(PD) TJ = 25 °C VDRAIN = 325 V BYPASS Pin Voltage Hysteresis mA mA Circuit Protection Current Limit ns °C Power Down (PD) Mode 4 V 8 Rev. A 10/10 www.powerint.com LNK584 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C (Unless Otherwise Specified) Min Typ Max TJ = 25 °C 48 55 TJ = 100 °C 76 88 Units Output ON-State Resistance RDS(ON) OFF-State Leakage IDSS VBP = 6.2 V, VDS = 560 V, VFB > 1.70 V TJ = 125 °C, See Note A Breakdown Voltage BVDSS VBP = 6.2 V, TJ = 25 °C ID = 13 mA 50 tAR Auto-Restart OFF-Time DCAR Output Enable Delay V 50 V VIN = 85 VAC, TJ = 25 °C, See Note D tEN mA 700 DRAIN Supply Voltage Auto-Restart ON-Time W See Figure 8 145 ms 1.0 s 14 ms NOTES: A. When the duty-cycle exceeds DCMAX the LNK584 operates in on-time extension mode. B. This parameter is derived from characterization. C. Output frequency specification applies to low line input voltage in the final application. The controller is designed to reduce output frequency by approximately 20% at high line input voltages to balance low line and high line maximum output power. D. The auto-restart on-time/off-time is increased by 20% from low to high line voltage input (85 VAC to 265 VAC). E. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK pins and not any other external circuitry. 9 www.powerint.com Rev. A 10/10 LNK584 BP/M S FB S S 0-2 V 0.1 µF S1 D 470 Ω 5W S 50 V PI-6067-072110 Figure 6. General Test Circuit. DCMAX (internal signal) tP FB tEN VDRAIN tP = 1 fOSC PI-3707-112503 Figure 8. Output Enable Timing. PI-4021-101305 DRAIN Current (mA) Figure 7. Duty Cycle Measurement. 100 2 ms 0 -100 Time (ms) Figure 9. Peak Negative Pulsed DRAIN Current Waveform. 10 Rev. A 10/10 www.powerint.com LNK584 Typical Performance Characteristics 1.0 0.9 -50 -25 0 25 50 PI-6065-071910 1.2 Output Frequency (Normalized to 25 °C) PI-2213-012301 Breakdown Voltage (Normalized to 25 °C) 1.1 1.0 0.8 0.6 0.4 0.2 0 75 100 125 150 -50 -25 Junction Temperature (°C) Figure 10. Breakdown vs. Temperature. 25 50 75 100 125 Figure 11. Frequency vs. Temperature. 1.0 0.8 PI-4057-071905 Current Limit (Normalized to 25 °C) 1.2 1.1 FEEDBACK Pin Voltage (Normalized to 25 °C) PI-6066-071910 1.4 1.0 0.6 0.4 0.2 0.9 0 0 50 100 -50 -25 150 0 25 50 75 100 125 150 Temperature (°C) Temperature (°C) Figure 12. Current Limit vs. Temperature. Figure 13. FEEDBACK Pin Voltage vs. Temperature. 6 5 4 3 2 1 200 175 DRAIN Current (mA) PI-2240-012301 7 PI-3927-083104 -50 BYPASS Pin Voltage (V) 0 Junction Temperature (°C) 25 °C 150 100 °C 125 100 75 50 25 0 0 0 0.2 0.4 0.6 0.8 Time (ms) Figure 14. BYPASS Pin Start-up Waveform (CBP = 0.22 mF). 1.0 0 2 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) Figure 15. Output Characteristics. 11 www.powerint.com Rev. A 10/10 LNK584 Typical Performance Characteristics (cont.) 100 Frequency (kHz) 100 10 PI-6068-071910 110 PI-3928-083104 Drain Capacitance (pF) 1000 90 80 70 1 60 0 100 200 300 400 500 0 600 10 Drain Voltage (V) 50 60 70 30 20 10 0 -10 -20 PI-6071-072110 40 0 FEEDBACK Pin Current (µA) PI-6070-072110 FEEDBACK Pin Current (µA) 40 Figure 17. Frequency Reduction vs. Duty Cycle (Line Voltage). 50 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -30 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 7.0 FEEDBACK Pin Voltage (V) FEEDBACK Pin Voltage (V) Figure 18. FEEDBACK Pin Input Characteristics. Figure 19. FEEDBACK Pin Input Characteristics During Output Power Limiting (1.70 V to 0.9 V). 9 Drain Current (µA) Auto-Restart PI-6111-081810 10 PI-6139-091010 FEEDBACK Pin Current (µA) 30 Duty Cycle (%) Figure 16. CDSS vs. Drain Voltage. 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 20 8 7 6 5 4 3 2 1 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Frequency Normalized to 1 Figure 20. Frequency Cut Back During Output Power Limiting. -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 21. Typical Drain Current vs. Temperature in Power Down Mode. 12 Rev. A 10/10 www.powerint.com LNK584 SO-8C (D Package) 4 B 0.10 (0.004) C A-B 2X 2 DETAIL A 4.90 (0.193) BSC A 8 4 D 5 2 3.90 (0.154) BSC GAUGE PLANE SEATING PLANE 6.00 (0.236) BSC C 0-8 1.04 (0.041) REF 0.10 (0.004) C D 2X Pin 1 ID 1 0.40 (0.016) 1.27 (0.050) 0.20 (0.008) C 2X 7X 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) M C A-B D 1.27 (0.050) BSC 1.35 (0.053) 1.75 (0.069) 4 0.25 (0.010) BSC 1.25 - 1.65 (0.049 - 0.065) 0.10 (0.004) 0.25 (0.010) DETAIL A 0.10 (0.004) C H 7X SEATING PLANE C Reference Solder Pad Dimensions 2.00 (0.079) 4.90 (0.193) 0.17 (0.007) 0.25 (0.010) Notes: 1. JEDEC reference: MS-012. 2. Package outline exclusive of mold flash and metal burr. 3. Package outline inclusive of plating thickness. 4. Datums A and B to be determined at datum plane H. 5. Controlling dimensions are in millimeters. Inch dimensions are shown in parenthesis. Angles in degrees. D07C 1.27 (0.050) 0.60 (0.024) PI-4526-040110 13 www.powerint.com Rev. A 10/10 LNK584 SMD-8C (G Package) ⊕ D S .004 (.10) .046 .060 .060 .046 -E- .080 .086 Pin 1 .137 (3.48) MINIMUM Solder Pad Dimensions .420 .367 (9.32) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 5) .125 (3.18) .145 (3.68) .032 (.81) .037 (.94) .286 Pin 1 .100 (2.54) (BSC) -D- .186 .372 (9.45) .388 (9.86) ⊕ E S .010 (.25) .240 (6.10) .260 (6.60) Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 3. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. Pin 3 is omitted. 4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. Lead width measured at package body. 6. D and E are referenced datums on the package body. .048 (1.22) .053 (1.35) .004 (.10) .009 (.23) .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) 0°- 8° G08C PI-4015-101507 14 Rev. A 10/10 www.powerint.com LNK584 Part Ordering Information • LinkSwitch Product Family • AX Series Number • Package Identifier D Plastic SO-8C G Plastic SMD-8C • Package Material G GREEN: Halogen Free and RoHS Compliant • Tape & Reel and Other Options Blank LNK 584 D G - TL TL Standard Configurations Tape & Reel, 2.5 k pcs minimum for D package, 1 k pcs minimum for G Package. 15 www.powerint.com Rev. A 10/10 Revision A Notes Date Initial release 10/10 For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. 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Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: [email protected] China (Shanghai) Room 1601/1610, Tower 1 Kerry Everbright City No. 218 Tianmu Road West Shanghai, P.R.C. 200070 Phone: +86-21-6354-6323 Fax: +86-21-6354-6325 e-mail: [email protected] China (Shenzhen) Rm A, B & C 4th Floor, Block C, Electronics Science and Technology Bldg., 2070 Shennan Zhong Rd, Shenzhen, Guangdong, China, 518031 Phone: +86-755-8379-3243 Fax: +86-755-8379-5828 e-mail: [email protected] Germany Rueckertstrasse 3 D-80336, Munich Germany Phone: +49-89-5527-3910 Fax: +49-89-5527-3920 e-mail: [email protected] India #1, 14th Main Road Vasanthanagar Bangalore-560052 India Phone: +91-80-4113-8020 Fax: +91-80-4113-8023 e-mail: [email protected] Italy Via De Amicis 2 20091 Bresso MI Italy Phone: +39-028-928-6000 Fax: +39-028-928-6009 e-mail: [email protected] Japan Kosei Dai-3 Bldg. 2-12-11, Shin-Yokohama, Kohoku-ku Yokohama-shi Kanagwan 222-0033 Japan Phone: +81-45-471-1021 Fax: +81-45-471-3717 e-mail: [email protected] Korea RM 602, 6FL Korea City Air Terminal B/D, 159-6 Samsung-Dong, Kangnam-Gu, Seoul, 135-728, Korea Phone: +82-2-2016-6610 Fax: +82-2-2016-6630 e-mail: [email protected] Taiwan 5F, No. 318, Nei Hu Rd., Sec. 1 Nei Hu Dist. Taipei, Taiwan 114, R.O.C. Phone: +886-2-2659-4570 Fax: +886-2-2659-4550 e-mail: [email protected] Europe HQ 1st Floor, St. James’s House East Street, Farnham Surrey GU9 7TJ United Kingdom Phone: +44 (0) 1252-730-141 Fax: +44 (0) 1252-727-689 e-mail: [email protected] Applications Hotline World Wide +1-408-414-9660 Singapore 51 Newton Road Applications Fax #15-08/10 Goldhill Plaza World Wide +1-408-414-9760 Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: [email protected] Design Example Report Title 1.5 W Non-Isolated Flyback Power Supply with 0.00 W Power Down Mode Using LinkZeroTM-AX LNK584DG Specification 85 VAC – 265 VAC Input; 5 V, 300 mA Output Application LinkZero-AX Reference Design Author Applications Engineering Department Document Number DER-260 Date October 13, 2010 Revision 1.3 Summary and Features Non-isolated design provides tight regulation. Low cost, low component count solution Power Down (PD) Mode set and reset functionality. Less than 5 mW no load consumption at 230 VAC (IEC62301 Clause 4.5 rounds standby power use below 5 mW to zero) Auto-restart functionality provides protection against output short circuit and open loop conditions Hysteretic over temperature shutdown protection Meets EN-550022 and CISPR-22 Class B conducted EMI with more than 10 dB margin. Meets IEC61000-4-5 Class 3 AC line surge specifications Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at <http://www.powerint.com/ip.htm>. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 2 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter Table of Contents 1 2 3 4 Introduction .................................................................................................................5 Power Supply Specification ........................................................................................6 Schematic ...................................................................................................................7 Circuit Description.......................................................................................................8 4.1 Input Rectification and Filtering ...........................................................................8 4.2 LinkZero-AX Primary ...........................................................................................8 4.3 Primary Clamp and Transformer Construction ....................................................8 4.4 Output Rectification .............................................................................................8 4.5 Power Down (PD) Mode – Set and Reset ...........................................................8 4.6 Feedback.............................................................................................................9 5 PCB Layout...............................................................................................................10 6 Bill of Materials .........................................................................................................11 7 Transformer Design Spreadsheet .............................................................................12 8 Transformer Specification .........................................................................................14 8.1 Electrical Diagram..............................................................................................14 8.2 Electrical Specifications .....................................................................................14 8.3 Materials ............................................................................................................14 8.4 Transformer Build Diagram................................................................................15 8.5 Transformer Construction ..................................................................................15 9 Performance Data.....................................................................................................16 9.1 Active Mode Efficiency.......................................................................................16 9.2 No-load Input Power (not in Power Down Mode)...............................................17 9.3 No-load Input Power in Power Down Mode .......................................................18 9.4 Available Standby Output Power .......................................................................19 9.5 Line Regulation..................................................................................................20 9.6 Load Regulation ................................................................................................21 10 Thermal Performance............................................................................................22 11 Waveforms ............................................................................................................23 11.1 Drain Voltage and Current, Normal Operation...................................................23 11.2 Output Voltage Start-up Profile with Input Voltage ............................................24 11.3 Power Down Mode Reset via Q2.......................................................................25 11.4 Power Down Mode Set via Switch Q1 ...............................................................26 11.5 Drain Voltage and Current Start-up Profile ........................................................27 11.6 Load Transient Response..................................................................................28 11.6.1 ~ 0% to 100% Load Step............................................................................28 11.6.2 50% to 100% Load Step.............................................................................29 11.6.3 100% to 0% (No-Load) Load Step..............................................................30 11.6.4 0% to 100% Load Step...............................................................................31 11.7 Output Ripple Measurements ............................................................................32 11.7.1 Ripple Measurement Technique.................................................................32 11.7.2 Measurement Results at 25˚C Ambient Temperature ................................33 11.8 Output Short-Circuit at Room Ambient ..............................................................34 11.8.1 Auto-Restart On/Off Time Test ...................................................................34 11.8.2 Drain Voltage and Current Under Output Short-Circuit...............................35 Page 3 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 12 Line Surge.............................................................................................................36 13 EMI Tests at Full Load ..........................................................................................37 13.1 EMI Results .......................................................................................................37 14 Revision History ....................................................................................................40 Important Note: Although this board is designed to satisfy safety isolation requirements, the engineering prototype has not been agency approved. Therefore, all testing should be performed using an isolation transformer to provide the AC input to the prototype board. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 4 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 1 Introduction This report describes a universal input, 5 V, 300 mA non-isolated flyback power supply which is designed with LNK584DG device from the LinkZero-AX family of ICs. It contains the complete specification of the power supply, a detailed circuit diagram, the entire bill of materials required to build the supply, extensive documentation of the power transformer, along with test data and oscillographs of the most important electrical waveforms. Figure 1 – Prototype Top View. Figure 2 – Prototype Bottom View. Page 5 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 2 Power Supply Specification The table below represents the minimum acceptable performance of the design. Actual performance is listed in the results section. Description Input Voltage Frequency No-load Input Power Output Output Voltage Output Ripple Voltage Output Current Total Output Power Continuous Output Power Efficiency Full load efficiency Symbol Min Typ Max Units Comment VIN fLINE 85 47 265 64 VAC Hz mW 2 Wire – no P.E. 50/60 V mV mA See V-I Curves for limits 50 300 1.5 W 5 VOUT VRIPPLE IOUT POUT 67 230 VAC 20 MHz bandwidth % Environmental Conducted EMI Meets CISPR22B / EN55015B Designed to meet IEC950, UL1950 Class II Safety Surge Ambient Temperature DM 1 CM 2 TAMB 0 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com kV 50 o C 1.2/50 s surge, IEC 1000-4-5, Series Impedance: Differential Mode: 2 Common Mode: 12 Free convection, sea level Page 6 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 3 Schematic Figure 3 – Circuit Schematic. Page 7 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 4 Circuit Description 4.1 Input Rectification and Filtering Diodes D1 to D4 rectify the AC input which is filtered by C1 and C2. Inductor L3, C1 and C2 form a π filter that attenuates differential mode conducted EMI. Resistor R2 provides high frequency damping. Shielding techniques (E-Shield™) were used in the construction of T1 to reduce common mode EMI displacement currents. This filter arrangement, the proprietary E-Shield techniques together with IC’s frequency jitter function provide excellent EMI performance for this solution even without a Y capacitor or a primary-side RCD clamp circuit. 4.2 LinkZero-AX Primary The LNK584DG device (U1) integrates an oscillator, an ON/OFF controller, startup and protection circuitry and a power MOSFET all on one monolithic IC. One side of the power transformer is connected to the positive leg of C2 and the other side is connected to the DRAIN pin of U1. At the start of a switching cycle, the controller turns the MOSFET on, and current ramps up in the primary winding, which stores energy in the core of the transformer. When that current reaches the limit threshold, the controller turns the MOSFET off. Due to the phasing of the transformer windings and the orientation of the output diode, the stored energy then induces a voltage across the secondary winding, which forward biases the output diode, and the stored energy is delivered to the output capacitor. 4.3 Primary Clamp and Transformer Construction A Clampless primary circuit is achieved due to the very tight tolerance current limit trimming techniques used in manufacturing the LNK584DG, together with some special transformer construction techniques that were used. Peak drain voltage is therefore limited to typically less than 550 V at 265 VAC – providing significant margin to the 700 V drain voltage (BVDSS). 4.4 Output Rectification Output rectification is provided by diode D6 and filtering is provided by capacitor C6. Resistor R8 and C4 provide high frequency filtering for improved EMI. 4.5 Power Down (PD) Mode – Set and Reset LinkZero-AX goes into Power Down mode when one of the following two conditions have been met: (i) 160 consecutive cycles have been skipped. (ii) FB voltage exceeds 1.7 V for 160 consecutive switching cycles (approximately 2 ms). The latter condition is the preferred way of setting the supply into “Power Down” (PD) mode. In this circuit the FB pin is pulled high through Q1 and R16. The value of the BP pin capacitor should be high enough to sustain enough current through R16 for more Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 8 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter than 2 ms to successfully trigger the Power Down mode. LinkZero-AX stops switching once the power down mode is triggered (PD set), and the chip cannot wake up (PD reset) until the BP pin capacitor is pulled below 1.5 V and then released to be recharged. Transistor Q2 or the mechanical switch SW1 can be used to reset the Power Down mode. Load transients from full load to very light or no load can cause accidental triggering of the Power Down mode. To avoid this undesired effect, a preload must be used at the output of the power supply. Additionally, a capacitor (C9) in parallel to the high side feedback resistor (R9) can be used to speed up the high frequency loop response. Low value feedback resistors can act as preload too. For applications with limited load range, which guarantee that accidental power down mode will not be triggered, the preload and the capacitor in parallel to the high side feedback resistor are not necessary. 4.6 Feedback The output voltage is sensed through resistor divider R3 and R9 and fed back to U1. Switching cycles are skipped if the FB pin disable threshold voltage (1.7 V) is exceeded. When the sensed voltage at the FB pin falls below the disable threshold, switching cycles are re-enabled. By adjusting the ratio of enabled to disable switching cycles, output regulation is maintained. At increased loads, beyond the output power limiting point, the FB pin voltage begins to reduce as the power supply output voltage falls. As the FB pin voltage falls, the switching frequency reduces to provide some output current limiting. When the FB pin voltage drops below the auto-restart threshold (typically 0.9 V on the FB pin), the power supply enters the auto-restart mode. In this mode, the power supply will turn off for 1.2 s and then turn back on for 170 ms. The auto-restart function reduces the average output current during an output short-circuit condition. Page 9 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 5 PCB Layout Figure 4 – PCB Layout 2.10” (53.3 mm) x 1.81” (46.1 mm) Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 10 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 6 Bill of Materials Item 1 2 3 4 Qty 1 1 1 1 Ref Des C1 C2 C4 C5 5 6 7 8 1 1 1 1 C6 C7 C8 C9 9 10 11 12 12 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C10 D1 D2 D3 D4 D6 L3 L4 Q1 Q2 R1 R2 R3 R4 R8 R9 R10 R11 R12 R13 R14 R16 SW1 T1 TP1 TP2 TP3 TP4 TP5 TP6 TP7 U1 Page 11 of 41 Description 3.3 F, 400 V, Electrolytic, (8 x 11.5) 3.3 F, 400 V, Electrolytic, (8 x 11.5) 220 pF, 100 V, Ceramic, X7R, 0805 150 nF, 25 V, Ceramic, X7R, 0805 220 F, 25 V, Electrolytic, Very Low ESR, 72 m, (8 x 11.5) 1 nF, 50 V, Ceramic, X7R, 0805 56 F, 16 V, Electrolytic, Gen. Purpose, (5 x 11) 330 nF, 50 V, Ceramic, X7R, 1206 47 F, 25 V, Electrolytic, Very Low ESR, 300 m, (5 x 11) 1000 V, 1 A, Rectifier, DO-41 1000 V, 1 A, Rectifier, DO-41 1000 V, 1 A, Rectifier, DO-41 1000 V, 1 A, Rectifier, DO-41 50 V, 1 A, Schottky, DO-214AC 1 mH, 0.15 A, Ferrite Core 1.8 H, 0.48 A, Iron Core NPN, Small Signal BJT, 40 V, 0.2 A, SOT-23 NPN, Small Signal BJT, 40 V, 0.2 A, SOT-23 10 , 2 W, Fusible/Flame Proof Wire Wound 4.7 k, 5%, 1/8 W, Thick Film, 0805 511 , 1%, 1/4 W, Metal Film 10.0 k, 5%, 1/10 W, Thick Film, 0603 5.1 , 5%, 1/8 W, Thick Film, 0805 1.0 k, 1%, 1/4 W, Thick Film, 1206 20 k, 5%, 1/10 W, Thick Film, 0603 100 , 5%, 1/10 W, Thick Film, 0603 20 k, 5%, 1/10 W, Thick Film, 0603 510 , 5%, 1/8 W, Thick Film, 0805 2 k, 5%, 1/4 W, Carbon Film 750 , 5%, 1/8 W, Thick Film, 0805 Pushbutton Switch SPST D6 Series Bobbin, EE16, Horizontal, 10 pins Test Point, WHT, THRU-HOLE MOUNT Test Point, BLK ,THRU-HOLE MOUNT Test Point, RED, THRU-HOLE MOUNT Test Point, BLK, THRU-HOLE MOUNT Test Point, ORG, THRU-HOLE MOUNT Test Point, BLK, THRU-HOLE MOUNT Test Point, YEL, THRU-HOLE MOUNT LinkZero-AX, LNK584DG, SO-8 Manufacturer P/N TAQ2G3R3MK0811MLL3 TAQ2G3R3MK0811MLL3 ECJ-2VB2A221K GRM21BR71E154KA01L Manufacturer Taicon Corporation Taicon Corporation Panasonic Murata EKZE250ELL221MHB5D ECJ-2VB1H102K EKZE160ELL560ME11D 12065C334KAT2A Nippon Chemi-Con Panasonic Nichicon AVX Corp EKZE250ELL470ME11D 1N4007-E3/54 1N4007-E3/54 1N4007-E3/54 1N4007-E3/54 SS15-TP SBCP-47HY102B 1025-26K MMBT3904LT1G MMBT3904LT1G CRF253-4 10R ERJ-6GEYJ472V MFR-25FBF-511R ERJ-3GEYJ103V ERJ-6GEYJ5R1V ERJ-8ENF1001V ERJ-3GEYJ203V ERJ-3GEYJ101V ERJ-3GEYJ203V ERJ-6GEYJ511V CFR-25JB-2K0 ERJ-6GEYJ751V D6C10LFS PM-9820 5012 5011 5010 5011 5013 5011 5014 LNK584DG Nippon Chemi-Con Vishay Vishay Vishay Vishay Micro commercial Tokin API Delevan On Semiconductor On Semiconductor Vitrohm Panasonic Yageo Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Yageo Panasonic ITT Ind Ho Jinn Plastic Elect Keystone Keystone Keystone Keystone Keystone Keystone Keystone Power Integrations Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 7 Transformer Design Spreadsheet ACDC_LinkZeroAX_082510; Rev.1.1; Copyright Power Integrations 2010 INPUT INFO ENTER APPLICATION VARIABLES VACMIN 85 VACMAX 265 fL 50 VO 5.00 IO 0.30 PO OUTPUT Volts Volts Hertz Volts Amps 1.50 Feedback Type Direct Clampless Design Yes n 0.65 Z UNIT Watts Direct 0.65 0.5 tC 2.90 CIN 6.60 Input Rectification Type F mSec onds uFara ds ENTER LinkZero-AX VARIABLES LinkZero-AX Auto ILIMITMIN ILIMITMAX LNK584 0.126 Amps 0.146 Amps fSmin 93000 1664.64 I^2fTYP 1849.6 Hertz A^2H z A^2H z Volts Volts Volts VOR 61.00 61 VDS 10 VD 0.5 KP 1.58 ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type EE16 EE16 EE16 P/N: Core EE16_BOBBIN P/N: Bobbin AE 0.192 cm^2 LE 3.5 cm nH/T^ AL 1140 2 BW 8.6 mm M 0 mm L NS NB VB 2 10 28 15.13 Volts 1.00 k R1 10.00 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Minimum AC Input Voltage Maximum AC Input Voltage AC Mains Frequency Output Voltage (main) measured at the end of output cable (For CV/CC designs enter typical CV tolerance limit) Power Supply Output Current (For CV/CC designs enter typical CC tolerance limit) Output Power (VO x IO + dissipation in output cable) Choose 'Bias' for Bias winding feedback, 'Direct' for direct sensing of output and 'Opto' for Optocoupler feedback from the 'Feedback Type' drop down box at the top of this spreadsheet Choose 'YES' from the 'Clampless Design' drop down box at the top of this spreadsheet for a clampless design. Choose 'NO' to add an external clamp circuit. Clampless design lowers the total cost of the power supply Efficiency Estimate at output terminals. For CV only designs enter 0.7 if no better data available Loss Allocation Factor (Secondary side losses / Total losses) Bridge Rectifier Conduction Time Estimate Input Capacitance Choose H for Half Wave Rectifier and F for Full Wave Rectification from the 'Rectification' drop down box at the top of this spreadsheet F I^2fMIN ACDC_LinkZero-AX_082510_Rev1-1.xls; LinkZero-AX Flyback Transformer Design Spreadsheet LinkZero-AX device. Minimum Current Limit Maximum Current Limit Minimum Device Switching Frequency. May be lowwer than 93 kHz for high line (230 VAC) designs I^2f Minimum value (product of current limit squared and frequency is trimmed for tighter tolerance) I^2f typical value (product of current limit squared and frequency is trimmed for tighter tolerance) Reflected Output Voltage LinkZero-AX on-state Drain to Source Voltage Output Winding Diode Forward Voltage Drop Ripple to Peak Current Ratio (0.9<KRP<1.0 : 1.0<KDP<6.0) User-Selected transformer core PC40EE16-Z EE16_BOBBIN Core Effective Cross Sectional Area Core Effective Path Length Ungapped Core Effective Inductance Bobbin Physical Winding Width Safety Margin Width (Half the Primary to Secondary Creepage Distance) Number of primary layers Number of Secondary Turns Number of Bias winding turns Bias Winding Voltage Calculated standard value (1%) of Upper Resistor in the resistor divider component between bias winding and FB pin Page 12 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter R2 0.51 k RBP 56.00 k CBIAS (or COUT) 100.00 uF CFB 680.00 pF CBP 220.00 nF Recommended Bias 1N4003 Diode DC INPUT VOLTAGE PARAMETERS VMIN 97 Volts VMAX 375 Volts CURRENT WAVEFORM SHAPE PARAMETERS DMAX 0.33 IAVG 0.03 Amps IP 0.13 Amps IR 0.13 Amps IRMS 0.04 Amps TRANSFORMER PRIMARY DESIGN PARAMETERS uHenr LP 2287 ies LP_TOLERANCE 10 % NP 111 nH/T^ ALG 186 2 Gaus BM 1568 s Gaus BAC 784 s ur 1654 LG 0.12 mm BWE 17.2 mm OD 0.16 mm INS 0.04 mm DIA 0.12 mm AWG 37 AWG CM 20 CMA 452 Cmils Cmils/ Amp TRANSFORMER SECONDARY DESIGN PARAMETERS Lumped parameters ISP 1.40 ISRMS 0.59 IRIPPLE 0.51 CMS 118 Amps Amps Amps Cmils AWGS 29 AWG DIAS 0.29 mm ODS 0.86 mm INSS VOLTAGE STRESS PARAMETERS 0.29 mm - Volts 39 Volts VDRAIN PIVS Page 13 of 41 of LinkZero-AX Calculated standard value (1%) of Lower Resistor in the resistor divider component between bias winding and FB pin of LinkZero-AX Optional BP pin resistor (connected between BP pin and bias winidng) to improve efficiency. Calculated standard 5% value is displayed Maximum value of output capacitor. Larger value may result in issues during startup. Lower value of COUT can be used. FB pin resistor (Improve noise sensitivity) BP pin capacitor Place this diode on the return leg of the bias winding for optimal EMI. Minimum DC Input Voltage Maximum DC Input Voltage Maximum Duty Cycle Average Primary Current Minimum Peak Primary Current Primary Ripple Current Primary RMS Current Typical Primary Inductance. +/- 10% Primary inductance tolerance Primary Winding Number of Turns Gapped Core Effective Inductance Maximum Operating Flux Density, BM<2000 is recommended AC Flux Density for Core Loss Curves (0.5 X Peak to Peak) Relative Permeability of Ungapped Core Gap Length (Lg > 0.08 mm) Effective Bobbin Width Maximum Primary Wire Diameter including insulation Estimated Total Insulation Thickness (= 2 * film thickness) Bare conductor diameter Primary Wire Gauge (Rounded to next smaller standard AWG value) Bare conductor effective area in circular mils Primary Winding Current Capacity (150 < CMA < 500) Peak Secondary Current Secondary RMS Current Output Capacitor RMS Ripple Current Secondary Bare Conductor minimum circular mils Secondary Wire Gauge (Rounded up to next larger standard AWG value) Secondary Minimum Bare Conductor Diameter Secondary Maximum Outside Diameter for Triple Insulated Wire Maximum Secondary Insulation Wall Thickness Peak Drain Voltage is highly dependent on Transformer capacitance and leakage inductance. Please verify this on the bench and ensure that it is below 650 V to allow 50 V margin for transformer variation. Output Rectifier Maximum Peak Inverse Voltage Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 8 Transformer Specification 8.1 Electrical Diagram 3 WD#2 Primary WD#1 Cancellation 111T #34 1 3 18T #34x2 2 8 WD#3 10T TIW #31 x 2 10 Secondary Figure 5 – Transformer Electrical Diagram. 8.2 Electrical Specifications Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance 8.3 1 second, 60 Hz, from pins 1-5 to pins 6-10 Pins 3-1, all other windings open, measured at 100 kHz, 0.4 VRMS Pins 3-1, all other windings open Pins 1-3, with pins 10-8 shorted, measured at 100kHz, 0.4 VRMS 3000 VAC 2.287 mH, ±10% 300 kHz (Min.) 50 H (Max.) Materials Item [1] [2] [3] [4] [5] Description Core: PC44 EE16, TDK or equivalent Gapped for ALG of 186 nH/T2 Bobbin: Horizontal 10 pin Magnet Wire: #34 AWG Triple Insulated Wire: #31 AWG Tape: 3M 1298 Polyester Film, 2.0 mils thick, 9.8 mm wide Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 14 of 41 13-Oct-10 8.4 DER-260 5 V 300 mA Non-Isolated Flyback Converter Transformer Build Diagram 8 10 3 Primary Winding 1 1 layer of tape 2 Shield Winding 3 Figure 6 – Transformer Build Diagram. 8.5 Transformer Construction Bobbin Preparation WD #1 Feedback Insulation WD #2 Primary Orient the bobbin such that the primary side pins of the bobbin are to the left hand side. Start on pin 3, wind 18 bifilar turns of item [3] from left to right. Wind with tight tension across entire bobbin evenly. Finish on pin 2. 1 Layers of tape [5] for insulation Start on pin 1, wind 37 turns of item [3] from left to right. After finishing the first layer, placing one layer of tape [5]. Continue to wind the second layer the wire from right to left with another 37 turns. After finishing the second layer, placing one layer of tape [5]. Continue to wind the wire from left to right with another 37 turns. Finish on pin 3. Insulation 1 layer of tape [5] for insulation. WD #3 Secondary Insulation Grind core Finish Start at pin 8, wind 10 bifilar turns of item [4] from left to right. Wind uniformly. After finishing the 10th turn, bring the wire back and finish it on pin 10. 3 layers of tape [5] for insulation. Grind the core to get 2.265 mH. Secure the core with tape. Vanish. Secure the core with tape. Vanish. Page 15 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 9 Performance Data All measurements performed at room temperature and 50 Hz input frequency, except where otherwise stated. For all tests, the full load is 300 mA. 9.1 Active Mode Efficiency 80 115 V 230 V Efficiency (%) 70 60 50 40 30 20 0 10 20 30 40 50 60 70 80 90 100 Load (%) Figure 7- Efficiency vs. Input Voltage, Room Temperature, 50 Hz. Percent of Full Load 25 50 75 100 Average Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Efficiency (%) 115 VAC 230 VAC 60.7 67.1 69.5 70.0 66.8 55.0 63.3 66.3 67.7 63.1 Page 16 of 41 13-Oct-10 9.2 DER-260 5 V 300 mA Non-Isolated Flyback Converter No-load Input Power (Not in Power Down Mode) 0.2 No-load Input Power (W) 0.19 0.18 0.17 0.16 0.15 0.14 0.13 0.12 0.11 0.1 80 95 110 125 140 155 170 185 200 215 230 245 260 Input Voltage (VAC) Figure 8 – No-load Input Power vs. Input Line Voltage, 25ºC, 50 Hz. Page 17 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 9.3 No-load Input Power in Power Down Mode The chart below shows the no load input power when in power down mode. In this mode, the input power is typically less than 5 mW at 230 VAC. The input power must be tested after 30 minutes to allow for the leakage currents of the bulk capacitors to stabilize. Power readings taken before this period will be higher. Also all measurements must be made without any multi meter or probes attached to the board as these tend to load the input. No-load Input Power (mW) 10.5 8.5 6.5 4.5 2.5 0.5 80 95 110 125 140 155 170 185 200 215 230 245 260 Input Voltage (VAC) Figure 9 – No-load Input Power in PD mode vs. Input Line Voltage, 25 ºC, 50 Hz. 30 Minute Dwell Time at 230 VAC Prior to Taking Measurements. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 18 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 9.4 Available Standby Output Power The chart below shows the available output power vs. line voltage for an input power of 0.5 W and 1.0 W. 0.7 0.6 Output (W) 0.5 0.5 W Input 1.0 W Input 0.4 0.3 0.2 0.1 0 80 100 120 140 160 180 200 220 240 260 Input (VAC) Figure 10 – Available Output Power for 0.5 W and 1 W Input Power. Page 19 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 9.5 13-Oct-10 Line Regulation 5.25 5.20 Output Voltage (V) 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 4.75 80 95 110 125 140 155 170 185 200 215 230 245 260 Input Voltage (VAC) Figure 11 – Full Load Regulation at Room Ambient. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 20 of 41 13-Oct-10 9.6 DER-260 5 V 300 mA Non-Isolated Flyback Converter Load Regulation 5.25 85 V 115 V 230 V 265 V 5.20 Output Voltage (V) 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 4.75 0 10 20 30 40 50 60 70 80 90 100 Load (%) Figure 12 – Load Regulation at Room Ambient. Page 21 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 10 Thermal Performance Temperature measurements of key components were taken using T-type (CopperConstantan) thermocouples. The thermocouples were soldered directly to a Source pin of the LNK584DG device and to the cathode of the output rectifier. The thermocouples were glued to the external core and to winding surfaces of the transformer. The unit was sealed inside a large box to eliminate any air currents. The box was placed inside a thermal chamber. The ambient temperature within the large box was raised to 50 C. The unit was then operated at full load and the temperature measurements were taken after they stabilized for 1 hour at 50 C. Temperature (C) Item 85 VAC 265 VAC Ambient inside the box 51.0 51.0 LN584DG (U1) 64 68 Output diode 71 73 Transformer 60 61 These results show that the IC has an acceptable rise in temperature. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 22 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11 Waveforms 11.1 Drain Voltage and Current, Normal Operation Figure 13 – 85 VAC, Full Load. Upper: VDRAIN, 100 V / div. Lower: IDRAIN, 0.1 A, 10 s / div. Page 23 of 41 Figure 14 – 265 VAC, Full Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.1 A, 10 s / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.2 Output Voltage Start-up Profile with Input Voltage Figure 15 – Start-up Profile, 85VAC, Full load, 1 V / div., 2 ms / div. Figure 16 – Start-up Profile, 115VAC, Full load, 1 V / div., 2 ms / div. Figure 17 – Start-up Profile, 230VAC, Full load, 1 V / div., 2 ms / div. Figure 18 – Start-up Profile, 265VAC, Full load, 1 V / div., 2 ms / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 24 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.3 Power Down Mode Reset via Q2 When U1 is reset from the power down mode, notice how the output starts increasing after the BP pin voltage reaches 5.8 V. Figure 19 – Start-up Profile, 85VAC, Full Load, Upper: VO, 1 V / div., 2 ms / div. Lower: VBP, 5 V / div. Figure 20 – Start-up Profile, 115VAC, Full Load, Upper: VO, 1 V / div., 2 ms / div. Lower: VBP, 5 V/ div. Figure 21 – Start-up Profile, 230VAC, Full Load, Upper: VO, 1 V / div., 2 ms / div. Lower: VBP, 5 V / div. Figure 22 – Start-up Profile, 265VAC, Full Load, Upper: VO, 1 V / div., 2 ms / div. Lower: VBP, 5 V / div. Page 25 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.4 Power Down Mode Set via Switch Q1 Figure 23 – Power Down Latch Off, 85VAC, Full Load, 1 V / div., 50 ms / div. Figure 24 – Power Down Latch Off, 115VAC, Full Load, 1 V / div., 50 ms / div. Figure 25 – Power Down Latch Off, 230VAC, Full Load, 1 V / div., 50 ms / div. Figure 26 – Power Down Latch Off, 265VAC, Full Load, 1 V / div., 50 ms / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 26 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.5 Drain Voltage and Current Start-up Profile Figure 27 – 85 VAC Input and Maximum Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.1 A, 1 ms / div. Page 27 of 41 Figure 28 – 265 VAC Input and Maximum Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.1 A, 1 ms / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.6 Load Transient Response 11.6.1 ~ 0% to 100% Load Step Figure 29 – Transient Response, 85VAC, 4 mA – 300 mA – 4 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 30 – Transient Response, 115VAC 4 mA – 300 mA – 4 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 31 – Transient Response, 230VAC, 4 mA – 300 mA – 4 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 32 – Transient Response, 265VAC, 4 mA – 300 mA – 4 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 28 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.6.2 50% to 100% Load Step Figure 33 – Transient Response, 85VAC, 150 mA – 300 mA – 150 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 34 – Transient Response, 115VAC, 150 mA – 300 mA – 150 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 35 – Transient Response, 230VAC, 150 mA – 300 mA – 150 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Figure 36 – Transient Response, 265VAC, 150 mA – 300 mA – 150 mA, Upper: VO, 20 mV / div., 100 ms / div. Lower: IO, 0.2 A / div. Page 29 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.6.3 100% to 0% (No-Load) Load Step This following transient load tests verify that under extreme conditions of transient loads, power down mode is not triggered. Figure 37 – Transient Response, 85VAC, 300 mA – 0 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A /div. Figure 38 – Transient Response, 115VAC, 300 mA – 0 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Figure 39 – Transient Response, 230VAC, 300 mA – 0 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Figure 40 – Transient Response, 265VAC, 300 mA – 0 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 30 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.6.4 0% to 100% Load Step Figure 41 – Transient Response, 85VAC, 0 mA – 300 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Figure 42 – Transient Response, 115VAC, 0 mA – 300 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Figure 43 – Transient Response, 230VAC, 0 mA – 300 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Figure 44 – Transient Response, 265VAC, 0 mA – 300 mA Upper: VO, 20 mV / div., 50 ms / div. Lower: IO, 0.2 A / div. Page 31 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.7 Output Ripple Measurements 11.7.1 Ripple Measurement Technique For DC output ripple measurements, a modified oscilloscope test probe must be utilized in order to reduce spurious signals due to pickup. Details of the probe modification are provided in the figures below. The 5125BA probe adapter is affixed with two capacitors tied in parallel across the probe tip. The capacitors include one (1) 0.1 F/50 V ceramic type and one (1) 1.0 F/50 V aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper polarity across DC outputs must be maintained (see below). Probe Ground Probe Tip Figure 45 – Oscilloscope Probe Prepared for Ripple Measurement. (End Cap and Ground Lead Removed) Figure 46 – Oscilloscope Probe with Probe Master 5125BA BNC Adapter. (Modified with wires for probe ground for ripple measurement, and two parallel decoupling capacitors added) Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 32 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.7.2 Measurement Results at 25˚C Ambient Temperature Figure 47 – Output Ripple, 85 VAC, Full Load, Upper: Ripple, 2 ms, 20 mV / div. Lower: Ripple, 50 s, 20 mV / div. Figure 48 – Output Ripple, 115 VAC, Full Load, Upper: Ripple, 2 ms, 20 mV / div. Lower: Ripple, 50 s, 20 mV / div. Figure 49 – Output Ripple, 230 VAC, Full Load, Upper: Ripple, 2 ms, 20 mV / div. Lower: Ripple, 50 s, 20 mV / div. Figure 50 – Output Ripple, 265 VAC, Full Load, Upper: Ripple, 2 ms, 20 mV / div. Lower: Ripple, 50 s, 20 mV / div. Page 33 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 11.8 Output Short-Circuit at Room Ambient In the event of a short circuit on the output, the LNK584DG enters auto-restart mode. In this protection model, switching is disabled. The auto-restart alternately enables and disables the switching of the power MOSFET at a duty cycle of typically 12% until the fault condition is removed. 11.8.1 Auto-Restart On/Off Time Test Figure 51 – 85 VAC Input, Short-Circuit. Upper: VDRAIN, 100 V / div. Lower: IDRAIN, 0.2 A, 500 ms / div. Auto-restart On Time, 313 ms. Auto-restart Off Time, 1.9 s. Figure 52 – 265 VAC Input and Maximum Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.2 A, 20 s / div. Auto-restart On Time, 395 ms. Auto-restart Off Time, 2.4 s Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 34 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 11.8.2 Drain Voltage and Current Under Output Short-Circuit The waveforms show that there is no saturation of the transformer under output short circuit and the voltage stress is also below the 700 V BVDSS rating of the LNK584DG. Figure 53 – 85 VAC Input and Maximum Load. Upper: VDRAIN, 100 V / div. Lower: IDRAIN, 0.05 A, 5 ms / div. Figure 54 – 85 VAC Input and Maximum Load. Upper: VDRAIN, 100 V / div. Lower: IDRAIN, 0.05 A, 20 s / div. Figure 55 – 265 VAC Input and Maximum Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.05 A, 5 ms / div. Figure 56 – 265 VAC Input and Maximum Load. Upper: VDRAIN, 200 V / div. Lower: IDRAIN, 0.05 A, 1 s / div. Page 35 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 12 Line Surge Input line 1.2/50 μs common-mode and differential mode surge testing was completed on a single test unit to IEC61000-4-5. Input voltage was set at 230 VAC / 60 Hz. Output was loaded at full load and operation was verified following each surge event. Test conditions and results are shown below. Surge Level (V) +1000 -1000 +2000 -2000 Input Voltage (VAC) 230 230 230 230 Injection Location L to N L to N L/N to GND L/N to GND Line Impedance () 2 2 12 12 Injection Phase (°) 90 270 90 270 Number of Surges Test Result (Pass/Fail) 10 10 10 10 Pass Pass Pass Pass Units passed under all test conditions. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 36 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter 13 EMI Tests at Full Load Conducted emissions tests were performed at 115 VAC and 230 VAC at full load. Composite EN55022B / CISPR22B conducted limits are shown. All the tests show excellent EMI performance. 13.1 EMI Results Figure 57 – Conducted EMI at 115 VAC 60 Hz, 0.3 A Load, Secondary Ground Connected to Artificial Hand. Page 37 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 Figure 58 – Conducted EMI at 230 VAC 60 Hz, 0.3 A Load, Secondary Ground Connected to Artificial Hand. Figure 59 – Conducted EMI at 115 VAC 60 Hz, 0.3 A Load, Secondary Ground Floating. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Page 38 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter Figure 60 – Conducted EMI at 230 VAC 60 Hz, 0.3 A Load, Secondary Ground Floating Page 39 of 41 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-260 5 V 300 mA Non-Isolated Flyback Converter 13-Oct-10 14 Revision History Date 13-Oct-10 Author PL Revision 1.3 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com Description & changes Initial Release Reviewed Apps & Mktg Page 40 of 41 13-Oct-10 DER-260 5 V 300 mA Non-Isolated Flyback Converter For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. 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