AD AD8641

Low Power, Rail-to-Rail Output
Precision JFET Amplifier
AD8641
FEATURES
OUT 1
Line-/battery-powered instruments
Photodiode amplifiers
Precision current sensing
Medical instrumentation
Industrial controls
Precision filters
Portable audio
ATE
VCC
4
–IN
TOP VIEW
(Not to Scale)
+IN 3
05072-101
VEE 2
Figure 1. 5-Lead SC70 (KS-5)
NC 1
APPLICATIONS
5
AD8641
–IN 2
AD8641
+IN 3
TOP VIEW
(Not to Scale)
VEE 4
8
NC
7
VCC
6
OUT
5
NC
NC = NO CONNECT
05072-102
Low supply current: 250 µA max
Very low input bias current: 1 pA max
Low offset voltage: 750 µV max
Single-supply operation: 5 V to 26 V
Dual-supply operation: ±2.5 V to ±13 V
Rail-to-rail output
Unity gain stable
No phase reversal
SC70 package
Figure 2. 8-Lead SOIC (R-8)
GENERAL DESCRIPTION
The AD8641 is a low power, precision JFET input amplifier
featuring extremely low input bias current and rail-to-rail
output. The ability to swing nearly rail-to-rail at the input and
rail-to-rail at the output enables designers to buffer CMOS
DACs, ASICs, and other wide output swing devices in singlesupply systems. The outputs remain stable with capacitive loads
of more than 500 pF.
The AD8641 is suitable for applications utilizing multichannel
boards that require low power to manage heat. Other applications include photodiodes, ATE reference level drivers, battery
management, and industrial controls.
The AD8641 is fully specified over the extended industrial
temperature range of –40° to +125°C. The AD8641 is available
in 5-lead SC70 and 8-lead SOIC lead-free packages.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD8641
TABLE OF CONTENTS
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 12
Electrical Characteristics ............................................................. 3
Ordering Guide .......................................................................... 12
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
10/04—Initial Version: Revision 0
Rev. 0 | Page 2 of 12
AD8641
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS =5.0 V, VCM = 2.5 V, TA =25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
Typ
Max
Unit
50
750
1.5
1.6
1
180
0.5
50
3
93
140
2.5
µV
mV
mV
pA
pA
pA
pA
V
dB
V/mV
µV/°C
0.01
±6
V
V
V
V
mA
–40°C < TA < +85°C
+85°C < TA < +125°C, VCM = 1.5 V
Input Bias Current
IB
0.25
–40°C < TA < +125°C
Input Offset Current
IOS
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
CMRR
AVO
∆VOS/∆T
VCM = 0 V to 2.5 V
RL = 10 kΩ, VO = 0.5 to 4.5 V
–40°C < TA < +125°C
VOH
IL = 2 mA, –40°C to +125°C
Output Voltage Low
0
74
80
4.94
4.93
VOL
IL = 2 mA, –40°C to +125°C
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
IOUT
PSRR
ISY
VS = 5 V to 26 V
90
107
195
–40°C < TA < +125°C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
SR
GBP
ØO
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
Rev. 0 | Page 3 of 12
0.05
0.05
250
270
dB
µA
µA
2
3
50
V/µs
MHz
Degrees
4.0
28.5
0.5
µV p-p
nV/√Hz
fA/√Hz
AD8641
@ VS= ±13 V, VCM = 0 V, TA =25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
Typ
Max
Unit
70
750
1.5
1
260
0.5
35
+10
107
290
2.5
µV
mV
pA
pA
pA
pA
V
dB
V/mV
µV/°C
±12
V
V
V
V
mA
–40° < TA < +125°C
Input Bias Current
IB
0.25
–40°C < TA < +125°C
Input Offset Current
IOS
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
CMRR
AVO
∆VOS/∆T
VCM = -13 V to +10 V
RL = 10 kΩ, VO = –11 V to +11 V
–40°C < TA < +125°C
VOH
IL = 2 mA, –40°C to +125°C
Output Voltage Low
–13
90
215
+12.94
+12.93
VOL
+12.94
–12.93
IL = 2 mA, –40°C to +125°C
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
IOUT
PSRR
ISY
VS = ±2.5 V to ±13 V
90
107
200
–40°C < TA < +125°C
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
SR
GBP
ØO
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
Rev. 0 | Page 4 of 12
290
330
dB
µA
µA
3
3.5
60
V/µs
MHz
Degrees
4.2
27.5
0.5
µV p-p
nV/√Hz
fA/√Hz
AD8641
ABSOLUTE MAXIMUM RATINGS
Table 3. Absolute Maximum Ratings1
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
KS-5, R-8 Packages
Operating Temperature Range
Junction Temperature Range
KS-5, R-8 Packages
Lead Temperature Range (Soldering, 60 Sec)
Table 4.
Rating
27.3 V
VS– to VS+
±Supply Voltage
Indefinite
–65°C to +150°C
–40°C to +125°C
–65°C to +150°C
300°C
Package Type
5-Lead SC70 (KS-5)
8-Lead SOIC (R-8)
θJA2
331.4
157
θJC
223.9
56
Units
°C/W
°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1
2
Absolute maximum ratings apply at 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, i.e., θJA is specified for devices
soldered on circuit boards for surface-mounted packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
AD8641
TYPICAL PERFORMANCE CHARACTERISTICS
20
80
VSY = ±13V
VSY = 5V
VCM = 1.5V
18
70
16
NUMBER OF AMPLIFIERS
FREQUENCY
60
50
40
30
20
14
12
10
8
6
9.5
10.0
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
0
TCVOS (µV/°C)
Figure 3. Input Offset Voltage
05072-005
VOS (mV)
1.0
0
05072-002
0
–0.60
–0.55
–0.50
–0.45
–0.40
–0.35
–0.30
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
2
0.5
4
10
Figure 6. Offset Voltage Drift
16
4.5
VSY = ±13V
4.0
14
VSY = ±13V
TA = 25°C
3.0
INPUT BIAS (pA)
NUMBER OF AMPLIFIERS
3.5
12
10
8
6
2.5
2.0
1.5
1.0
4
0.5
2
OFFSET VOLTAGE (µV/°C)
–0.5
05072-003
9.5
10.0
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0
0.5
0
–15 –13 –11
–9
–7
–5
–3
–1
1
3
5
7
9
11
13
15
VCM (V)
Figure 4. Offset Voltage Drift
05072-006
0
Figure 7. Input Bias Current vs. VCM
0.5
70
VSY = ±2.5V
0.4
60
VSY = ±13V
TA = 25°C
0.3
INPUT BIAS (pA)
0.2
40
30
0.1
0
–0.1
–0.2
20
–0.3
10
VOS (mV)
–0.5
–15.0 –12.5 –10.0 –7.5
–5.0
–2.5
0
2.5
5.0
7.5
VCM (V)
Figure 8. Input Bias Current vs. VCM
Figure 5. Input Offset Voltage
Rev. 0 | Page 6 of 12
10.0
12.5
15.0
05072-007
0
05072-004
–0.4
–0.60
–0.55
–0.50
–0.45
–0.40
–0.35
–0.30
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
FREQUENCY
50
AD8641
1000
500
VSY = ±13V
VSY = 5V
400
200
VOS (µV)
INPUT BIAS CURRENT (pA)
300
100
10
100
0
–100
–200
1
–300
–400
25
50
75
100
125
150
TEMPERATURE (°C)
–500
0
0.5
1.0
1.5
2.0
05072-011
0
05072-008
0.1
2.5
VCM (V)
Figure 9. Input Bias Current vs. Temperature
Figure 12. Input Offset Voltage vs. VCM
10M
1.0
VSY = +5V OR ±5V
0.8
OPEN-LOOP GAIN (V/V)
0.6
INPUT BIAS (pA)
0.4
0.2
0
–0.2
–0.4
1M
VSY = ±13V
VSY = ±2.5V
100k
–0.6
–4
–3
–2
–1
0
1
2
3
4
5
VCM (V)
10k
0.1
900
A
B
800
C
700
100
AVO (V/mV)
600
500
400
300
D
E
10
A. VSY = ±13V, VO = ±11V, RL = 10kΩ
B. VSY = ±13V, VO = ±11V, RL = 2kΩ
C. VSY = +5V, VO = +0.5V/+4.5V, RL = 10kΩ
D. VSY = +5V, VO = +0.5V/+4.5V, RL = 2kΩ
E. VSY = +5V, VO = +0.5V/+4.5V, RL = 600Ω
200
100
0
–100
–9
–7
–5
–3
–1 0 1
3
5
7
9
VCM (V)
11
13
15
05072-010
VOS (µV)
100
1000
VSY = ±13V
–15 –13 –11
10
Figure 13. Open-Loop Gain vs. Load Resistance
Figure 10. Input Bias Current vs. VCM
1000
1
LOAD RESISTANCE (kΩ)
Figure 11. Input Offset Voltage vs. VCM
1
–50
–30
–10
10
30
50
70
90
110
130
TEMPERATURE (°C)
Figure 14. Open-Loop Gain vs. Temperature
Rev. 0 | Page 7 of 12
150
05072-013
–5
05072-009
–1.0
05072-012
–0.8
AD8641
10000
600
VSY = ±13V
VSY = ±13V
500
SATURATION VOLTAGE (mV)
OFFSET VOLTAGE (µV)
400
300
200
100
0
100kΩ
–100
–200
–300
10kΩ 1kΩ
VSY – VOH
1000
100
–VSY – VOL
10
–400
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
1
0.001
05072-014
–600
–15
0.01
0.1
1
10
100
LOAD CURRENT (mA)
05072-017
–500
Figure 18. Output Saturation Voltage vs. Load Current
Figure 15. Input Error Voltage vs. Output Voltage for Resistive Loads
10000
250
VSY = ±5V
200
VSY = 5V
POS RAIL
VSY – VOH
RL = 1kΩ
50
RL = 2kΩ
0
RL = 10kΩ
RL = 100kΩ
–50
–100
–150
–200
RL = 100kΩ RL = 1kΩ
RL = 10kΩ
NEG RAIL
RL = 2kΩ
–300
–350
0
50
100
150
200
250
300
350
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
VOL
100
10
1
0.001
05072-015
–250
1000
0.01
0.1
1
10
100
LOAD CURRENT (mA)
05072-018
100
SATURATION VOLTAGE (mV)
INPUT VOLTAGE (µV)
150
Figure 19. Output Saturation Voltage vs. Load Current
Figure 16. Input Error Voltage vs. Output Voltage
Within 300 mV of Supply Rails
70
800
VSY = ±13V
RL = 2kΩ
CL = 40pF
60
700
50
315
270
225
40
GAIN (dB)
ISY (µA)
180
GAIN
500
400
+25°C
300
+125°C
30
135
20
PHASE
90
10
45
0
0
PHASE (Degrees)
600
–55°C
0
4
8
12
16
VSY (V)
20
24
28
05072-016
100
Figure 17. Quiescent Current vs. Supply Voltage at Different Temperatures
Rev. 0 | Page 8 of 12
–10
–45
–20
–90
–30
10k
–135
100k
1M
10M
FREQUENCY (Hz)
Figure 20. Open-Loop Gain and Phase Margin vs. Frequency
05072-019
200
AD8641
50
40
140
270
120
225
100
180
80
30
135
20
90
PHASE
10
45
0
0
–10
60
40
20
0
–45
–20
–20
–90
–40
–30
10k
–135
–60
1k
100k
1M
10M
FREQUENCY (Hz)
05072-020
10k
Figure 21. Open-Loop Gain and Phase Margin vs. Frequency
140
VSY = ±13V
RL = 2kΩ
CL = 40pF
120
80
G = +100
30
CMRR (dB)
GAIN (dB)
VSY = 5V
100
40
20
G = +10
10
0
60
40
20
0
G = +1
–10
–20
–20
–40
10k
100k
1M
10M
FREQUENCY (Hz)
–60
1k
05072-021
–30
1k
10k
140
VSY = 5V
RL = 2kΩ
CL = 40pF
120
10M
+PSRR
80
G = +100
PSRR (dB)
30
20
G = +10
10
0
60
40
–PSRR
20
0
G = +1
–10
–20
–20
–40
10k
100k
1M
10M
FREQUENCY (Hz)
05072-022
GAIN (dB)
10M
VSY = ±13V
100
40
–30
1k
1M
Figure 25. CMRR vs. Frequency
70
50
100k
FREQUENCY (Hz)
Figure 22. Closed-Loop Gain vs. Frequency
60
10M
05072-024
50
1M
Figure 24. CMRR vs. Frequency
70
60
100k
FREQUENCY (Hz)
05072-025
GAIN (dB)
GAIN
VSY = ±13V
05072-023
60
315
CMRR (dB)
VSY = 5V
RL = 2kΩ
CL = 40pF
PHASE (Degrees)
70
Figure 23. Closed-Loop Gain vs. Frequency
–60
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 26. PSRR vs. Frequency
Rev. 0 | Page 9 of 12
AD8641
140
100
1
VIN
INPUT BIAS (pA)
0.4
60
40
–PSRR
20
0.2
0
–0.2
0
–0.4
–20
–0.6
–40
–0.8
2
100k
1M
10M
FREQUENCY (Hz)
VOUT
–1.0
CH1 –4
10.0V –3CH2 –2
10.0V–1
–5
CH1 4 1.00V5
0M400µ1s
2 A 3
T
0.00000s
VCM (V)
05072-009
10k
05072-026
–60
1k
Figure 30. No Phase Reversal
Figure 27. PSRR vs. Frequency
1000
15
VSY = ±13V
VS = ±13V
GAIN = +5
G = +100
10
100
TS + (1%)
10
G = +10
1
G = +1
0.1
5
TS + (0.1%)
0
–5
TS – (0.1%)
–10
10k
100k
1M
10M
100M
FREQUENCY (Hz)
–15
05072-027
0.01
1k
TS – (1%)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
SETTLING TIME (µs)
Figure 28. Output Impedance vs. Frequency
05072-030
OUTPUT SWING (V)
ZOUT (Ω)
VSY = ±13V
0.6
+PSRR
80
PSRR (dB)
T
0.8
05072-029
120
1.0
VSY = 5V
Figure 31. Output Swing and Error vs. Settling Time
70
1000
VS = ±13V
RL = 10kΩ
VIN = 100mV p-p
AV = +1
VSY = 5V
G = +100
60
100
OVERSHOOT (%)
10
G = +10
1
G = +1
40
OS–
30
OS+
20
0.1
0.01
1k
10k
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 29. Output Impedance vs. Frequency
0
1
10
100
1000
CAPACITANCE (pF)
Figure 32. Small Signal Overshoot vs. Load Capacitance
Rev. 0 | Page 10 of 12
05072-031
10
05072-028
ZOUT (Ω)
50
AD8641
1k
70
40
OS–
30
OS+
20
0
1
10
100
1000
CAPACITANCE (pF)
10
1
05072-032
10
100
10
100
Figure 33. Small Signal Overshoot vs. Load Capacitance
10k
Figure 36. Voltage Noise Density
1k
1.0
VS = ±13V
G = +1M
CH1 p-p = 4.26V
VSY = 5V
VOLTAGE NOISE DENSITY (nV/ Hz)
0.8
0.6
0.4
INPUT BIAS (pA)
1k
FREQUENCY (Hz)
0.2
10
–0.2
–0.4
10
05072-033
–0.6
100
–1.0
CH1 –4
1.00V –3
–5
–2
–1
0M1.00s1
2 A CH1
3
1
05072-009
–0.8
4–20.0V5
VCM (V)
10
100
1k
10k
FREQUENCY (Hz)
05072-036
OVERSHOOT (%)
50
VSY = ±13V
05072-035
60
VOLTAGE NOISE DENSITY (nV/ Hz)
VS = ±2.5V
RL = 10kΩ
VIN = 100mV p-p
AV = +1
Figure 37. Voltage Noise Density
Figure 34. 0.1 Hz to 10 Hz Noise
0.004
1.0
VS = ±2.5V
G = +1M
CH1 p-p = 4.06V
0.8
VSY = ±13V
LOAD = 100kΩ
GAIN = +1
0.001
8V p-p INPUT
0.6
THD + NOISE (%)
0.2
10
–0.2
–0.4
1V p-p INPUT
2V p-p INPUT
0.0001
4V p-p INPUT
0.00001
–1.0
CH1 –4
1.00V –3
–5
–2
–1
0M1.00s1
2 A CH1
3
VCM (V)
4–20.0V5
0.000001
05072-009
–0.8
1
100
1k
10k
20k
FREQUENCY (Hz)
Figure 38. Total Harmonic Distortion + Noise vs. Frequency
Figure 35. 0.1 Hz to 10 Hz Noise
Rev. 0 | Page 11 of 12
05072-037
–0.6
05072-034
INPUT BIAS (pA)
0.4
AD8641
OUTLINE DIMENSIONS
2.00 BSC
5
4
1.25 BSC
2.10 BSC
1
2
3
PIN 1
0.65 BSC
1.00
0.90
0.70
1.10 MAX
0.22
0.08
0.30
0.15
0.10 MAX
0.46
0.36
0.26
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203AA
Figure 39. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
5
4.00 (0.1574)
3.80 (0.1497) 1
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
6.20 (0.2440)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
0.50 (0.0196)
× 45°
0.25 (0.0099)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 40. 8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD8641AKSZ-R21
AD8641AKSZ-Reel71
AD8641AKSZ-Reel1
AD8641ARZ1
AD8641ARZ-Reel71
AD8641ARZ-Reel1
1
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package Description
5-Lead SC70
5-Lead SC70
5-Lead SC70
8-lead SOIC
8-lead SOIC
8-lead SOIC
Z = Pb-free part.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05072-0-10/04(0)
Rev. 0 | Page 12 of 12
Package Option
KS-5
KS-5
KS-5
R-8
R-8
R-8
Branding
A07
A07
A07