High Common-Mode Voltage, Programmable Gain Difference Amplifier AD628 FEATURES FUNCTIONAL BLOCK DIAGRAM REXT2 +VS –IN 100kΩ The AD628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. When used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply ADCs. A wideband feedback loop minimizes distortion effects due to capacitor charging of Σ-Δ ADCs. A reference pin (VREF) provides a dc offset for converting bipolar to single-sided signals. The AD628 converts +5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA input signals to a single-ended output within the input range of single-supply ADCs. The AD628 has an input common-mode and differential-mode operating range of ±120 V. The high common-mode input impedance makes the device well suited for high voltage measurements across a shunt resistor. The inverting input of the buffer amplifier is available for making a remote Kelvin connection. 10kΩ –IN A1 –IN A2 10kΩ OUT +IN +IN 100kΩ 10kΩ –VS VREF AD628 02992-C-001 +IN CFILT Figure 1. 130 120 110 100 CMRR (dB) GENERAL DESCRIPTION RG G = +0.1 APPLICATIONS High voltage current shunt sensing Programmable logic controllers Analog input front end signal conditioning +5 V, +10 V, ±5 V, ±10 V, and 4 to 20 mA Isolation Sensor signal conditioning Power supply monitoring Electrohydraulic control Motor control REXT1 VS = ±15V 90 80 70 VS = ±2.5V 60 50 40 30 10 100 1k 10k FREQUENCY (Hz) 100k 02992-C-002 High common-mode input voltage range ±120 V at VS = ±15 V Gain range 0.1 to 100 Operating temperature range: −40°C to ±85°C Supply voltage range Dual supply: ±2.25 V to ±18 V Single supply: 4.5 V to 36 V Excellent ac and dc performance Offset temperature stability RTI: 10 μV/°C maximum Offset: ±1.5 V mV maximum CMRR RTI: 75 dB minimum, dc to 500 Hz, G = +1 Figure 2. CMRR vs. Frequency of the AD628 A precision 10 kΩ resistor connected to an external pin is provided for either a low-pass filter or to attenuate large differential input signals. A single capacitor implements a lowpass filter. The AD628 operates from single and dual supplies and is available in an 8-lead SOIC_N or 8-lead MSOP package. It operates over the standard industrial temperature range of −40°C to +85°C. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. AD628 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 14 Applications....................................................................................... 1 Applications..................................................................................... 15 General Description ......................................................................... 1 Gain Adjustment ........................................................................ 15 Functional Block Diagram .............................................................. 1 Input Voltage Range................................................................... 15 Revision History ............................................................................... 2 Voltage Level Conversion.......................................................... 16 Specifications..................................................................................... 3 Current Loop Receiver .............................................................. 17 Absolute Maximum Ratings............................................................ 7 Monitoring Battery Voltages..................................................... 17 Thermal Characteristics .............................................................. 7 Filter Capacitor Values............................................................... 18 ESD Caution.................................................................................. 7 Kelvin Connection ..................................................................... 18 Pin Configuration and Function Descriptions............................. 8 Outline Dimensions ....................................................................... 19 Typical Performance Characteristics ............................................. 9 Ordering Guide .......................................................................... 19 Test Circuits..................................................................................... 13 REVISION HISTORY 3/06—Rev. E to Rev. F Changes to Table 1............................................................................ 3 Changes to Figure 3.......................................................................... 7 Replaced Voltage Level Conversion Section ............................... 16 Changes to Figure 32 and Figure 33............................................. 17 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 19 5/05—Rev. D to Rev. E Changes to Table 1........................................................................... 3 Changes to Table 2........................................................................... 5 Changes to Figure 33..................................................................... 18 3/05—Rev. C to Rev. D Updated Format................................................................ Universal Changes to Table 1........................................................................... 3 Changes to Table 2........................................................................... 5 4/04—Rev. B to Rev. C Updated Format................................................................ Universal Changes to Specifications ............................................................... 3 Changes to Absolute Maximum Ratings ...................................... 7 Changes to Figure 3......................................................................... 7 Changes to Figure 26..................................................................... 13 Changes to Figure 27..................................................................... 13 Changes to Theory of Operation................................................. 14 Changes to Figure 29..................................................................... 14 Changes to Table 5......................................................................... 15 Changes to Gain Adjustment Section......................................... 15 Added the Input Voltage Range Section..................................... 15 Added Figure 30 ............................................................................ 15 Added Figure 31 ............................................................................ 15 Changes to Voltage Level Conversion Section .......................... 16 Changes to Figure 32..................................................................... 16 Changes to Table 6......................................................................... 16 Changes to Figure 33 and Figure 34............................................ 17 Changes to Figure 35..................................................................... 18 Changes to Kelvin Connection Section...................................... 18 6/03—Rev. A to Rev. B Changes to General Description ................................................... 1 Changes to Specifications............................................................... 2 Changes to Ordering Guide ........................................................... 4 Changes to TPCs 4, 5, and 6 .......................................................... 5 Changes to TPC 9............................................................................ 6 Updated Outline Dimensions...................................................... 14 1/03—Rev. 0 to Rev. A Change to Ordering Guide............................................................. 4 11/02—Rev. 0: Initial Version Rev. F | Page 2 of 20 AD628 SPECIFICATIONS TA = 25°C, VS = ±15 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 0, unless otherwise noted. Table 1. Parameter DIFFERENTIAL AND OUTPUT AMPLIFIER Gain Equation Gain Range Offset Voltage vs. Temperature CMRR 3 Conditions Min AD628AR Typ Max Min AD628ARM Typ Max G = +0.1(1+ REXT1/REXT2) See Figure 29 VCM = 0 V; RTI of input pins 2 ; output amplifier G = +1 0.1 1 −1.5 100 +1.5 0.11 −1.5 100 +1.5 4 RTI of input pins; G = +0.1 to +100 500 Hz Minimum CMRR Over Temperature −40°C to +85°C vs. Temperature PSRR (RTI) VS = ±10 V to ±18 V Input Voltage Range Common Mode Differential Dynamic Response Small Signal Bandwidth −3 dB G = +0.1 Full Power Bandwidth Settling Time G = +0.1, to 0.01%, 100 V step Slew Rate Noise (RTI) Spectral Density 1 kHz 0.1 Hz to 10 Hz DIFFERENTIAL AMPLIFIER Gain Error vs. Temperature Nonlinearity vs. Temperature Offset Voltage RTI of input pins vs. Temperature Input Impedance Differential Common Mode CMRR 4 RTI of input pins; G = +0.1 to +100 500 Hz Minimum CMRR Over Temperature −40°C to +85°C vs. Temperature Output Resistance Error OUTPUT AMPLIFIER Gain Equation G = (1 + REXT1/REXT2) Nonlinearity G = +1, VOUT = ±10 V Offset Voltage RTI of output amp vs. Temperature Output Voltage Swing RL = 10 kΩ RL = 2 kΩ 8 4 75 75 75 70 75 70 77 1 94 −120 −120 4 77 +120 +120 1 94 −120 −120 600 5 600 5 V V 300 15 300 15 nV/√Hz μV p-p 0.1 +0.01 +0.1 5 5 10 +1.5 8 40 −0.1 3 +0.1 5 5 10 +1.5 8 220 55 75 75 70 75 70 1 10 0.1 +0.01 −1.5 75 Rev. F | Page 3 of 20 dB dB (μV/V)/°C dB 0.3 220 55 −14.2 −13.8 μV/°C dB 0.3 3 −0.15 V/V V/V mV kHz kHz μs V/μs −1.5 −0.1 4 +120 +120 40 −0.1 8 Unit 4 +0.1 0.5 +0.15 0.6 +14.1 +13.6 1 10 −0.1 −0.15 −14.2 −13.8 V/V % ppm/°C ppm ppm mV μV/°C kΩ kΩ dB +0.1 dB dB (μV/V)/°C kΩ % 0.5 +0.15 0.6 +14.1 +13.6 V/V ppm mV μV/°C V V 4 AD628 Parameter Bias Current Offset Current CMRR Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE Conditions Min VCM = ±13 V VOUT = ±13 V 130 130 AD628AR Typ Max 1.5 3 0.2 0.5 ±2.25 −40 1 To use a lower gain, see the Gain Adjustment section. The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. (0.1)(VCM ) 3 Error due to common mode as seen at the output: VOUT = [ ] × [Output Amplifier Gain] 75 2 10 20 4 Error due to common mode as seen at the output of A1: VOUT A1 = [ (0.1)(VCM ) 75 10 20 ] Rev. F | Page 4 of 20 Min AD628ARM Typ Max 1.5 3 0.2 0.5 130 130 ±18 1.6 +85 ±2.25 −40 ±18 1.6 +85 Unit nA nA dB dB V mA °C AD628 TA = 25°C, VS = 5 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 2.5, unless otherwise noted. Table 2. Parameter DIFFERENTIAL AND OUTPUT AMPLIFIER Gain Equation Gain Range Offset Voltage vs. Temperature CMRR 3 Minimum CMRR Over Temperature vs. Temperature PSRR (RTI) Input Voltage Range Common Mode 4 Differential Dynamic Response Small Signal Bandwidth – 3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFFERENTIAL AMPLIFIER Gain Error Nonlinearity vs. Temperature Offset Voltage vs. Temperature Input Impedance Differential Common Mode CMRR 5 Minimum CMRR Over Temperature vs. Temperature Output Resistance Error OUTPUT AMPLIFIER Gain Equation Nonlinearity Output Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain Conditions Min AD628AR Typ Max Min AD628ARM Typ Max G = +0.1(1+ REXT1/REXT2) See Figure 29 VCM = 2.25 V; RTI of input pins 2 ; output amplifier G = +1 0.1 1 −3.0 100 +3.0 0.11 −3.0 100 +3.0 RTI of input pins; G = +0.1 to +100 500 Hz −40°C to +85°C 75 75 70 VS = 4.5 V to 10 V 77 6 G = +0.1; to 0.01%, 30 V step 1 kHz 0.1 Hz to 10 Hz –0.1 1 94 4 77 +17 +15 350 15 nV/√Hz μV p-p 0.1 +0.01 +0.1 3 10 +2.5 10 –0.1 3 −2.5 130 130 Rev. F | Page 5 of 20 +0.1 3 10 +2.5 10 220 55 4 +0.1 1.5 0.2 VCM = 1 V to 4 V VOUT = 1 V to 4 V 0.1 +0.01 75 75 70 −0.1 0.9 1 V V 350 15 1 10 RL = 10 kΩ RL = 2 kΩ +17 +15 kHz kHz μs V/μs 75 75 70 −0.15 4 −12 −15 220 55 G = (1 + REXT1/REXT2) G = +1, VOUT = 1 V to 4 V RTI of output amplifier 1 94 μV/°C dB dB dB (μV/V)/°C dB 440 30 15 0.3 −2.5 RTI of input pins; G = +0.1 to +100 500 Hz −40°C to +85°C 15 V/V V/V mV 440 30 15 0.3 3 RTI of input pins 6 75 75 70 −12 −15 G = +0.1 15 Unit 0.5 0.15 0.6 4.1 4 3 0.5 1 10 −0.1 +0.1 −0.15 0.9 1 1.5 0.2 130 130 4 0.5 0.15 0.6 4.1 4 3 0.5 V/V % ppm ppm mV μV/°C kΩ kΩ dB dB dB (μV/V)/°C kΩ % V/V ppm mV μV/°C V V nA nA dB dB AD628 Parameter POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE Conditions Min AD628AR Typ Max ±2.25 −40 1 To use a lower gain, see the Gain Adjustment section. The addition of the difference amplifier and output amplifier offset voltage does not exceed this specification. (0.1)(VCM ) 3 Error due to common mode as seen at the output: VOUT = [ ] × [Output Amplifier Gain] 75 2 10 20 Greater values of voltage are possible with greater or lesser values of VREF. (0.1)(VCM ) 5 Error due to common mode as seen at the output of A1: VOUT A1 = [ ] 75 4 10 20 Rev. F | Page 6 of 20 +36 1.6 +85 Min AD628ARM Typ Max ±2.25 −40 +36 1.6 +85 Unit V mA °C AD628 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Internal Power Dissipation Input Voltage (Common Mode) Differential Input Voltage Output Short-Circuit Duration Storage Temperature Operating Temperature Range Lead Temperature (Soldering, 10 sec) Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS 1.6 TJ = 150°C 1.4 When using ±12 V supplies or higher (see the Input Voltage Range section). POWER DISSIPATION (W) 1 Rating ±18 V See Figure 3 ±120 V 1 ±120 V1 Indefinite −65°C to +125°C –40°C to +85°C 300°C 1.2 8-LEAD MSOP PACKAGE 1.0 8-LEAD SOIC PACKAGE 0.8 0.6 0.4 MSOP θJA (JEDEC; 4-LAYER BOARD) = 132.54°C/W SOIC θJA (JEDEC; 4-LAYER BOARD) = 154°C/W 0.2 0 –60 –40 –20 0 20 40 60 80 100 AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. F | Page 7 of 20 02992-C-003 Table 3. AD628 +IN 1 –VS 2 AD628 8 –IN 7 +VS TOP VIEW VREF 3 (Not to Scale) 6 RG CFILT 4 5 OUT 02992-C-004 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic +IN −VS VREF CFILT OUT RG +VS −IN Descriptions Noninverting Input Negative Supply Voltage Reference Voltage Input Filter Capacitor Connection Amplifier Output Output Amplifier Inverting Input Positive Supply Voltage Inverting Input Rev. F | Page 8 of 20 AD628 TYPICAL PERFORMANCE CHARACTERISTICS 140 40 8440 UNITS G = +0.1 35 120 100 25 PSRR (dB) 20 15 80 –15V +15V 60 +2.5V 40 10 20 5 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 INPUT OFFSET VOLTAGE (mV) 0 0.1 02992-C-005 0 –1.6 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 5. Typical Distribution of Input Offset Voltage, VS = ±15 V, SOIC_N Package 02992-C-008 % OF UNITS 30 Figure 8. PSRR vs. Frequency, Single and Dual Supplies 1000 25 % OF UNITS 20 15 10 0 –74 –78 –82 –86 –90 –94 –98 –102 –106 –110 CMRR (dB) 100 02992-C-006 5 1 10 100 1k 10k 100k FREQUENCY (Hz) 02992-C-009 VOLTAGE NOISE DENSITY (nV/√Hz) 8440 UNITS Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V Figure 6. Typical Distribution of Common-Mode Rejection, SOIC_N Package 1000 130 VOLTAGE NOISE DENSITY (nV/√Hz) 120 110 VS = ±15V 90 80 70 VS = ±2.5V 60 50 30 10 100 1k 10k FREQUENCY (Hz) 100k 100 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V Figure 7. CMRR vs. Frequency Rev. F | Page 9 of 20 02992-C-010 40 02992-C-007 CMRR (dB) 100 AD628 40 9638 UNITS 1s 35 100 30 % OF DEVICES NOISE (5μV/DIV) 90 25 20 15 10 10 0 5 0 02992-C-011 0 10 TIME (Sec) 0 1 2 3 4 5 COMMON-MODE VOLTAGE (V) GAIN (dB) 10 100 G = +100 30 G = +10 10 G = +1 –10 –20 9 UPPER CMV LIMIT 50 0 8 150 60 20 7 Figure 14. Typical Distribution of +1 Gain Error Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI 40 6 GAIN ERROR (ppm) 02992-C-014 5 G = +0.1 –40°C 50 +85°C 0 VREF = 0V +25°C –40°C –50 +85°C –100 LOWER CMV LIMIT 1k 10k 100k 1M 10M FREQUENCY (Hz) –150 02992-C-012 –40 100 0 5 10 15 20 VS (±V) 02992-C-015 –30 Figure 15. Common-Mode Operating Range vs. Power Supply Voltage for Three Temperatures Figure 12. Small Signal Frequency Response, VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100 60 500μV 50 100 OUTPUT ERROR (μV) 20 G = +10 10 0 G = +1 –10 –20 RL = 1kΩ 90 RL = 2kΩ RL = 10kΩ 10 0 G = +0.1 4.0V –30 –40 10 100 1k 10k 100k FREQUENCY (Hz) 1M 02992-C-013 GAIN (dB) 30 VS = ±15V Figure 13. Large Signal Frequency Response, VOUT = 20 V p-p, G = +0.1, +1, +10, and +100 OUTPUT VOLTAGE (V) Figure 16. Normalized Gain Error vs. VOUT, VS = ±15 V Rev. F | Page 10 of 20 02992-C-016 40 G = +100 AD628 VS = ±2.5V 100μV 500mV RL = 1kΩ 100 100 OUTPUT ERROR (μV) 90 90 RL = 2kΩ 10 0 0 50mV 02992-C-017 500mV OUTPUT VOLTAGE (V) 4μs 02992-C-020 RL = 10kΩ 10 Figure 20. Small Signal Pulse Response, RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output Figure 17. Normalized Gain Error vs. VOUT, VS = ±2.5 V 4 500mV BIAS CURRENT (nA) 3 100 90 2 1 10 –20 0 20 40 TEMPERATURE (°C) 60 80 100 50mV 02992-C-018 0 –40 4μs 02992-C-021 0 Figure 21. Small Signal Pulse Response, RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output Figure 18. Bias Current vs. Temperature Buffer 15 –40°C –25°C 500mV +85°C 100 5 +25°C 90 0 –40°C –5 –25°C +85°C +25°C 10 –10 0 5 10 15 OUTPUT CURRENT (mA) 20 25 50mV 4μs Figure 22. Large Signal Pulse Response, RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output Figure 19. Output Voltage Operating Range vs. Output Current Rev. F | Page 11 of 20 02992-C-021 –15 0 02992-C-019 OUTPUT VOLTAGE SWING (V) 10 AD628 100 100 90 90 5V 5V 10mV 10mV 10 10 0 100μs 02992-C-024 100μs 02992-C-023 0 Figure 24. Settling Time to 0.01% 0 V to −10 V Step Figure 23. Settling Time to 0.01%, 0 V to 10 V Step Rev. F | Page 12 of 20 AD628 TEST CIRCUITS HP3589A SPECTRUM ANALYZER HP3561A +VS SPECTRUM ANALYZER +VS 10kΩ –IN 10kΩ 100kΩ AD829 OUT –IN –IN G = +0.1 +IN +IN CFILT 4 7 – +IN FET PROBE + –IN G = +100 8 10kΩ 100kΩ 10kΩ +IN OUT 5 100kΩ AD628 10kΩ +IN CFILT VREF 1 RG –IN –IN G = +0.1 +IN 100kΩ AD628 10kΩ VREF RG 6 10kΩ 02992-C-025 AD707 + Figure 27. Noise Tests Figure 25. CMRR vs. Frequency SCOPE +VS 1 VAC +15V 10kΩ G = +100 G = +100 10kΩ +IN 100kΩ +IN 2 –VS – –IN 3 OUT 20Ω –IN –IN G = +0.1 +IN + AD829 – 100kΩ AD628 10kΩ VREF CFILT RG 02992-C-026 –VS Figure 26. PSRR vs. Frequency Rev. F | Page 13 of 20 10kΩ 02992-C-027 –VS AD628 THEORY OF OPERATION The AD628 is a high common-mode voltage difference amplifier, combined with a user-configurable output amplifier (see Figure 28 and Figure 29). Differential mode voltages in excess of 120 V are accurately scaled by a precision 11:1 voltage divider at the input. A reference voltage input is available to the user at Pin 3 (VREF). The output common-mode voltage of the difference amplifier is the same as the voltage applied to the reference pin. If the uncommitted amplifier is configured for gain, connect Pin 3 to one end of the external gain resistor to establish the output common-mode voltage at Pin 5 (OUT). The uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 kΩ resistor. Both inputs are accessible to the user. Careful layout design has resulted in exceptional commonmode rejection at higher frequencies. The inputs are connected to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power pins, Pin 2 (−VS) and Pin 7 (+VS). Because the power pins are at ac ground, input impedance balance and, therefore, commonmode rejection are preserved at higher frequencies. RG The output of the difference amplifier is internally connected to a 10 kΩ resistor trimmed to better than ±0.1% absolute accuracy. The resistor is connected to the noninverting input of the output amplifier and is accessible at Pin 4 (CFILT). A capacitor can be connected to implement a low-pass filter, a resistor can be connected to further reduce the output voltage, or a clamp circuit can be connected to limit the output swing. –IN 10kΩ 100kΩ –IN G = +0.1 –IN 10kΩ A1 CFILT CFILT +VS AD628 10kΩ G = +0.1 10kΩ A1 +IN –IN 100kΩ 10kΩ –VS VREF RG REXT3 REFERENCE VOLTAGE REXT2 Figure 29. Circuit Connections Rev. F | Page 14 of 20 REXT1 02992-C-029 +IN OUT A2 +IN 02992-C-028 10kΩ Figure 28. Simplified Schematic –IN +IN 100kΩ VREF –IN OUT +IN +IN 100kΩ A2 AD628 APPLICATIONS GAIN ADJUSTMENT INPUT VOLTAGE RANGE The AD628 system gain is provided by an architecture consisting of two amplifiers. The gain of the input stage is fixed at 0.1; the output buffer is user-adjustable as GA2 = 1 + REXT1/REXT2. The system gain is then VREF and the supply voltage determine the common-mode input voltage range. The relation is expressed by (1) REXT1 (Ω) 10 k 20 k 25.9 k 49.9 k 100 k 200 k 499 k 1M REXT2 (Ω) ∞ 20 k 18.7 k 12.4 k 11 k 10.5 k 10.2 k 10.2 k REXT3 (Ω) 0 0 0 0 0 0 0 0 150 100 50 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = GND 0 –50 –100 –150 –200 0 2 4 See Figure 29. To set the system gain to less than 0.1, create an attenuator by placing Resistor REXT4 from Pin 4 (CFILT) to the reference voltage. A divider is formed by the 10 kΩ resistor that is in series with the positive input of A2 and Resistor REXT4. A2 is configured for unity gain. Using a divider and setting A2 to unity gain yields ⎛ REXT4 GW / DIVIDER = 0.1 × ⎜ ⎜ 10 kΩ + R EXT4 ⎝ 6 8 10 12 14 16 SUPPLY VOLTAGE (±V) ⎞ ⎟ ×1 ⎟ ⎠ Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies 100 INPUT COMMON-MODE VOLTAGE (V) 1 A2 Gain (V/V) 1 2 2.5 5 10 20 50 100 200 02992-C-035 Table 5. Nearest Standard 1% Resistor Values for Various Gains1 where VS+ is the positive supply, VS− is the negative supply, and 1.2 V is the headroom needed for suitable performance. Equation 2 provides a general formula for calculating the common-mode input voltage range. However, keep the AD628 within the maximum limits listed in Table 1 to maintain optimal performance. This is illustrated in Figure 30 where the maximum common-mode input voltage is limited to ±120 V. Figure 31 shows the common-mode input voltage bounds for single-supply voltages. 80 60 40 20 MAXIMUM INPUT COMMON-MODE VOLTAGE WHEN VREF = MIDSUPPLY 0 –20 –40 –60 –80 0 2 4 6 8 10 12 14 SINGLE-SUPPLY VOLTAGE (V) Figure 31. Input Common-Mode Voltage vs. Supply Voltage for Single Supplies Rev. F | Page 15 of 20 16 02992-C-034 At a 2 nA maximum, the input bias current of the buffer amplifier is very low and any offset voltage induced at the buffer amplifier by its bias current may be neglected (2 nA × 10 kΩ = 20 μV). However, to absolutely minimize bias current effects, select REXT1 and REXT2 so that their parallel combination is 10 kΩ. If practical resistor values force the parallel combination of REXT1 and REXT2 below 10 kΩ, add a series resistor (REXT3) to make up for the difference. Table 5 lists several values of gain and corresponding resistor values. Total Gain (V/V) 0.1 0.2 0.25 0.5 1 2 5 10 (2) VCM LOWER ≥ 11 (VS − + 1.2 V ) − 10 VREF ⎞ ⎛ R = 0.1 × ⎜⎜1 + EXT1 ⎟⎟ ⎝ R EXT2 ⎠ INPUT COMMON-MODE VOLTAGE (V) GTOTAL VCMUPPER ≤ 11 (VS + – 1.2 V ) − 10 VREF AD628 The differential input voltage range is constrained to the linear operation of the internal amplifiers A1 and A2. The voltage applied to the inputs of A1 and A2 should be between VS− + 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2 should be kept between VS− + 0.9 V and VS+ − 0.9 V. • VOLTAGE LEVEL CONVERSION • Industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. Signal conditioners provide output voltages of up to ±10 V full scale. However, ADCs or microprocessors operating on single 3.3 V to 5 V logic supplies are now the norm. Thus, the controller voltages require further reduction in amplitude and reference. Furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate destructive energy between utility grids. The AD628 offers an ideal solution to both problems. It attenuates otherwise destructive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. Conversion from voltage-driven or current-loop systems is easily accomplished using the circuit shown in Figure 32. This shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply ADC. To adjust common-mode output voltage, connect Pin 3 (VREF) and the lower end of the 10 kΩ resistor to the desired voltage. The output common-mode voltage is the same as the reference voltage. Designing such an application can be done in a few simple steps, including the following: Determine the required gain. For example, if the input voltage must be transformed from ±10 V to 0 V to +5 V, the gain is +5/+20 or +0.25. Determine if the circuit common-mode voltage should be changed. An AD7940 ADC is illustrated for this example. When operating from a 5 V supply, the common-mode voltage of the AD7940 is half the supply, or 2.5 V. If the AD628 reference pin and the lower terminal of the 10 kΩ resistor are connected to a 2.5 V voltage source, the output common-mode voltage is 2.5 V. Table 6 shows resistor and reference values for commonly used single-supply converter voltages. REXT3 is included as an option to balance the source impedance into A2. This is described in more detail in the Gain Adjustment section. Table 6. Nearest 1% Resistor Values for Voltage Level Conversion Applications Input Voltage (V) ±10 ±5 10 5 ±10 ±5 10 5 Rev. F | Page 16 of 20 ADC Supply Voltage (V) 5 5 5 5 3 3 3 3 Desired Output Voltage (V) 2.5 2.5 2.5 2.5 1.25 1.25 1.25 1.25 VREF (V) 2.5 2.5 0 0 1.25 1.25 0 0 REXT1 (kΩ) 15 39.7 39.7 89.8 2.49 15 15 39.7 REXT2 (kΩ) 10 10 10 10 10 10 10 10 AD628 +12V –12V 0.1μF –IN 8 +/–10V 7 10μF 0.1μF +Vs –Vs 2 AD628 10kΩ 100kΩ +IN 1 10μF SCLK 4 10kΩ A1 A2 100kΩ 49.9Ω 5 CFILT 3 6 4 AD7940 SDATA 5 VDD GND 2 33nF 10kΩ VREF 3 VIN CS 6 1 RG VOUT REXT2 10kΩ AD628 REFERENCE VOLTAGE 1 10μF 0.1μF REXT1 15kΩ 15nF SERIAL DATA 2 AD8606 1/2 7 3 8 5 AD8606 2/2 6 4 0.1μF 10μF 2 6 VIN +12V REF195 3 4 02992-030 10kΩ 10kΩ Figure 32. Level Shifter CURRENT LOOP RECEIVER MONITORING BATTERY VOLTAGES Analog data transmitted on a 4 to 20 mA current loop can be detected with the receiver shown in Figure 33. The AD628 is an ideal choice for such a function because the current loop is driven with a compliance voltage sufficient to stabilize the loop, and the resultant common-mode voltage often exceeds commonly used supply voltages. Note that with large shunt values, a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input. Figure 34 illustrates how the AD628 is used to monitor a battery charger. Voltages approximately eight times the power supply voltage can be applied to the input with no damage. The resistor divider action is well-suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment. VCM = 15V +15V –15V 3 7 2 4 AD628 10kΩ 249Ω 1 100kΩ 10kΩ 5 249Ω 8 100kΩ 0V TO 5V TO ADC 10kΩ 6 210kΩ +2.5V 100kΩ 9.53kΩ Figure 33. Level Shifter for 4 to 20 mA Current Loop Rev. F | Page 17 of 20 02992-C-031 I = 4 TO 20mA AD628 5V +VS nVBAT(V) 100kΩ 10kΩ 10kΩ +IN –IN G = +0.1 –IN REXT1 10kΩ A1 +IN +1.5V BATTERY OTHER BATTERIES IN CHARGING CIRCUIT 0V TO 5V TO ADC OUT A2 RG 100kΩ +IN AD628 10kΩ –VS VREF 02992-C-032 CHARGING CIRCUIT –IN CFILT Figure 34. Battery Voltage Monitor FILTER CAPACITOR VALUES KELVIN CONNECTION Connect a capacitor to Pin 4 (CFILT) to implement a low-pass filter. The capacitor value is In certain applications, it may be desirable to connect the inverting input of an amplifier to a remote reference point. This eliminates errors resulting in circuit losses in interconnecting wiring. The AD628 is particularly suited for this type of connection. In Figure 35, a 10 kΩ resistor added in the feedback matches the source impedance of A2. This is described in more detail in the Gain Adjustment section. where ft is the desired 3 dB filter frequency. Table 7 shows several frequencies and their closest standard capacitor values. 5V Table 7. Capacitor Values for Various Filter Frequencies Frequency (Hz) 10 50 60 100 400 1k 5k 10 k Capacitor Value (μF) 1.5 0.33 0.27 0.15 0.039 0.015 0.0033 0.0015 +VS –IN 100kΩ 10kΩ –IN 10kΩ +IN A2 –IN G = +0.1 OUT CIRCUIT LOSS RG 10kΩ A1 +IN 100kΩ LOAD +IN 10kΩ AD628 –VS VREF CFILT VS /2 Figure 35. Kelvin Connection Rev. F | Page 18 of 20 02992-C-033 C = 15.9/ft (μF) AD628 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5.00 (0.1968) 4.80 (0.1890) 5 5.15 4.90 4.65 8 4.00 (0.1574) 3.80 (0.1497) 1 4 PIN 1 0.25 (0.0098) 0.10 (0.0040) 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8° 0° 6.20 (0.2440) 4 5.80 (0.2284) 1.27 (0.0500) BSC 0.65 BSC 0.95 0.85 0.75 5 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 0.80 0.60 0.40 SEATING PLANE 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 36. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Figure 37. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model AD628AR AD628AR-REEL AD628AR-REEL7 AD628ARZ 1 AD628ARZ-RL1 AD628ARZ-R71 AD628ARM AD628ARM-REEL AD628ARM-REEL7 AD628ARMZ1 AD628ARMZ-RL1 AD628ARMZ-R71 AD628-EVAL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Description 8-Lead SOIC_N 8-Lead SOIC_N 13" Reel 8-Lead SOIC_N 7" Reel 8-Lead SOIC_N 8-Lead SOIC_N 13" Reel 8-Lead SOIC_N 7" Reel 8-Lead MSOP 8-Lead MSOP 13" Reel 8-Lead MSOP 7" Reel 8-Lead MSOP 8-Lead MSOP 13" Reel 8-Lead MSOP 7" Reel Evaluation Board Z = Pb-free part. Rev. F | Page 19 of 20 Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding JGA JGA JGA JGZ JGZ JGZ AD628 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02992-0-3/06(F) T T Rev. F | Page 20 of 20