Previous Datasheet Index Next Data Sheet PD - 9.1240B IRF7304 PRELIMINARY HEXFET® Power MOSFET Generation V Technology Ultra Low On-Resistance Dual P-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching S1 G1 S2 G2 1 8 D1 2 7 D1 3 6 D2 4 5 D2 VDSS = -20V RDS(on) = 0.090Ω Top View Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design for which HEXFET Power MOSFETs are well known, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra-red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application. SO-8 Absolute Maximum Ratings Parameter ID @ TA = 25°C ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, V GS @ -4.5V Continuous Drain Current, V GS @ -4.5V Continuous Drain Current, V GS @ -4.5V Pulsed Drain Current Power Dissipation (PCB Mount)** Linear Derating Factor (PCB Mount)** Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range Max. Units -4.0 -3.6 -2.9 -14 1.4 0.011 ±8.0 -1.2 -55 to + 150 A A A A W W/°C V V/ns °C Thermal Resistance Parameter RθJA Junction-to-Amb. (PCB Mount, steady state)** Min. Typ. Max. Units –––– –––– 90 °C/W ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 127 To Order Previous Datasheet Index Next Data Sheet IRF7304 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. -20 ––– ––– ––– -0.70 4.0 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– RDS(ON) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– V(BR)DSS IGSS Typ. Max. Units Conditions ––– ––– V VGS = 0V, ID = -250µA -0.012 ––– V/°C Reference to 25°C, I D = -1mA ––– 0.090 VGS = -4.5V, ID = -2.2A Ω ––– 0.140 VGS = -2.7V, ID = -1.8A ––– ––– V VDS = VGS, ID = -250µA ––– ––– S VDS = -16V, ID = -2.2A ––– -1.0 VDS = -16V, VGS = 0V µA ––– -25 VDS = -16V, VGS = 0V, TJ = 125°C ––– -100 VGS = -8.0V nA ––– 100 VGS = 8.0V ––– 22 ID = -2.2A ––– 3.3 nC VDS = -16V ––– 9.0 VGS = -4.5V, See Fig. 6 and 12 8.4 ––– VDD = -10V 26 ––– ID = -2.2A ns 51 ––– RG = 6.0Ω 33 ––– RD = 4.5Ω, See Fig. 10 4.0 ––– nH LS Internal Source Inductance ––– 6.0 ––– Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– ––– ––– 610 310 170 ––– ––– ––– pF Between lead tip and center of die contact VGS = 0V VDS = -15V ƒ = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions ––– ––– 1.8 MOSFET symbol showing the A ––– ––– -14 integral reverse p-n junction diode. ––– ––– -1.0 V TJ = 25°C, I S = -1.8A, V GS = 0V ––– 56 84 ns TJ = 25°C, I F = -2.2A ––– 71 110 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by L S+LD) ISD ≤ -2.2A, di/dt ≤− 50A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Pulse width ≤ 300µs; duty cycle ≤ 2%. 128 To Order Previous Datasheet Index Next Data Sheet IRF7304 100 100 VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTTOM - 1.5V 10 1 -1.5V 20µs PULSE WIDTH TJ = 25°C A 0.1 0.01 VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTTOM - 1.5V TOP -ID , Drain-to-Source Current (A) -ID , Drain-to-Source Current (A) TOP 0.1 1 10 10 1 -1.5V 20µs PULSE WIDTH TJ = 150°C 0.1 0.01 100 0.1 -VDS , Drain-to-Source Voltage (V) R DS(on) , Drain-to-Source On Resistance (Normalized) -ID , Drain-to-Source Current (A) TJ = 150°C 1 VDS = -15V 20µs PULSE WIDTH 0.1 1.5 2.0 2.5 3.0 3.5 4.0 A 4.5 A 100 Fig 2. Typical Output Characteristics, TJ = 150oC 100 TJ = 25°C 10 -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics, TJ = 25oC 10 1 2.0 I D = -3.6A 1.5 1.0 0.5 VGS = -4.5V 0.0 5.0 -VGS , Gate-to-Source Voltage (V) -60 -40 -20 0 20 40 60 80 TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 129 To Order A 100 120 140 160 Previous Datasheet Index Next Data Sheet IRF7304 C, Capacitance (pF) 1500 V GS = 0V, f = 1MHz C iss = C gs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd Ciss 1000 Coss Crss 500 0 A 1 10 100 -VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 I D = -2.2A VDS = -16V -ISD , Reverse Drain Current (A) -VGS , Gate-to-Source Voltage (V) 10 8 6 4 2 FOR TEST CIRCUIT SEE FIGURE 12 0 0 5 10 15 20 A 10 TJ = 150°C TJ = 25°C 1 VGS = 0V 0.1 0.3 25 0.6 0.9 1.2 -VSD , Source-to-Drain Voltage (V) Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 7. Typical Source-Drain Diode Forward Voltage 130 To Order A 1.5 Previous Datasheet Index Next Data Sheet IRF7304 100 4.0 -ID, Drain Current (Amps) -I D , Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) 10 1ms 10ms 1 100ms 0.1 3.0 2.0 1.0 TA = 25°C TJ = 150°C Single Pulse A 0.1 1 10 100 A 0.0 25 -VDS , Drain-to-Source Voltage (V) 50 75 100 125 150 TA , Ambient Temperature (°C) Fig 8. Maximum Safe Operating Area Fig 9. Maximum Drain Current Vs. Ambient Temperature Fig 10a. Switching Time Test Circuit Fig 10b. Switching Time Waveforms 131 To Order Previous Datasheet Index Next Data Sheet IRF7304 100 Thermal Response (Z thJA ) D = 0.50 0.20 10 0.10 0.05 0.02 PDM 0.01 1 t 0.1 0.00001 Notes: 1. Duty factor D = t / t 2. Peak T =JP 0.0001 0.001 1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.01 0.1 1 xZ DM 10 1 2 +thJA T A 100 t 1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Fig 12a. Basic Gate Charge Waveform Fig 12b. Gate Charge Test Circuit Refer to the Appendix Section for the following: Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit — See page 328. Appendix B: Package Outline Mechanical Drawing — See page 332. Appendix C: Part Marking Information — See page 332. Appendix D: Tape and Reel Information — See page 336. 132 To Order A 1000