TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 D Bidirectional Transceiver D Meets or Exceeds the Requirements of D D D D D D D D D D D D D D D D OR P PACKAGE (TOP VIEW) TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendation V.11 High-Speed Advanced Low-Power Schottky Circuitry Low Skew . . . 6 ns Max Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments Low Supply-Current Requirements . . . 30 mA Max Wide Positive and Negative Input/Output Bus-Voltage Ranges Driver Output Capacity . . . ± 60 mA Thermal-Shutdown Protection Driver Positive and Negative Current Limiting Receiver Input Impedances . . . 12 kΩ Min Receiver Input Sensitivity . . . ± 200 mV Max Receiver Input Hysteresis . . . 120 mV Typ Fail Safe . . . High Receiver Output With Inputs Open Operates From a Single 5-V Supply Glitch-Free Power-Up and Power-Down Protection Interchangeable With National DS3695 and DS3695A R RE DE D 1 8 2 7 3 6 4 5 VCC B A GND description The TL3695 differential bus transceiver is designed for bidirectional data communication on multipoint bus-transmission lines. It is designed for balanced transmission lines and meets TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendation V.11. The TL3695 combines a 3-state differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can be externally connected together to function as a directional control. The driver differential outputs and the receiver differential inputs are connected internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party line applications. The TL3695 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (D) PLASTIC DIP (P) 0°C to 70°C TL3695D TL3695P The D package is available taped and reeled. Add the suffix R to device type (e.g., TL3695DR). Function Tables DRIVER OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z A B H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) RECEIVER DIFFERENTIAL INPUTS A−B ENABLE RE OUTPUT R VID ≥ 0.2 V L H −0.2 V < VID < 0.2 V L ? VID ≤ − 0.2 V L L X H Z Inputs open L H H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) logic symbol† DE RE D 3 2 logic diagram (positive logic) DE EN1 EN2 4 1 1 R † 2 1 6 7 D A B RE R 2 3 4 2 6 1 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 A Bus B TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 schematic of inputs and outputs EQUIVALENT OF EACH INPUT VCC TYPICAL OF RECEIVER OUTPUT TYPICAL OF A AND B I/O PORTS VCC VCC R(eq) 85 Ω NOM 180 kΩ NOM Connected on A Port Input A or B 3 kΩ NOM 18 kΩ NOM Driver Input: R(eq) = 3 kΩ NOM Enable Inputs: R(eq) = 8 kΩ NOM R(eq) = equivalent resistor 180 kΩ NOM Connected on B Port Output 1.1 kΩ NOM absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 recommended operating conditions Supply voltage, VCC MIN NOM MAX UNIT 4.75 5 5.25 V 12 Voltage at any bus terminal (separately or common mode) mode), VI or VIC −7 High-level Input voltage, VIH D, DE, and RE Low-level Input voltage, VIL D, DE, and RE 2 Differential input voltage, VID (see Note 3) Driver High level output current High-level current, IOH Receiver Driver Low level output current Low-level current, IOL V 0.8 V ± 12 V − 60 mA − 400 μA 60 Receiver Operating free-air temperature, TA 8 0 70 NOTE 3: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V mA °C TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) TEST CONDITIONS† PARAMETER MIN TYP‡ MAX UNIT VIK Input clamp voltage II = − 18 mA −1.5 V VO Output voltage IO = 0 0 6 V |VOD1| Differential output voltage IO = 0 1.5 5 V |VOD2| Differential output voltage RL = 100 Ω, Ω See Figure 1 1/2 VOD1 or 2§ RL = 54 Ω, See Figure 1 1.5 Vtest = − 7 V to 12 V, See Figure 2 1.5 V 2.5 5 V 5 V ± 0.2 V 3 V ± 0.2 V VOD3 Differential output voltage Δ |VOD| Change in magnitude of differential output voltage¶ VOC Common-mode output voltage Δ |VOC| Change in magnitude of common-mode output voltage¶ IO Output current Output disabled, See Note 4 IIH High-level input current VI = 2.4 V 20 μA IIL Low-level input current VI = 0.4 V −200 μA VO = − 6 V −250 VO = 0 −150 IOS RL = 54 Ω, Short circuit output current# Short-circuit See Figure 1 VO = 12 V 1 VO = − 7 V −0.8 VO = VCC 250 VO = 8 V ICC Supply current No load mA mA 250 Outputs enabled 23 50 Outputs disabled 19 35 mA † The power-off measurement in TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VCC = 5 V and TA = 25°C. § The minimum V OD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater. ¶ Δ |V | and Δ |V | are the changes in magnitude of V OD OC OD and VOC, respectively, that occur when the input is changed from a high level to a low level. # Duration of the short circuit should not exceed one second for this test. NOTE 4: This applies for power on and power off. Refer to TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a combined driver and receiver terminal. ‡ switching characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER td(OD) MIN Differential-output delay time Skew (|td(ODH) − td(ODL)|) ‡ TEST CONDITIONS CL1 = CL2 = 100 pF, RL = 60 Ω, See Figure 3 TYP‡ MAX 8 22 ns 1 8 ns 8 18 ns UNIT tt(OD) Differential output transition time tPZH Output enable time to high level CL = 100 pF, RL = 500 Ω, See Figure 4 50 ns tPZL Output enable time to low level CL = 100 pF, RL = 500 Ω, See Figure 5 50 ns tPHZ Output disable time from high level CL = 15 pF, RL = 500 Ω, See Figure 4 8 30 ns tPLZ Output disable time from low level CL = 15 pF, RL = 500 Ω, See Figure 5 8 30 ns All typical values are at VCC = 5 V and TA = 25°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 SYMBOL EQUIVALENTS DATA-SHEET PARAMETER TIA/EIA-422-B TIA/EIA-485-A VO Voa, Vob Voa, Vob |VOD1| Vo Vo |VOD2| Vt (RL = 100 Ω) Vt (RL = 54 Ω) Vt (test termination measurement 2) |VOD3| Vtest Vtst Δ |VOD| | |Vt| − |Vt| | | |Vt| − |Vt| | VOC |Vos| |Vos| Δ |VOC| | Vos − Vos | | Vos − Vos | IOS | Isa |, | Isb | IO | Ixa |, | Ixb | Iia, Iib RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature range (unless otherwise noted) PARAMETER VIT+ TEST CONDITIONS Positive-going input threshold voltage VO = 2.7 V, MIN TYP† IO = − 0.4 mA VIT− Negative-going input threshold voltage VO = 0.5 V, Vhys Hysteresis voltage (VIT+−VIT−) VOC = 0 IO = 8 mA VIK Enable-input clamp voltage II = − 18 mA VOH High level output voltage High-level VID = 200 mV or inputs open, See Figure 6 IOH = − 400 μA, VOL Low level output voltage Low-level VID = − 200 mV, See Figure 6 IOZ High-impedance-state output current VO = 0.4 V to 2.4 V MAX 0.2 −0.2‡ UNIT V V 70 mV −1.5 24 2.4 V V IOL = 16 mA 0.5 IOL = 8 mA 0.45 ± 20 VI = 12 V 1 VI = − 7 V −0.8 V μA II Line input current Other input = 0, See Note 5 IIH High-level enable-input current VIH = 2.7 V 20 μA IIL Low-level enable-input current VIL = 0.4 V −100 μA rI Input resistance IOS Short-circuit output current§ VO = 0 −85 mA ICC Supply current No load 12 kΩ −15 Outputs enabled 23 50 Outputs disabled 19 35 † mA mA All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. § Duration of the short circuit should not exceed one second for this test. NOTE 5: This applies for power on and power off. Refer to TIA/EIA-485-A for exact conditions. ‡ 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 switching characteristics over recommended ranges of supply voltage and operating free-air temperature range, CL = 15 pF PARAMETER † TEST CONDITIONS tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time, high- to low-level output tPZH Output enable time to high level tPZL Output enable time to low level tPHZ Output disable time from high level tPLZ Output disable time from low level MIN TYP† MAX 14 37 ns 14 37 ns 7 20 ns 7 20 ns 7 16 ns 8 16 ns VID = − 1.5 V to 1.5 V, See Figure 7 See Figure 8 See Figure 8 UNIT All typical values are at VCC = 5 V and TA = 25°C. PARAMETER MEASUREMENT INFORMATION R L 2 VOD2 R L 2 VOC Figure 1. Driver VOD and VOC 375 Ω VOD3 60 Ω Vtest 375 Ω Figure 2. Driver VOD3 3V Input CL1 = 100 pF (see Note A) Generator (see Note B) 0V Output td(ODH) RL = 60 Ω 50 Ω CL 2 = 100 pF (see Note A) 1.5 V 1.5 V 50% Output 3V td(ODL) 90% 10% tt(OD) TEST CIRCUIT ≈2.5 V 50% ≈ −2.5 V tt(OD) VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 3. Driver Differential-Output Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 PARAMETER MEASUREMENT INFORMATION S1 0 V to 3 V Generator (see Note B) Output 50 Ω 3V Input 1.5 V 0V RL = 500 Ω CL (see Note A) 1.5 V 0.5 V tPZH VOH 2.3 V Output Voff ≈0 V tPHZ TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω. Figure 4. Driver Test Circuit and Voltage Waveforms 5V RL = 500 Ω S1 3V Input 1.5 V 1.5 V Output 0V 3 V or 0 V tPZL Generator (see Note B) 50 Ω tPLZ CL (see Note A) 2.3 V Output VOL VOLTAGE WAVEFORMS TEST CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.. Figure 5. Driver Test Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5V 0.5 V TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 PARAMETER MEASUREMENT INFORMATION VID VOH −IOH + IOL VOL Figure 6. Receiver VOH and VOL 5V 1 kΩ 2.5 V Output Generator (see Note B) Input 0V 0V −2.5 V 51 Ω CL = 15 pF (see Note A) 1 kΩ 1N916 or Equivalent tPHL tPLH VOH Output 1.5 V 0V 1.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω. Figure 7. Receiver Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 PARAMETER MEASUREMENT INFORMATION 5V S2 2 kΩ S1 1.5 V Output −1.5 V CL = 15 pF (see Note A) Generator (see Note B) 1N916 or Equivalent 1 kΩ 50 Ω S3 TEST CIRCUIT 3V Input 1.5 V 0V S1 to 1.5 V S2 Open S3 Closed 3V S1 to − 1.5 V 1.5 V S2 Closed S3 Open 0V Input tPZL tPZH VOH ≈ 4.5 V Output 1.5 V Output 1.5 V VOL 0V 3V Input 1.5 V 0V S1 to 1.5 V S2 Open S3 Closed 3V Input 0V 0.5 V S1 to − 1.5 V S2 Closed S3 Open tPLZ tPHZ Output 1.5 V ≈ 1.3 V VOH Output 0.5 V ≈ 1.3 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω. Figure 8. Receiver Test Circuit and Voltage Waveforms 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 TYPICAL CHARACTERISTICS† DRIVER DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 5 VCC = 5 V TA = 25°C VCC = 5 V TA = 25°C 4.5 VOL VOL− Low-Level Output Voltage − V VV0H OH − High-Level Output Voltage − V 4.5 4 3.5 3 2.5 2 1.5 1 4 3.5 3 2.5 2 1.5 1 0.5 0.5 0 0 0 −20 −40 −60 −80 −100 0 −120 20 40 60 80 100 120 IOL − Low-Level Output Current − mA IOH − High-Level Output Current − mA Figure 9 Figure 10 DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT VOD VOD − Differential Output Voltage − V 4 VCC = 5 V TA = 25°C 3.5 3 2.5 2 1.5 1 0.5 0 0 10 20 30 40 50 60 70 80 90 100 IO − Output Current − mA Figure 11 † Operation of the device at these or any other conditions beyond those indicated under ‘‘recommended operating conditions” is not implied. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 TYPICAL CHARACTERISTICS† RECEIVER RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 5 VCC = 5 V VID = 200 mV IOH = − 440 μA VID = 0.2 V TA = 25°C VV0H OH − High-Level Output Voltage − V VV0H OH − High-Level Output Voltage − V 5 4 3 VCC = 5.25 V 2 VCC = 5 V VCC = 4.75 V 1 0 0 −10 −20 −30 −40 4 3 2 1 0 −40 −20 −50 0 20 40 60 80 100 TA − Free-Air Temperature − °C IOH − High-Level Output Current − mA Figure 12 Figure 13 RECEIVER RECEIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.6 0.6 0.5 VOL VOL − Low-Level Output Voltage − V VOL VOL − Low-Level Output Voltage − V VCC = 5 V TA = 25°C 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 0.5 VCC = 5 V VID = − 200 mV IOL = 8 mA 0.4 0.3 0.2 0.1 0 −40 −20 IOL − Low-Level Output Current − mA 0 20 40 60 80 100 TA − Free-Air Temperature − °C 120 Figure 15 Figure 14 † 120 Operation of the device at these or any other conditions beyond those indicated under ‘‘recommended operating conditions” is not implied. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL3695 DIFFERENTIAL BUS TRANSCEIVER SLLS044D − NOVEMBER 1988 − REVISED DECEMBER 1999 TYPICAL CHARACTERISTICS† RECEIVER RECEIVER OUTPUT VOLTAGE vs ENABLE VOLTAGE 5 VCC = 4.75 V VCC = 5 V 2 1 VCC = 5.25 V VID = − 0.2 V Load = 1 kΩ to VCC TA = 25°C 5 VV) O − Output Voltage − V VV) O − Output Voltage − V 3 6 VID = 0.2 V Load = 8 kΩ to GND TA = 25°C VCC = 5.25 V 4 OUTPUT VOLTAGE vs ENABLE VOLTAGE VCC = 4.75 V 4 VCC = 5 V 3 2 1 0 0 † 0.5 1 1.5 2 2.5 0 3 VI − Enable Voltage − V 1.5 2 1 VI − Enable Voltage − V Figure 16 Figure 17 0 0.5 2.5 3 Operation of the device at these or any other conditions beyond those indicated under ‘‘recommended operating conditions” is not implied. APPLICATION INFORMATION TL3695 TL3695 RT RT Up to 32 Transceivers NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 18. Typical Application Circuit POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL3695D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695DE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TL3695P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL3695PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device TL3695DR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.4 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL3695DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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