TI SN75ALS181

SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
D
D
D
D
D
D
D
D
D
D
D
Meets TIA/EIA-422-B, TIA/EIA-485-A, and
CCITT Recommendations V.11 and X.27
Low Supply-Current Requirements . . .
30 mA Max
Driver Output Capacity . . . ±60 mA
Thermal Shutdown Protection
Driver Common-Mode Output Voltage
Range of –7 V to 12 V
Receiver Input Impedance . . . 12 kΩ Min
Receiver Input Sensitivity . . . ±200 mV
Receiver Input Hysteresis . . . 60 mV Typ
Receiver Common-Mode Input Voltage
Range of ±12 V
Operates From Single 5-V Supply
Glitch-Free Power-Up and Power-Down
Protection
N OR NS PACKAGE
(TOP VIEW)
NC
R
RE
DE
D
GND
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
VCC
A
B
Z
Y
NC
NC – No internal connection
description/ordering information
The SN75ALS181 is a differential driver and receiver pair designed for bidirectional data communication on
multipoint bus transmission lines. The design provides for balanced transmission lines and meets
TIA/EIA-422-B and TIA/EIA-485-A, and CCITT recommendations V.10, V.11, X.26, and X.27.
The SN75ALS181 combines a 3-state differential line driver and a differential-input line receiver that operate
from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively,
that can be connected together externally to function as a direction control. The driver differential outputs and
the receiver differential inputs are connected to separate pins for greater flexibility and are designed to offer
minimum loading to the bus when the driver is disabled or VCC = 0. These ports feature wide positive and
negative common-mode voltage changes, making the device suitable for party-line applications.
ORDERING INFORMATION
0°C to 70°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
PDIP (N)
Tube of 25
SN75ALS181N
SOP (NS)
Reel of 2000
SN75ALS181NSR
TOP-SIDE
MARKING
SN75ALS181N
75ALS181
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
Function Tables
EACH DRIVER
OUTPUTS
INPUT
D
ENABLE
DE
H
H
H
L
L
H
L
H
X
L
Z
Z
Y
Z
EACH RECEIVER
DIFFERENTIAL
A–B
ENABLE
RE
OUTPUT
Y
VID ≥ 0.2 V
–0.2 V < VID < 0.2 V
L
H
L
?
VID ≤ –0.2 V
X
L
L
H
Z
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
DE
D
RE
R
2
4
9
5
Y
10 Z
3
2
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A
11 B
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SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
schematics of inputs
EQUIVALENT OF EACH DRIVER INPUT
TYPICAL OF RECEIVER INPUT
VCC
VCC
35 kΩ
NOM
17 kΩ
NOM
Input
Input
288 kΩ
NOM
1.7 kΩ
NOM
1.7 kΩ
NOM
VCC (A)
or
GND (B)
GND
schematics of outputs
TYPICAL OF DRIVER OUTPUT
TYPICAL OF RECEIVER OUTPUT
VCC
VCC
70 Ω
NOM
Output
Output
GND
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3
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, D, DE, and RE inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output voltage range, driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –9 V to 14 V
Input voltage range, receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V to 14 V
Receiver differential input voltage range (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V to 14 V
Package thermal impedance, θJA (see Notes 3 and 4): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
VCC
VOC
Supply voltage
Common-mode output voltage (see Note 5)
Driver
VIC
VIH
Common-mode input voltage (see Note 5)
Receiver
High-level input voltage
D, DE, and RE
VIL
VID
Low-level input voltage
D, DE, and RE
IOH
IOL
Differential input voltage
Driver
High level output current
High-level
Receiver
Driver
Low level output current
Low-level
Receiver
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
–7
12
V
–12
12
V
2
V
0.8
V
±12
V
–60
mA
–400
µA
60
8
mA
TA
Operating free-air temperature
0
70
°C
NOTE 5: The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this table for common-mode
output voltage level only.
4
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SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VO
Input clamp voltage
Output voltage
II = –18 mA
IO = 0
|VOD1|
Differential output voltage
IO = 0
|VOD2|
Differential output voltage
VCC = 5 V,,
RL = 100 Ω
MIN
TYP†
MAX
UNIT
–1.5
V
0
6
V
1.5
6
V
1/2 VOD1
See Figure 1
RL = 54 Ω
V
2
1.5
2.3
|VOD3|
Differential output voltage
Vtest = –7 V to 12 V,
See Figure 2
∆|VOD|
Change in magnitude of differential output
voltage (see Note 6)
RL = 54 Ω or 100 Ω,
See Figure 1
VOC
Common mode output voltage
Common-mode
RL = 54 Ω or 100 Ω
Ω,
See Figure 1
∆|VOC|
Change in magnitude of common-mode
output voltage (see Note 6)
RL = 54 Ω or 100 Ω,
See Figure 1
±0.2
V
IOZ
IIH
High-impedance-state output current
VO = –7 V to 12 V,
VIH = 2.4 V
See Note 7
±100
µA
20
µA
IIL
Low-level input current
VIL = 0.4 V
VO = –7 V
–100
µA
VO = VCC
VO = 12 V
250
IOS
High-level input current
Short circuit output current
Short-circuit
1.5
5
Supply current (total package)
V
±0.2
V
3
–1
V
–250
250
VO = 0 V
ICC
5
mA
–150
No load
Outputs enabled
21
30
Outputs disabled
14
21
mA
† All typical values are at VCC = 5 V and TA = 25°C.
NOTES: 6. ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high
level to a low level.
7. This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
9
13
20
ns
1
8
ns
UNIT
tdD
tsk(p)
Differential output delay time, tdDH or tdDL
RL = 54 Ω,
CL = 50 pF,
See Figure 3
Pulse skew (|tdDH – tdDL|)
RL = 54 Ω,
CL = 50 pF,
See Figure 3
tt
tPZH
Differential output transition time
RL = 54 Ω,
CL = 50 pF,
See Figure 3
10
16
ns
Output enable time to high level
RL = 110 Ω,
See Figure 4
36
53
ns
tPZL
tPHZ
Output enable time to low level
RL = 110 Ω,
See Figure 5
39
56
ns
Output disable time from high level
RL = 110 Ω,
See Figure 4
20
31
ns
RL = 110 Ω,
See Figure 5
9
20
ns
tPLZ
Output disable time from low level
† All typical values are at VCC = 5 V and TA = 25°C.
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3
5
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage, common-mode input
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going threshold voltage,
differential input
VO = 2.7 V,
IO = –0.4 mA
VT–
Negative-going threshold voltage,
differential input
VO = 0.5 V,
IO = 8 mA
Vhys
VIK
Input hysteresis (VT+ – VT–)
VOH
VOL
High-level output voltage
II = –18 mA
VID = 200 mV,
Low-level output voltage
VID = –200 mV,
IOZ
High-impedance-state output
current
VO = 0.4 V to 2.4 V
II
Line input current
Other input at 0 V,,
See Note 7
IIH
IIL
High-level input current, RE
ri
Input resistance
IOS
Short-circuit output current
VID = 200 mV,
ICC
Supply current (total package)
No load
Input clamp voltage, RE
Low-level input current, RE
MIN
TYP†
MAX
0.2
–0.2
mV
–1.5
See Figure 6
2.7
VI = 12 V
VI = –7 V
0.45
V
±20
µA
1
–0.8
VIH = 2.7 V
VIL = 0.4 V
mA
20
µA
–100
µA
–85
mA
12
kΩ
–15
Outputs disabled
V
V
See Figure 6
VO = 0 V
Outputs enabled
V
V
60
IOH = –400 µA,
IOL = 8 mA,
UNIT
21
30
14
21
mA
† All typical values are at VCC = 5 V and TA = 25°C.
NOTE 7: This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 15 pF (unless otherwise noted) (see Figure 7)
PARAMETER
TEST CONDITIONS
tPHL
tPLH
Propagation delay time, high- to low-level output
tsk(p)
tPZH
Pulse skew (|tPLH – tPHL|)
Output enable time to high level
tPZL
tPHZ
Output enable time to low level
Propagation delay time, low- to high-level output
VID = –1.5 V to 1.5 V
VID = –1.5 V to 1.5 V
VID = –1.5 V to 1.5 V
Output disable time from high level
tPLZ
Output disable time from low level
† All typical values are at VCC = 5 V and TA = 25°C.
6
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• DALLAS, TEXAS 75265
MIN
TYP†
MAX
10
16
25
ns
10
16
25
ns
1
8
ns
7
15
ns
9
19
ns
18
27
ns
10
15
ns
UNIT
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
RL
2
VOD2
RL
2
VOC
Figure 1. Driver Test Circuit, VOD and VOC
375 Ω
VOD3
60 Ω
Vtest
375 Ω
Figure 2. Driver Circuit, VOD3
3V
Input
Generator
(see Note A)
RL =
54 Ω
50 Ω
CL = 50 pF
(see Note B)
Output
1.5 V
1.5 V
tdDH
50%
Output
90%
10%
3V
tr
TEST CIRCUIT
0V
tdDL
≈2.5 V
50%
≈–2.5 V
tf
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 3. Driver Differential-Output Delay and Transition Times
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7
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
Output
3V
S1
0 V or 3 V
Generator
(see Note A)
1.5 V
Input
0V
RL =
110 Ω
CL= 50 pF
(see Note B)
50 Ω
1.5 V
tPZH
0.5 V
VOH
Output
2.3 V
tPHZ
TEST CIRCUIT
Voff ≈ 0 V
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 4. Driver Enable and Disable Times
5V
3V
RL = 110 Ω
S1
Input
1.5 V
1.5 V
Output
0V
0 V or 3 V
tPZL
Generator
(see Note A)
tPLZ
CL= 50 pF
(see Note B)
50 Ω
5V
Output
2.3 V
0.5 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 5. Driver Enable and Disable Times
VID
+IOL VOH
VOL
Figure 6. Receiver, VOH and VOL
8
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• DALLAS, TEXAS 75265
–IOH
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
3V
Input
Generator
(see Note A)
1.5 V
1.5 V
0V
Output
51 Ω
tPLH
1.5 V
CL = 15 pF
(see Note B)
tPHL
VOH
Output
1.3 V
1.3 V
0V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 7. Receiver Propagation-Delay Times
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9
SN75ALS181
DIFFERENTIAL DRIVER AND RECEIVER PAIR
SLLS152B – DECEMBER 1992 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
S1
1.5 V
2 kΩ
S2
–1.5 V
5V
CL = 15 pF
(see Note B)
Generator
(see Note A)
5 kΩ
1N916 or Equivalent
50 Ω
S3
TEST CIRCUIT
3V
Input
3V
S1 to 1.5 V
S2 Open
S3 Closed
1.5 V
Input
1.5 V
0V
0V
tPZH
tPZL
VOH
1.5 V
Output
S1 to –1.5 V
S2 Closed
S3 Open
≈4.5 V
Output
1.5 V
0V
VOL
3V
3V
Input
S1 to 1.5 V
S2 Open
S3 Closed
1.5 V
Input
1.5 V
0V
0V
tPHZ
tPLZ
≈1.3 V
VOH
Output
S1 to –1.5 V
S2 Closed
S3 Closed
0.5 V
Output
≈1.3 V
0.5 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tr ≤ 6 ns,
ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 8. Receiver Output Enable and Disable Times
10
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN75ALS181N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75ALS181NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75ALS181NSLE
OBSOLETE
SO
NS
14
TBD
Call TI
SN75ALS181NSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75ALS181NSRG4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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