VISHAY SI9130LG

Si9130
Vishay Siliconix
Pin-Programmable Dual Controller—Portable PCs
FEATURES
D Fixed 5-V and Programmable 3.3-V, 3.45 V, or 3.6 V Step-Down
Converters
D Less than 500-mA Quiescent Current per Converter
D 25-mA Shutdown Current
D 5.5-V to 30-V Operating Range
DESCRIPTION
The Si9130 Pin-programmable Dual Controller for Portable
PCs is a pin-programmable version of the Si786 dual-output
power supply controller for notebook computers. The Buck
controllers provide 5 V and a pin-programmable output delivering
3.3 V, 3.45 V, or 3.6 V.
The circuit is a system level integration of two step-down
controllers and micropower 5-V and 3.3-V linear regulators.
The controllers perform high efficiency conversion of the
battery pack energy (typically 12 V) or the output of an ac to dc
wall converter (typically 18-V to 24-V dc) to 5-V and 3.3-V
system supply voltages. The micropower linear regulator can
be used to keep power management and back-up circuitry
alive during the shutdown of the step-down converters.
A complete power conversion and management system can
be implemented with the Si9130 Pin-programmable Dual
Controller for Portable PCs, an inexpensive linear regulator,
the Si9140 SMP Controller for High Performance Processor
Power Supplies, five Si4410 n-channel TrenchFETr Power
MOSFETs, one Si4435 p-channel TrenchFET Power
MOSFET, and two Si9712 PC Card (PCMCIA) Interface
Switches.
The Si9130 is available in both standard and lead (Pb)-free
28-pin SSOP packages and specified to operate over the
commercial (0_C to 70_C) and extended commercial (−10_C
to 90_C) temperature ranges. See Ordering Information for
corresponding part numbers.
FUNCTIONAL BLOCK DIAGRAM
5.5 V to 30 V
SHUTDOWN
3.3 V
Si9130
Power
Section
5V
mP
Memory
Peripherals
5-V ON/OFF
3.3-V ON/OFF
SYNC
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
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Si9130
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V t0 36 V
REF, VL Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Momentary
PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "2 V
REF Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
VL to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V
VL Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
BST3, BST5 to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 36 V
Continuous Power Dissipation (TA = 70_C)a
28-Pin SSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 762 mW
LX3 to BST3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V to 0.3 V
Operating Temperature Range:
Si9130CG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70_C
Si9130LG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10_ to 90_C .
LX5 to BST5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V to 0.3 V
Inputs/Outputs to GND
(3.45ADJ, 3.6ADJ, SHDN, ON5, REF, SS5, CS5. FB5, SYNC, CS3, FB3, SS3,
ON3)) -0.3 V, (VL + 0.3 V)
Lead Temperature (soldering, 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 300_C
DL3, DL5 to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V, (VL + 0.3 V)
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 9.52 mW/_C above 70_C.
DH3 to LX3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V (BST3 + 0.3 )
DH5 to LX5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V (BST5 + 0.3 )
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied.
SPECIFICATIONS
Specific Test Conditions
PARAMETER
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX
LIMITS
MINA
TYPB
MAXA
UNIT
3.3-V and 5-V Step-Down Controllers
Input Supply Range
FB5 Output Voltage
5.5
0 mV < (CS5-FB5) < 70 mV, 6 V < V + < 30 V
(includes load and line regulation)
0 mV < (CS3-FB
FB3) <
70 mV
V
FB3 Output
p Voltage
g
30
4.80
5.08
5.20
3.6ADJ = 3.45ADJ = OPEN
3.17
3.35
3.46
3.6ADJ = OPEN
3.45ADJ = GND
3.32
3.50
3.60
3.6ADJ = GND
3.45ADJ = OPEN
3.46
3.65
3.75
6 V < V + < 30 V
(includes load and
line regulation)
V
Load Regulation
Either Controller (CS_ to FB_ = 0 to 70 mV)
2.5
%
Line Regulation
Either Controller (V+ = 6 V to 30 V)
0.03
%/V
Current-Limit Voltage
CS3-FB3 or CS5-FB5
SS3/SS5 Source Current
SS3/SS5 Fault Sink Current
80
100
120
2.5
4.0
6.5
2
mV
mA
mA
Internal Regulator and Reference
VL Output Voltage
VL Fault Lockout Voltage
VL/FB5 Switchover Voltage
REF Output Voltage
REF Fault Lockout Voltage
REF Load Regulation
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ON5 = ON3 = 0 V, 5.5 V < V+ < 30 V
0 mA < IL < 25 mA
4.5
5.5
Falling Edge, Hysteresis = 1%
3.6
4.2
Rising Edge of FB5, Hysteresis = 1%
4.2
4.7
3.24
3.36
2.4
3.2
No External
Loadc
Falling Edge
0 mA < IL < 5
mAd
30
75
V
mV
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
SPECIFICATIONS
Specific Test Conditions
PARAMETER
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX
LIMITS
MINA
TYPB
MAXA
UNIT
Internal Regulator and Reference (Cont’d)
V+ Shutdown Current
V+ Standby Current
Quiescent Power Consumption
(both PWM controllers on)
V+ Off Current
SHDN = ON3 = ON5 = 0 V, V+ = 30 V
25
40
ON3 = ON5 = 0 V, V+ = 30 V
70
110
FB5 = CS5 = 5.25 V
FB3 = CS3 = 3.5 V
5.5
8.6
mW
FB5 = CS5 = 5.25 V, VL Switched Over to FB5
30
60
mA
mA
Oscillator and Inputs/Outputs
Oscillator Frequency
SYNC = 3.3 V
270
300
330
SYNC = 0 V, 5 V
170
200
230
SYNC High Pulse Width
200
SYNC Low Pulse Width
200
SYNC Rise/Fall Time
Maximum Duty Cycle
Input Low Voltage
Input High Voltage
Input Current
ns
Not Tested
Oscillator SYNC Range
kHz
200
240
350
SYNC = 3.3 V
89
92
SYNC = 0 V, 5 V
92
95
SHDN, ON3, ON5 SYNC
kHz
%
0.8
SHDN, ON3, ON5
2.4
SYNC
VL - 0.5 V
V
SHDN, ON3, ON5 VIN = 0 V, 5 V
"1
DL3/DL5 Sink/Source Current
VOUT = 2 V
1
DH3/DH5 Sink/Source Current
BST3 - LX3 = BST5 - LX5 = 4.5 V, VOUT = 2 V
1
mA
A
DL3/DL5 On-Resistance
High or Low
7
DH3/DH5 On-Resistance
High or Low
BST3 - LX3 = BST5 - LX5 = 4.5 V
7
W
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The main switching outputs track the reference voltage. Loading the reference reduces the main outputs slightly according to the closed-loop gain (AVCL) and
the reference voltage load-regulation error. AVCL for the 3.3-V supply is unity gain. AVCL for the 5-V supply is 1.54.
d. Since the reference uses VL as its supply, its V+ line regulation error is insignificant.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
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Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Efficiency vs. 5-V Output Current, 200 kHz
Efficiency vs. 5-V Output Current, 300 kHz
100
100
VIN = 6 V
VIN = 6 V
90
VIN = 15 V
80
Efficiency (%)
Efficiency (%)
90
VIN = 30 V
70
VIN = 15 V
80
VIN = 30 V
70
SYNC = 0 V, 3.3 V Off
3.3 V Off
60
60
50
50
0.001
0.01
0.1
1
10
0.001
0.01
5-V Output Current (A)
0.1
1
10
5-V Output Current (A)
Efficiency vs. 3.3-V Output Current, 200 kHz
Efficiency vs. 3.3-V Output Current, 300 kHz
100
100
90
90
VIN = 6 V
80
Efficiency (%)
Efficiency (%)
VIN = 6 V
VIN = 15 V
VIN = 30 V
70
80
VIN = 15 V
VIN = 30 V
70
SYNC = 0 V, 5 V On
5 V On
60
60
50
50
0.001
0.01
0.1
1
10
0.001
0.01
3.3-V Output Current (A)
Quiescent Supply Current vs. Supply Voltage
25
20
ON3 = ON5 = High
15
10
5
0
10
0.4
0.3
ON3 = ON5 = 0 V
0.2
0.1
0.0
0
6
12
18
Supply Voltage (V)
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1
Standby Supply Current vs. Supply Voltage
0.5
Standby Supply Current (mA)
Quiescent Supply Current (mA)
30
0.1
3.3-V Output Current (A)
24
30
0
6
12
18
24
30
Supply Voltage (V)
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Minimum VIN to VOUT Differential
vs. 5-V Output Current
Shutdown Supply Current vs. Supply Voltage
1.0
Mimimum V IN to VOUT Differential (V)
Shutdown Supply Current ( m A)
100
SHDN = 0 V
75
50
25
0
5-V Output
Still Regulating
0.8
0.6
300 kHz
0.4
200 kHz
0.2
0.0
0
6
12
18
24
30
0.001
0.01
0.1
1
10
5-V Output Current (A)
Supply Voltage (V)
Switching Frequency vs. Load Current
1000.0
Switching Frequency (kHz)
SYNC = REF (300 kHz)
ON3 = ON5 = 5 V
100.0
10.0
5 V, VIN = 30 V
5 V, VIN = 7.5 V
1.0
3.3 V, VIN = 7.5 V
0.1
0.1
1
10
100
1000
Load Current (mA)
Pulse-Skipping Waveforms
Pulse-Width Modulation Mode Waveforms
5-V Output
50 mV/div
LX 10 V/div
2 V/div
5-V Output
50 mV/div
200 mS/div
ILoad = 100 mA
VIN = 10 V
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
500 ns/div
5-V Output Current = 1 A
VIN = 16 V
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Si9130
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
3.3-V Load-Transient Response
5-V Load-Transient Response
3A
3A
LOAD CURRENT
LOAD CURRENT
0A
0A
5-V Output
50 mV/div
200 mS/div
VIN = 15 V
200 mS/div
VIN = 15 V
5-V Line-Transient Response, Rising
5-V Line-Transient Response, Falling
5-V Output
50 mV/div
5-V Output
50 mV/div
VIN, 10 to 16 V
2 V/div
VIN, 16 to 10 V
2 V/div
20 mS/div
ILOAD = 2 A
20 mS/div
ILOAD = 2 A
3.3-V Line-Transient Response, Rising
3.3-V Line-Transient Response, Falling
20 mS/div
ILOAD = 2 A
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3.3-V Output
50 mV/div
3.3-V Output
50 mV/div
3.3-V Output
50 mV/div
VIN, 10 to 16 V
2 V/div
VIN, 16 to 10 V
2 V/div
20 mS/div
ILOAD = 2 A
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
PIN CONFIGURATION AND DESCRIPTION
CS3
1
28
FB3
SS3
2
27
DH3
ON3
3
26
LX3
NC
4
25
BST3
NC
5
24
DL3
Ordering Information
Standard
Part Number
NC
6
23
V+
Si9130CG
3.6ADJ
7
22
VL
Si9130CG-T1
3.45ADJ
8
21
FB5
Si9130LG
GND
9
20
PGND
Si9130LG-T1
SSOP-28
Lead (Pb)-Free
Part Number
Temperature
Range
Si9130CG-T1—E3
Si9130LG-T1—E3
VOUT
0 to 70_C
5 V and 3.3 V
3.45 V or 3.6 V
−10
10 to 90_C
REF
10
19
DL5
SYNC
11
18
BST5
SHDN
12
17
LX5
Demo Board
Temperature Range
Board Type
ON5
13
16
DH5
Si9130DB
0 to 70_C
Surface Mount
SS5
14
15
CS5
Top View
Pin
Symbol
1
CS3
Current-sense input for 3.3-V Buck controller—this pins over current threshold is 100 mV with respect to FB3.
2
SS3
Soft-start input for 3.3 V. Connect capacitor from SS3 to GND.
3
ON3
ON/OFF logic input disables the 3.3-V Buck controller. Connect directly to VL for automatic turn-on.
4
NC
Not internally connected.
5
NC
Not internally connected.
6
NC
Not internally connected.
7
3.6ADJ
Control input to select 3.6-V output. See Voltage Selection Table for input and output combinations.
8
3.45ADJ
Control input to select 3.45-V output. See Voltage Selection Table for input and output combinations.
9
GND
Analog ground.
10
REF
3.3-V reference output. Supplies external loads up to 5 mA.
11
SYNC
Oscillator control/synchronization input. Connect capacitor to GND, 1-mF/mA output or 0.22 mF minimum. For external clock
synchronization, a rising edge starts a new cycle to start. To use internal 200-kHz oscillator, connect to VL or GND. For 300-kHz
oscillator, connect to REF.
12
SHDN
Shutdown logic input, active low. Connect to VL for automatic turn-on. The 5-V VL supply will not be disabled in shutdown allowing
connection to SHDN.
13
ON5
ON/OFF logic input disables the 5-V Buck Controller. Connect to VL for automatic turn-on.
14
SS5
Soft-start control input for 5-V Buck controller. Connect capacitor from SS5 to GND.
15
CS5
Current-sense input for 5-V Buck controller—this pins over current threshold is 100 mV referenced to FB3.
16
DH5
Gate-drive output for the 5-V supply high-side n-channel MOSFET.
17
LX5
Inductor connection for the 5-V supply.
18
BST5
19
DL5
20
PGND
21
FB5
22
VL
5-V logic supply voltage for internal circuitry—able to source 5-mA external loads. VL remains on with valid voltage at V+.
23
V+
Supply voltage input.
24
DL3
Gate-drive output for the 3.3-V supply rectifying n-channel MOSFET.
25
BST3
26
LX3
Inductor connection for the 3.3-V supply.
27
DH3
Gate-drive output for the 3.3-V supply high-side n-channel MOSFET.
28
FB3
Feedback input for the 3.3-V Buck controller.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Description
Boost capacitor connection for the 5-V supply.
Gate-drive output for the 5-V supply rectifying n-channel MOSFET.
Power Ground.
Feedback input for the 5-V Buck controller.
Boost capacitor connection for the 3.3-V supply.
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Si9130
Vishay Siliconix
Voltage Selection Table
Input
Output
3.45ADJ
3.6ADJ
FB3
OPEN
OPEN
3.3 V
GND
OPEN
3.45 V
OPEN
GND
3.6 V
DESCRIPTION OF OPERATION
The Si9130 is a dual step-down converter, which takes a 5.5-V
to 30-V input and supplies power via two PWM controllers (see
Figure 1). These 5-V and 3.3-V supplies run on an optional
300-kHz or 200-kHz internal oscillator, or an external sync
signal. Amount of output current is limited by external
components, but can deliver greater than 6 A on either supply.
As well as these two main Buck controllers, additional loads
can be driven from two micropower linear regulators, one 5 V
(VL) and the other 3.3 V (REF)—see Figure 2. These supplies
are each rated to deliver 5 mA. If the linear regulator circuits fall
out of regulation, both Buck controllers are shut down.
3.3-V PWM Voltage Selection
(Pins 3.45ADJ, 3.6ADJ)
The voltage at this output can be selected to 3.3 V, 3.45 V or
3.6 V, depending on the configuration of pins 3.45ADJ and
3.6ADJ. Leaving both pins open results in 3.3V nominal
output. Grounding pin 3.45ADJ while leaving 3.6ADJ open
delivers 3.45-V nominal output. Grounding 3.6 ADJ while
leaving 3.45ADJ open sets a 3.6-V nominal output.
INPUT
5.5 V to 30 V
C1
22 mF
C10
22 mF
100 W
D2A
1N4148
D2B
1N4148
0.1 mF
+5 V at 5 mA
Si9130
C5
0.1 mF
N1
R1
25 mW
L1
10 mH
23
25
27
26
V+
BST3
VL
BST5
DH3
DH5
LX3
LX5
DL3
DL5
CS3
CS5
FB3
FB5
SS3
SS5
22
18
4.7 mF
C4
0.1 mF
16
N2
L2
10 mH
17
R2
25 mW
+3.3 V at 3 A
D1
D1FS4
C7
150 mF
C12
150 mF
N3
24
1
(Note 1)
C9
0.01 mF
+3.3 V ON/OFF
+5 V ON/OFF
SHUTDOWN
OSC SYNC
28
2
3
13
12
11
9
10
ON3
ON5
SHDN
SYNC
3.45ADJ
3.6ADJ
19
D1
D1FS4
N3
+5 V at 3 A
C6
330 mF
15
21
14
8
7
(Note 1)
C8
0.01 mF
3.45-V Voltage Adjust
3.6-V Voltage Adjust
GND
REF
PGND
20
+3.3 V at 5 mA
Note 1: Use short, Kelvin-connected PC board
traces placed very close to one another.
C3
1 mF
FIGURE 1. Si9130 Application Circuit
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Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
3.3-V Switching Supply
The 3.3-V supply is regulated by a current-mode PWM
controller in conjunction with several externals: two n-channel
MOSFETs, a rectifier, an inductor and output capacitors (see
Figure 1). The gate drive supplied by DH3 needs to be greater
than VL , so it is provided by the bootstrap circuit consisting of
a 100-nF capacitor and diode connected to BST3.
at power-on are avoided, and power-supplies can be
sequenced with different turn-on delay times by selecting the
correct capacitor value.
5-V Switching Supply
A low-side switching MOSFET connected to DL3 increases
efficiency by reducing the voltage across the rectifier diode. A
low value sense resistor in series with the inductor sets the
maximum current limit, to disallow current overloads at
power-on or in short-circuit situations.
The 5-V supply is regulated by a current-mode PWM controller
which is nearly the same as the 3.3-V output. The dropout
voltage across the 5-V supply, as shown in the schematic in
Figure 1, is 400 mV (typ) at 2 A. If the voltage at V+ falls, nearing
5 V, the 5-V supply will lower as well, until the VL linear regulator
output falls below the 4-V undervoltage lockout threshold.
Below this threshold, the 5-V controller is shut off.
The soft-start feature on the Si9130 is capacitor
programmable; pin SS3 functions as a constant current source
to the external capacitor connected to GND. Excess currents
The frequency of both PWM controllers is set at 300 kHz when
the SYNC pin is tied to REF. Connecting SYNC to either GND
or VL sets the frequency at 200 kHz.
V+
VL
3.45ADJ
3.6ADJ
REF
FB3
+5-V LDO
Linear
Regulator
CS3
3.3-V
PWM
Controller
(See Figure 3)
+3.3-V
Reference
ON
DH3
LX3
DL3
ON
4.5 V
SHDN
BST3
SS3
PGND
4V
ON3
FB5
CS5
2.8 V
SYNC
300 kHz/200 kHz
ON
Oscillator
STANDBY
5-V
PWM
Controller
(See Figure 3)
BST5
DH5
LX5
DL5
ON
SS5
ON5
FIGURE 2. Si9130 Block Diagram
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
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Si9130
Vishay Siliconix
CS_
1X
REF,
3.3 V
(or Internal
5-V Reference)
60 kHz
LPF
FB_
Summing
Comparator
R
S
BST_
Level
Shift
Q
DH_
LX_
OSC
Slope
Comp
25 mV
Minimum Current
(Pulse-Skipping Mode)
VL
Current
Limit
4 mA
ShootThrough
Control
0 mV to
100 mV
SS_
30R
ON_
3.3 V
1R
Synchronous
Rectifier Control
R
S
VL
Level
Shift
Q
DL_
PGND
FIGURE 3. Si9130 Controller Block Diagram
3.3-V and 5-V Switching Controllers
Each PWM controller on the Si9130 is identical with the exception
of the preset output voltages. The controllers only share three
functional blocks (see Figure 3): the oscillator, the voltage
reference (REF) and the 5-V logic supply (VL). The 3.3-V and 5-V
controllers are independently enabled with pins ON3 and ON5,
respectively. The PWMs are a direct-summing type, without the
typical integrating error amplifier along with the phase shift which
is a side effect of this type of topology. Feedback compensation
is not needed, as long as the output capacitance and its ESR
requirements are met, according to the Design Considerations
section of this data sheet.
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The main PWM comparator is an open loop device which is
comprised of three comparators summing four signals: the
feedback voltage error signal, current sense signal,
slope-compensation ramp and voltage reference as shown in
Figure 3. This method of control comes closer to the ideal of
maintaining the output voltage on a cycle-by-cycle basis.
When the load demands high current levels, the controller is in
full PWM mode. Every cycle from the oscillator asserts the
output latch and drives the gate of the high-side MOSFET for
a period determined by the duty cycle (approximately
VOUT/VIN
100%) and the frequency.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
The high-side switch turns off, setting the synchronous rectifier
latch and 60 ns later, the rectifier MOSFET turns on. The low-side
switch stays on until the start of the next clock cycle in continuous
mode, or until the inductor current becomes positive again, in
discontinuous mode. In over-current situations, where the
inductor current is greater than the 100-mV current-limit threshold,
the high-side latch is reset and the high-side gate drive is shut off.
During low-current load requirements, the inductor current will not
deliver the 25-mV minimum current threshold. The Minimum
Current comparator signals the PWM to enter pulse-skipping
mode when the threshold has not been reached. pulse-skipping
mode skips pulses to reduce switching losses, the losses which
decrease efficiency the most at light load. Entering this mode
causes the minimum current comparator to reset the high-side
latch at the beginning of each oscillator cycle.
Soft-Start
To slowly bring up the 3.3-V and 5-V supplies, connect capacitors
from SS3 and SS5 to GND. Asserting ON3 or ON5 starts a 4-A
constant current source to charge these capacitors to 4 V. As the
voltage on these pins ramps up, so does the current limit
comparator threshold, to increase the duty cycle of the MOSFETs
to their maximum level. If ON3 or ON5 are left low, the respective
capacitor is discharged to GND. Leaving the SS3 or SS5 pins
open will cause either controller to reach the terminal over-current
level within 10 ms.
Soft start helps prevent current spikes at turn-on and allows
separate supplies to be delayed using external programmability.
Shoot-through current is the result when both the high-side and
rectifying MOSFETs are turned on at the same time.
Break-before-make timing internal to the Si9130 manages this
potential problem. During the time when neither MOSFET is on,
the Schottky is conducting, so that the body diode in the low-side
MOSFET is not forced to conduct.
Synchronous rectification is always active when the Si9130 is
powered-up, regardless of the operational mode.
Gate-Driver Boost
The high-side n-channel drive is supplied by a flying-capacitor
boost circuit (see Figure 4). The capacitor takes a charge from
VL and then is connected from gate to source of the high-side
MOSFET to provide gate enhancement. At power-up, the
low-side MOSFET pulls LX_ down to GND and charges the
BST_ capacitor connected to 5 V. During the second half of the
oscillator cycle, the controller drives the gate of the high-side
MOSFET by internally connecting node BST_ to DH_. This
supplies a voltage 5 V higher than the battery voltage to the gate
of the high-side MOSFET.
Oscillations on the gates of the high-side MOSFET in
discontinuous mode are a natural occurrence caused by the LC
network formed by the inductor and stray capacitance at the LX_
pins. The negative side of the BST_ capacitor is connected to the
LX_ node, so ringing at the inductor is translated through to the
gate drive.
BATTERY
INPUT
Synchronous Rectifiers
Synchronous rectification replaces the Schottky rectifier with a
MOSFET, which can be controlled to increase the efficiency of the
circuit.
When the high-side MOSFET is switched off, the inductor will try
to maintain its current flow, inverting the inductor’s polarity. The
path of current then becomes the circuit made of the Schottky
diode, inductor and load, which will charge the output capacitor.
The diode has a 0.5-V forward voltage drop, which contributes a
significant amount of power loss, decreasing efficiency. A
low-side switch is placed in parallel with the Schottky diode and
is turned on just after the diode begins to conduct. Because the
rDS(ON) of the MOSFET is low, the I*R voltage drop will not be as
large as the diode, which increases efficiency.
The low-side rectifier is shut off when the inductor current drops
to zero.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
VL
VL
BST_
Level
Translator
PWM
DH_
LX_
VL
DL_
FIGURE 4. Boost Supply for Gate Drivers
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11
Si9130
Vishay Siliconix
OPERATIONAL MODES
PWM Mode
The 3.3-V and 5-V Buck controllers operate in continuous-current
PWM mode when the load demands more than approximately
25% of the maximum current (see typical curves). The duty cycle
can be approximated as Duty_Cycle = VOUT/VIN.
In this mode, the inductor current is continuous; in the first half of
the cycle, the current slopes up when the high-side MOSFET
conducts and then, in the second half, slopes back down when
the inductor is providing energy to the output capacitor and load.
As current enters the inductor in the first half-cycle, it is also
continuing through to the load; hence, the load is receiving
continuous current from the inductor. By using this method, output
ripple is minimized and smaller form-factor inductors can be used.
The output capacitor’s ESR has the largest effect on output ripple.
It is typically under 50mV; the worst case condition is under light
load with higher input battery voltage.
Pulse-Skipping Mode
When the load requires less than 25% of its maximum, the
Si9130 enters a mode which drives the gate for one clock cycle
and skips the majority of the remaining cycles. Pulse-skipping
mode cuts down on the switching losses, the dominant power
consumer at low current levels.
In the region between pulse-skipping mode and PWM mode, the
controller may transition between the two modes, delivering
spurts of pulses. This may cause the current waveform to look
irregular, but will not overly affect the ripple voltage. Even in this
transitioning mode efficiency will stay high.
Current Limit
The current through an external resistor, is constantly monitored
to protect against over-current. A low value resistor is placed in
series with the inductor. The voltage across it is measured by
connecting it between CS_ and FB_. If this voltage is larger than
100 mV, the high-side MOSFET drive is shut down. Eliminating
over-currents protects the MOSFET, the load and the power
source. Typical values for the sense resistors with a 3-A load will
be 25 mW.
The SYNC pin can be driven with an external CMOS level signal
with frequency from 240 kHz and 350 kHz to synchronize to the
internal oscillator. Tying SYNC to either VL or GND sets the
frequency to 200 kHz and to REF sets the frequency to 300 kHz.
Operation at 300 kHz is typically used to minimize output passive
component sizes. Slower switching speeds of 200 kHz may be
needed for lower input voltages.
Internal VL and REF
A 5-V linear regulator supplies power to the internal logic circuitry.
The regulator is available for external use from pin VL , able to
source 5 mA. A 4.7-mF capacitor should be connected between
VL and GND. To increase efficiency, when the 5-V switching
supply has voltage greater than 4.5 V, VL is internally switched
over to the output of the 5-V switching supply and the linear
regulator is turned off.
The 5-V linear regulator provides power to the internal 3.3-V
bandgap reference (REF). The 3.3-V reference can supply 5 mA
to an external load, connected to pin REF. Between REF and
GND connect a capacitor, 0.22 mF plus 1 mF per mA of load
current. The switching outputs will vary with the reference;
therefore, placing a load on the REF pin will cause the main
outputs to decrease slightly, within the specified regulation
tolerance.
VL and REF supplies stay on as long as V+ is greater than 4.5
V, even if the switching supplies are not enabled. This feature is
necessary when using the micropower regulators to keep
memory alive during shutdown.
Both linear regulators can be connected to their respective
switching supply outputs. For example, REF would be tied to the
output of the 3.3 V and VL to 5 V. This will keep the main supplies
up in standby mode, provided that each load current in shutdown
is not larger than 5 mA.
Fault Protection
Oscillator and SYNC
There are two ways to set the Si9130 oscillator frequency: by
using an external SYNC signal, or using the internal oscillator.
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12
The 3.3-V and 5-V switching controllers are shut down when one
of the linear regulators drops below 85% of its nominal value; that
is, shut down will occur when VL < 4.0 V or REF < 2.8 V.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
Si9130
Vishay Siliconix
DESIGN CONSIDERATIONS
Inductor Design
CF u
Three specifications are required for inductor design: inductance
(L), peak inductor current (ILPEAK), and coil resistance (RL). The
equation for computing inductance is:
L+
ǒV OUTǓǒVIN(MAX)–VOUTǓ
ǒVIN(MAX)Ǔ(f)ǒIOUTǓ(LIR)
Where:
VREF
ǒVOUTǓǒRCSǓ(2)(p)(GPWP)
and,
ESRCF t
Where:
VOUT = Output voltage (3.3 V or 5 V);
VIN(MAX) = Maximum input voltage (V);
f = Switching frequency, normally
300 kHz;
IOUT = Maximum dc load current (A);
LIR = Ratio of inductor pea-to-peak ac current to
average dc load current, typically 0.3.
ǒVOUTǓǒRCSǓ
VREF
CF = Output filter capacitance (F)
VREF = Reference voltage, 3.3 V;
VOUT = Output voltage, 3.3 V or 5 V;
RCS = Sense resistor (W);
GBWP = Gain-bandwidth product, 60 kHz;
ESRCF = Output filter capacitor ESR (W).
Both minimum capacitance and maximum ESR requirements
must be met. In order to get the low ESR, a capacitance value two
to three times greater than the required minimum may be
necessary.
The equation for output ripple in continuous current mode is:
When LIR is higher, smaller inductance values are acceptable, at
the expense of increased ripple and higher losses.
The peak inductor current (ILPEAK) is equal to the steady-state
load current (IOUT) plus one half of the peak-to-peak ac current
(ILPP). Typically, a designer will select the ac inductor current to be
30% of the steady-state current, which gives ILPEAK equal to 1.15
times IOUT .
The equation for computing peak inductor current is:
I LPEAK + I
OUT
)
ǒV OUTǓǒV IN(MAX)–V OUTǓ
ǒ
Ǔ
(2)(f)(L) V IN(MAX)
VOUT(RPL) + ILPP(MAX)
ǒESR
CF )
Ǔ
1
f CF)
(2
The equations for capacitive and resistive components of the
ripple in pulse-skipping mode are:
VOUT(RPL)(C) +
(4)ǒ10–4Ǔ(L)
ǒRCS 2ǓǒC FǓ
VOUT(RPL)(R) +
ǒ
Ǔ
1
1 )
Volts
VOUT VIN–V OUT
(0.02)ǒESRCFǓ
Volts
R CS
The total ripple, VOUT(RPL) , can be approximated
as follows:
if VOUT(RPL)(R) < 0.5 VOUT(RPL)(C),
then VOUT(RPL) = VOUT(RPL)(C),
otherwise, VOUT(RPL) = VOUT(RPL)(C) +
VOUT(RPL)(R).
OUTPUT CAPACITORS
Lower Voltage Input
The output capacitors determine loop stability and ripple voltage
at the output. In order to maintain stability, minimum capacitance
and maximum ESR requirements must be met according to the
following equations:
The application circuit shown here can be easily modified to work
with 5.5-V to 12-V input voltages. Oscillation frequency should be
set at 200 kHz and increase the output capacitance to 660 mF on
the 5-V output to maintain stable performance up to 2 A of load
current. Operation on the 3.3-V supply will not be affected by this
reduced input voltage.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04
www.vishay.com
13