LINER LTC1877EMS8

Final Electrical Specifications
LTC1877
High Efficiency
Monolithic Synchronous
Step-Down Regulator
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DESCRIPTION
FEATURES
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The LTC ®1877 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current
mode architecture. Supply current during operation is
only 10µA and drops to < 1µA in shutdown. The 2.65V to
10V input voltage range makes the LTC1877 ideally suited
for both single and dual Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation,
extending battery life in portable systems.
High Efficiency: Up to 95%
Very Low Quiescent Current: Only 10µA
During Operation
600mA Output Current at VIN = 5V
2.65V to 10V Input Voltage Range
550kHz Constant Frequency Operation
Synchronizable from 400kHz to 700kHz
Selectable Burst ModeTM Operation/
Pulse Skipping Mode
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
0.8V Reference Allows Low Output Voltages
Shutdown Mode Draws < 1µA Supply Current
±2% Output Voltage Accuracy
Current Mode Control for Excellent Line and
Load Transient Response
Overcurrent and Overtemperature Protected
Available in 8-Lead MSOP Package
Switching frequency is internally set at 550kHz, allowing
the use of small surface mount inductors and capacitors.
For noise sensitive applications the LTC1877 can be
externally synchronized from 400kHz to 700kHz. Burst
Mode operation is inhibited during synchronization or
when the SYNC/MODE pin is pulled low, preventing low
frequency ripple from interfering with audio circuitry.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.8V feedback reference voltage. The LTC1877 is available in a
space saving 8-lead MSOP package. Lower input voltage
applications (less than 7V abs max) should refer to the
LTC1878 data sheet.
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APPLICATIONS
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Cellular Telephones
Wireless Modems
Personal Information Appliances
Portable Instruments
Distributed Power Systems
Battery-Powered Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATION
Efficiency vs Output Current
100
95
High Efficiency Step-Down Converter
7
10µF**
CER
6
1
2
SW
SYNC
VIN
5
20pF
RUN
ITH
GND
+
VOUT†
3.3V
47µF***
LTC1877
VFB
3
887k
VIN = 10V
85
80
75
VIN = 7.2V
VIN = 5V
70
65
280k
220pF
VIN = 3.6V
90
10µH*
EFFICIENCY (%)
VIN
2.65V
TO 10V
May 2000
60
4
VOUT = 3.3V
L = 10µH
Burst Mode OPERATION
55
*TOKO D62CB A920CY-100M
**TAIYO-YUDEN CERAMIC LMK325BJ106MN
***SANYO POSCAP 6TPA47M
†
VOUT CONNECTED TO VIN FOR 2.65V < VIN < 3.3V
50
0.1
1877 TA01
1.0
100
10
OUTPUT CURRENT (mA)
1000
1877 • TA02
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1877
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PACKAGE/ORDER INFORMATION
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(Note 1)
Input Supply Voltage (VIN).........................– 0.3V to 12V
ITH, PLL LPF Voltage ................................– 0.3V to 2.7V
RUN, VFB Voltages ...................................... – 0.3V to VIN
SYNC/MODE Voltage .................................. – 0.3V to VIN
SW Voltage ................................... – 0.3V to (VIN + 0.3V)
P-Channel MOSFET Source Current (DC) ........... 800mA
N-Channel MOSFET Sink Current (DC) ............... 800mA
Peak SW Sink and Source Current ........................ 1.5A
Operating Ambient Temperature Range
Extended Commercial (Note 2) ........... – 40°C to 85°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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ABSOLUTE MAXIMUM RATINGS
ORDER PART
NUMBER
TOP VIEW
RUN
ITH
VFB
GND
1
2
3
4
8
7
6
5
PLL LPF
SYNC/MODE
VIN
SW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 150°C/ W
LTC1877EMS8
MS8 PART MARKING
LTLU
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 5V unless otherwise specified.
SYMBOL
IVFB
PARAMETER
Feedback Current
CONDITIONS
(Note 4)
●
MIN
TYP
4
MAX
30
UNITS
nA
VFB
Regulated Output Voltage
(Note 4) 0°C ≤ TA ≤ 85°C
(Note 4) –40°C ≤ TA ≤ 85°C
●
0.784
0.74
0.8
0.8
0.816
0.84
V
V
∆VOVL = VOVL – VFB
●
20
50
110
mV
0.05
0.15
%/V
0.1
– 0.1
0.5
– 0.5
%
%
10
V
230
10
0
350
15
1
µA
µA
µA
550
80
605
kHz
kHz
700
kHz
10
–10
20
–20
µA
µA
∆VOVL
Output Overvoltage Lockout
∆VFB
Reference Voltage Line Regulation
VIN = 2.65V to 10V (Note 4)
VLOADREG
Output Voltage Load Regulation
Measured in Servo Loop; VITH = 0.9V to 1.2V
Measured in Servo Loop; VITH = 1.6V to 1.2V
VIN
Input Voltage Range
IQ
Input DC Bias Current
Pulse Skipping Mode
Burst Mode Operation
Shutdown
(Note 5)
2.65V < VIN < 10V, VSYNC/MODE = 0V, IOUT =0A
VSYNC/MODE = VIN, IOUT =0A
VRUN = 0V, VIN = 10V
fOSC
Oscillator Frequency
VFB = 0.8V
VFB = 0V
fSYNC
SYNC Capture Range
IPLL LPF
Phase Detector Output Current
Sinking Capability
Sourcing Capability
fPLLIN < fOSC
fPLLIN > fOSC
RPFET
RDS(ON) of P-Channel MOSFET
ISW = 100mA
0.65
0.85
Ω
RNFET
RDS(ON) of N-Channel MOSFET
ISW = –100mA
0.75
0.95
Ω
2
●
●
●
2.65
495
400
●
●
3
–3
LTC1877
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 5V unless otherwise specified.
SYMBOL
IPK
PARAMETER
Peak Inductor Current
CONDITIONS
VFB = 0.7V, Duty Cycle < 35%
MIN
0.8
ILSW
SW Leakage
VRUN = 0V, VSW = 0V or 8.5V, VIN = 8.5V
VSYNC/MODE SYNC/MODE Threshold
ISYNC/MODE
SYNC/MODE Leakage Current
VRUN
RUN Threshold
IRUN
RUN Input Current
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1877 is guaranteed to meet specified performance from 0°C
to 70°C. Specifications over the – 40°C to 85°C operating temperature range
are assured by design, characterization and correlation with statistical process
controls.
●
0.2
●
0.2
TYP
1.0
MAX
1.25
UNITS
A
±0.01
±1
µA
1.0
1.5
V
±0.01
±1
µA
0.7
1.5
V
±0.01
±1
µA
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC1877EMS8: TJ = TA + (PD)(150°C/W)
Note 4: The LTC1877 is tested in a feedback loop which servos VFB to the
balance point for the error amplifier (VITH = 1.2V).
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Output Current
Efficiency vs Input Voltage
ILOAD = 100mA I
LOAD = 10mA
95
90
80
85
70
ILOAD = 300mA
80
ILOAD = 1mA
75
70
ILOAD = 0.1mA
65
60
2
6
8
4
INPUT VOLTAGE (V)
VIN = 3.6V
90
VIN = 7.2V
85
VIN = 7.2V
VIN = 3.6V
50
40
PULSE SKIPPING MODE
Burst Mode OPERATION
10
10
12
1877 • G01
0
0.1
VOUT = 2.5V
L = 10µH
1.0
100
10
OUTPUT CURRENT (mA)
1000
1877 • G02
L = 15µH
L = 10µH
80
75
70
65
20
50
0
60
30
VOUT = 2.5V
L = 10µH
Burst Mode OPERATION
55
Efficiency vs Output Current
95
90
EFFICIENCY (%)
EFFICIENCY (%)
100
EFFICIENCY (%)
100
60
55
0.1
VIN = 10V
VOUT = 3.3V
Burst Mode OPERATION
1.0
100
10
OUTPUT CURRENT (mA)
1000
1877 • G03
3
LTC1877
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TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage vs
Temperature
Efficiency vs Output Current
Oscillator Frequency vs
Temperature
605
0.814
95
VIN = 5V
VIN = 3.6V
90
EFFICIENCY (%)
VIN = 10V
VIN = 5V
75
70
65
60
50
0.1
0.799
0.794
2.52
585
2.51
50
25
75
0
TEMPERATURE (°C)
100
565
555
545
535
525
PULSE SKIPPING MODE
VIN = 4.2V
L = 10µH
200
600
400
LOAD CURRENT (mA)
0
300
PULSE SKIPPING MODE
VOUT = 1.8V
150
100
50
100
125
1877 • G10
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
PULSE SKIPPING MODE
200
150
100
50
Burst Mode OPERATION
BURST MODE OPERATION
0
50
25
75
0
TEMPERATURE (°C)
2
VIN = 5V
250
200
SUPPLY CURRENT (µA)
DC SUPPLY CURRENT (µA)
1.2
SYNCHRONOUS SWITCH
MAIN SWITCH
1
DC Supply Current vs
Temperature
250
0.6
0
1877 • G09
DC Supply Current vs Input
Voltage
1.4
RDS(ON) (Ω)
0
800
1877 • G08
RDS(ON) vs Temperature
0.2
–50 –25
MAIN SWITCH
0.2
1877 • G07
0.4
0.6
0.4
2.43
VIN = 5V
SYNCHRONOUS
SWITCH
0.8
2.46
12
125
1.0
2.47
2.44
0.8
100
RDS(ON) vs Input Voltage
2.48
505
VIN = 3V
25
50
75
0
TEMPERATURE (°C)
1.2
2.49
2.45
1.0
–25
1877 • G06
2.50
515
4
495
–50
125
RDS(ON) (Ω)
575
OUTPUT VOLTAGE (V)
OSCILLATOR FREQUENCY (kHz)
595
10
535
Output Voltage vs Load Current
2.53
6
8
4
SUPPLY VOLTAGE (V)
545
1877 • G05
605
2
555
505
Oscillator Frequency vs Supply
Voltage
0
565
515
1877 • G04
495
575
525
0.784
–50 –25
1000
1.0
100
10
OUTPUT CURRENT (mA)
0.804
0.789
L = 10µH
VOUT = 2.5V
55
585
FREQUENCY (kHz)
VIN = 7.2V
80
REFERENCE VOLTAGE (V)
0.809
85
VIN = 5V
595
0
2
6
4
INPUT VOLTAGE (V)
8
10
1877 • G11
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
1877 G19
LTC1877
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TYPICAL PERFORMANCE CHARACTERISTICS
Switch Leakage vs Temperature
16
VIN = 10V
RUN = 0V
1000
MAIN SWITCH
800
600
400
SYNCHRONOUS
SWITCH
SW
5V/DIV
12
10
6
4
IL
200mA/DIV
2
50
25
75
0
TEMPERATURE (°C)
100
VOUT
20mV/DIV
AC COUPLED
SYNCHRONOUS
SWITCH
8
200
0
–50 –25
RUN = 0V
14
SWITCH LEAKAGE (nA)
SWITCH LEAKAGE (nA)
1200
Burst Mode Operation
Switch Leakage vs Input Voltage
1400
MAIN SWITCH
0
125
2
0
1877 • G12
4
6
INPUT VOLTAGE (V)
8
10
1877 • G13
VIN = 5V
VOUT = 1.5V
CIN = 10µF
10µs/DIV
L = 10µH
COUT = 47µF
ILOAD = 50mA
1877 • G14
Load Step Response
Start-Up from Shutdown
RUN
5V/DIV
VOUT
50mV/DIV
AC COUPLED
VOUT
1V/DIV
IL
500mA/DIV
IL
500mA/DIV
ITH
1V/DIV
50µs/DIV
VIN = 5V
VOUT = 1.5V
L = 10µH
VIN = 5V
VOUT = 1.5V
L = 10µH
CIN = 10µF
COUT = 47µF
ILOAD = 500mA
1877 • G15
40µs/DIV
CIN = 10µF
COUT = 47µF
ILOAD = 50mA TO 500mA
PULSE SKIPPING MODE
1877 • G16
Load Step Response
Load Step Response
VOUT
50mV/DIV
AC COUPLED
VOUT
50mV/DIV
AC COUPLED
IL
500mA/DIV
IL
500mA/DIV
10µs/DIV
ITH
1V/DIV
ITH
1V/DIV
VIN = 5V
VOUT = 1.5V
L = 10µH
40µs/DIV
CIN = 10µF
COUT = 47µF
ILOAD = 50mA TO 500mA
Burst Mode OPERATION
1877 • G17
VIN = 5V
VOUT = 1.5V
L = 10µH
20µs/DIV
CIN = 10µF
COUT = 47µF
ILOAD = 200mA TO 500mA
PULSE SKIPPING MODE
1877 • G18
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LTC1877
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PIN FUNCTIONS
RUN (Pin 1): Run Control Input. Forcing this pin below
0.4V shuts down the LTC1877. In shutdown all functions
are disabled drawing <1µA supply current. Forcing this pin
above 1.2V enables the LTC1877. Do not leave RUN
floating.
ITH (Pin 2): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.5V
to 1.9V.
VFB (Pin 3): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 4): Ground Pin.
SW (Pin 5): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchronous power MOSFET switches.
VIN (Pin 6): Main Supply Pin. Must be closely decoupled
to GND, Pin 4.
SYNC/MODE (Pin 7): External Clock Synchronization and
Mode Select Input. To synchronize with an external clock,
apply a clock with a frequency between 400kHz and
700kHz. To select Burst Mode operation, tie to VIN. Grounding this pin selects pulse skipping mode. Do not leave this
pin floating.
PLL LPF (Pin 8): Output of the Phase Detector and Control
Input of Oscillator. Connect a series RC lowpass network
from this pin to ground if externally synchronized. If
unused, this pin may be left open.
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FUNCTIONAL DIAGRA
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VIN
BURST
DEFEAT
PLL LPF
Y
Y = “0” ONLY WHEN X IS A CONSTANT “1”
X
8
SLOPE
COMP
SYNC/MODE
7
0.8V
VCO
OSC
0.6V
3
VFB
–
6 VIN
FREQ
SHIFT
+
–
+
0.45V
– EA
gm = 0.5m
Ω
0.8V REF
EN
SLEEP
–
+
VIN
S
Q
R
Q
RS LATCH
6Ω
+
ICOMP
BURST
VIN SLEEP
2 ITH
VIN
RUN
1
–
+
VREF
0.8V
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI
SHOOTTHRU
5 SW
–
OVDET
SHUTDOWN
+
+
0.85V
IRCMP
4 GND
–
1877 BD
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LTC1877
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OPERATIO (Refer to Functional Diagram)
Main Control Loop
The LTC1877 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel MOSFET)
and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the current comparator,
ICOMP, resets the RS latch. The peak inductor current at
which ICOMP resets the RS latch is controlled by the voltage
on the ITH pin, which is the output of error amplifier EA. The
VFB pin, described in the Pin Functions section, allows EA
to receive an output feedback voltage from an external
resistive divider. When the load current increases, it
causes a slight decrease in the feedback voltage relative to
the 0.8V reference, which in turn, causes the ITH voltage to
increase until the average inductor current matches the
new load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse as indicated by the current reversal
comparator IRCMP, or the beginning of the next clock
cycle.
Comparator OVDET guards against transient overshoots
> 6.25% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
The LTC1877 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand. To enable Burst Mode operation, simply
tie the SYNC/MODE pin to VIN or connect it to a logic high
(VSYNC/MODE > 1.5V). To disable Burst Mode operation
and enable PWM pulse skipping mode, connect the SYNC/
MODE pin to GND. In this mode, the efficiency is lower at
light loads, but becomes comparable to Burst Mode
operation when the output load exceeds 50mA. The advantage of pulse skipping mode is lower output ripple and
less interference to audio circuitry.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 250mA,
even though the voltage at the ITH pin indicates a lower
value. The voltage at the ITH pin drops when the inductor’s
average current is greater than the load requirement. As
the ITH voltage drops below approximately 0.45V, the
BURST comparator trips, causing the internal sleep line
to go high and forces off both power MOSFETs. The ITH pin
is then disconnected from the output of the EA amplifier
and parked a diode voltage above ground.
In sleep mode, both power MOSFETs are held off and a
majority of the internal circuitry is partially turned off,
reducing the quiescent current to 10µA. The load current
is now being supplied solely from the output capacitor.
When the output voltage drops, the ITH pin reconnects to
the output of the EA amplifier and the top MOSFET is again
turned on and this process repeats.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 80kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the
inductor current has ample time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 550kHz (or the synchronized frequency)
when VFB rises above 0.3V.
Frequency Synchronization
A phase-locked loop (PLL) is available on the LTC1877 to
allow the internal oscillator to be synchronized to an
external source connected to the SYNC/MODE pin. The
output of the phase detector at the PLL LPF pin operates
over a 0V to 2.4V range corresponding to 400kHz to
700kHz. When locked, the PLL aligns the turn-on of the top
MOSFET to the rising edge of the synchronizing signal.
When the LTC1877 is clocked by an external source, Burst
Mode operation is disabled; the LTC1877 then operates in
PWM pulse skipping mode. In this mode, when the output
load is very low, current comparator ICOMP may remain
tripped for several cycles and force the main switch to stay
off for the same number of cycles. Increasing the output
load slightly allows constant frequency PWM operation to
resume. This mode exhibits low output ripple as well as
low audio noise and reduced RF interference while providing reasonable low current efficiency.
Frequency synchronization is inhibited when the feedback
voltage VFB is below 0.6V. This prevents the external clock
from interfering with the frequency foldback for shortcircuit protection.
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LTC1877
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OPERATIO
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage
forces the main switch to remain on for more than one
cycle until it reaches 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the internal P-channel MOSFET and
the inductor.
Low Supply Operation
The LTC1877 is designed to operate down to an input
supply voltage of 2.65V although the maximum allowable
output current is reduced at this low voltage. Figure 1
shows the reduction in the maximum output current as a
function of input voltage for various output voltages.
VOUT = 2.5V
MAX OUTPUT CURRENT (mA)
1000
VOUT = 1.5V
800
VOUT = 5V
600
VOUT = 3.3V
400
200
L = 10µH
0
0
2
4
6
VIN (V)
8
10
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. As a result, the
maximum inductor peak current is reduced for duty cycles
> 40%. This is shown in the decrease of the inductor peak
current as a function of duty cycle graph in Figure 2.
MAXIMUM INDUCTOR PEAK CURRENT (mA)
1200
Another important detail to remember is that at low input
supply voltages, the RDS(ON) of the P-channel switch
increases. Therefore, the user should calculate the power
dissipation when the LTC1877 is used at 100% duty cycle
with a low input voltage (see Thermal Considerations in
the Applications Information section).
1100
VIN = 5V
1000
900
800
700
600
12
0
1877 • F01
20
60
40
DUTY CYCLE (%)
80
100
1877 F02
Figure 1. Maximum Output Current vs Input Voltage
Figure 2. Maximum Inductor Peak Current vs Duty Cycle
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APPLICATIONS INFORMATION
The basic LTC1877 application circuit is shown on the first
page. External component selection is driven by the load
requirement and begins with the selection of L followed by
CIN and COUT.
Inductor Value Calculation
The inductor selection will depend on the operating frequency of the LTC1877. The internal nominal frequency is
550kHz, but can be externally synchronized from 400kHz
to 700kHz.
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The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. However, operating at a higher frequency generally results in lower
efficiency because of increased internal gate charge losses.
The inductor value has a direct effect on ripple current. The
ripple current ∆IL decreases with higher inductance or
frequency and increases with higher VIN or VOUT.
LTC1877
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APPLICATIONS INFORMATION
 V 
1
∆IL =
VOUT  1 − OUT 
( f)(L)  VIN 
(1)
Accepting larger values of ∆IL allows the use of low
inductance, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ∆IL = 0.4(IMAX).
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
250mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mµ® cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will
increase.
Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Kool Mµ (from Magnetics, Inc.) is a very good, low loss
core material for toroids with a “soft” saturation characteristic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies but quite a bit more
expensive. Toroids are very space efficient, especially
when you can use several layers of wire, while inductors
Kool Mµ is a registered trademark of Magnetics, Inc.
wound on bobbins are generally easier to surface mount.
New designs for surface mount inductors are available
from Coiltronics, Coilcraft, Dale and Sumida.
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
CIN required IRMS ≅ IOMAX
[VOUT (VIN − VOUT )]1/ 2
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note the capacitor manufacturer’s
ripple current ratings are often based on 2000 hours of life.
This makes it advisable to further derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering.
The output ripple ∆VOUT is determined by:

1 
∆VOUT ≅ ∆IL  ESR +

8fC OUT 

where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. For the LTC1877, the general rule for
proper operation is:
COUT required ESR < 0.25Ω
The choice of using a smaller output capacitance
increases the output ripple voltage due to the frequency
dependent term but can be compensated for by using
capacitor(s) of very low ESR to maintain low ripple voltage. The ITH pin compensation components can be opti-
9
LTC1877
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APPLICATIONS INFORMATION
ESR is a direct function of the volume of the capacitor.
Manufacturers such as Taiyo Yuden, AVX, Sprague, Kemet
and Sanyo should be considered for high performance
capacitors. The POSCAP solid electrolytic capacitor available from Sanyo is an excellent choice for output bulk
capacitors due to its low ESR/size ratio. Once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
When using tantalum capacitors, it is critical that they are
surge tested for use in switching power supplies. A good
choice is the AVX TPS series of surface mount tantalum,
available in case heights ranging from 2mm to 4mm. Other
capacitor types include KEMET T510 and T495 series and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will
not lock up on input frequencies close to the harmonics of
the VCO center frequency. The PLL hold-in range ∆fH is
equal to the capture range, ∆fH = ∆fC = ±150kHz.
The output of the phase detector is a pair of complementary current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
between the voltage on the PLL LPF pin and operating
frequency is shown in Figure 4. A simplified block diagram
is shown in Figure 5.
If the external frequency (VSYNC/MODE) is greater than
550kHz, the center frequency, current is sourced continuously, pulling up the PLL LPF pin. When the external
800
OSCILLATOR FREQUENCY (kHz)
mized to provide stable high performance transient
response regardless of the output capacitor selected.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
VOUT
 R2 
= 0.8V  1 + 
 R1
(2)
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 3.
700
600
500
400
300
0
0.4
0.8V ≤ VOUT ≤ 10V
0.8
1.2
VPLL LPF (V)
1.6
2.0
1877 • F04
Figure 4. Relationship Between Oscillator
Frequency and Voltage at PLL LPF Pin
R2
VFB
LTC1877
RLP
R1
PHASE
DETECTOR
GND
2.4V
CLP
1877 F03
PLL LPF
Figure 3. Setting the LTC1877 Output Voltage
Phase-Locked Loop and Frequency Synchronization
The LTC1877 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external frequency source. The frequency range
of the voltage-controlled oscillator is 400kHz to 700kHz.
The phase detector used is an edge sensitive digital type
10
SYNC/
MODE
DIGITAL
PHASE/
FREQUENCY
DETECTOR
VCO
1877 F05
Figure 5. Phase-Locked Loop Block Diagram
LTC1877
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The loop filter components CLP and RLP smooth out the
current pulses from the phase detector and provide a
stable input to the voltage controlled oscillator. The filter
component’s CLP and RLP determine how fast the loop
acquires lock. Typically RLP = 10k and CLP is 2200pF to
0.01µF. When not synchronized to an external clock, the
internal connection to the VCO is disconnected. This
disallows setting the internal oscillator frequency by a DC
voltage on the VPLL LPF pin.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC1877 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 6.
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical characteristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge dQ moves from VIN to ground. The resulting
dQ/dt is the current out of VIN that is typically larger than
the DC bias current. In continuous mode, IGATECHG =
f(QT + QB) where QT and QB are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
1
0.1
POWER LOST (W)
frequency is less than 550kHz, current is sunk continuously, pulling down the PLL LPF pin. If the external and
internal frequencies are the same but exhibit a phase
difference, the current sources turn on for an amount of
time corresponding to the phase difference. Thus the
voltage on the PLL LPF pin is adjusted until the phase and
frequency of the external and internal oscillators are
identical. At this stable operating point the phase comparator output is high impedance and the filter capacitor
CLP holds the voltage.
0.01
VIN = 4.2V
L = 10µH
VOUT = 1.5V
VOUT = 2.5V
VOUT = 3.3V
Burst Mode OPERATION
0.001
0.0001
0.00001
0.1
1
10
100
LOAD CURRENT (mA)
1000
1877 F06
Figure 6. Power Lost vs Load Current
11
LTC1877
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Thermal Considerations
Checking Transient Response
In most applications the LTC1877 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC1877 is running at high ambient temperature with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches
will be turned off and the SW node will become high
impedance.
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The internal compensation provides adequate
compensation for most applications. But if additional
compensation is required, the ITH pin can be used for
external compensation using RC, CC1 as shown in
Figure 7. (The 220pF capacitor, CC2, is typically needed for
noise decoupling.)
To avoid the LTC1877 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The temperature rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = T A + T R
where TA is the ambient temperature.
As an example, consider the LTC1877 in dropout at an
input voltage of 3V, a load current of 500mA, and an
ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 0.9Ω. Therefore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 0.225W
For the MSOP package, the θJA is 150°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.225)(150) = 104°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)).
12
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1877. These items are also illustrated graphically in
the layout diagram of Figure 7. Check the following in your
layout:
1. Are the signal and power grounds segregated? The
LTC1877 signal ground consists of the resistive
divider, the optional compensation network (RC and
CC1) and CC2. The power ground consists of the (–)
plate of CIN, the (–) plate of COUT and Pin 4 of the
LTC1877
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APPLICATIONS INFORMATION
CC2
LTC1877
OPTIONAL
RC
1
CC1
2
3
4
RUN
ITH
VFB
GND
PLL LPF
SYNC/MODE
R2 V
8
7
BOLD LINES INDICATE
HIGH CURRENT PATHS
6
IN
SW
5
+
L1
+
R2
+
COUT
VOUT
+
CIN
VIN
R1
–
–
1877 F07
Figure 7. LTC1877 Layout Diagram
LTC1877. The power ground traces should be kept
short, direct and wide. The signal ground and power
ground should converge to a common node in a starground configuration.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node SW away from sensitive small
signal nodes.
Design Example
As a design example, assume the LTC1877 is used in a
single lithium-ion battery-powered cellular phone application. The input voltage will be operating from a maximum
of 4.2V down to about 2.7V. The load current requirement
is a maximum of 0.3A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
L=
 V 
1
VOUT  1 − OUT 
( f)(∆IL )  VIN 
(3)
Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL=120mA and
f = 550kHz in equation (3) gives:
L=
 2.5V 
2.5V
1 −
 = 15.3µH
550kHz(120mA)  4.2V 
A 15µH inductor works well for this application. For best
efficiency choose a 1A inductor with less than 0.25Ω
series resistance.
CIN will require an RMS current rating of at least 0.15A at
temperature and COUT will require an ESR of less than
0.25Ω. In most applications, the requirements for these
capacitors are fairly similar.
For the feedback resistors, choose R1 = 412k. R2 can
then be calculated from equation (2) to be:
V

R2 =  OUT – 1 R1 = 875.5k; use 887k
 0.8

Figure 8 shows the complete circuit along with its efficiency curve.
13
LTC1877
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APPLICATIONS INFORMATION
VIN
2.7V
TO 4.2V
2
RUN
ITH
8
PLL LPF
85
7
SYNC/MODE
LTC1877
3
4
VFB
VIN
GND
SW
6
5
VIN = 3.0V
90
10µF**
CER
EFFICIENCY (%)
220pF
1
95
15µH*
VOUT
2.5V
+
47µF***
80
VIN = 3.6V
VIN = 4.2V
75
70
65
60
887k
VOUT = 2.5V
L = 15µH
55
412k
20pF
50
0.1
1877 F08a
*SUMIDA CD54-150
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***SANYO POSCAP 6TPA47M
1.0
10
100
OUTPUT CURRENT (mA)
1877 • F08b
Figure 8. Single Lithium-Ion to 2.5V/0.3A Regulator from Design Example
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TYPICAL APPLICATIONS
Dual Lithium-Ion to 2.5V/0.6A Regulator
Using All Ceramic Capacitors
1
2
RUN
PLL LPF
ITH
220pF
SYNC/MODE
8
4
VFB
VIN
GND
SW
VIN
≤ 8.4V
7
CIN**
10µF
CER
LTC1877
3
6
5
VOUT
2.5V/0.6A
15µH*
20pF
887k
COUT***
22µF
CER
412k
*SUMIDA CD54-150
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***TAIYO YUDEN CERAMIC JMK325BJ226MM
1877 TA03
4-to 6-Cell NiCd/NiMH to 1.8V/0.6A Regulator
Using All Ceramic Capacitors
1
2
RUN
ITH
220pF
PLL LPF
SYNC/MODE
8
7
4
VFB
VIN
GND
SW
6
5
VOUT
1.8V/0.6A
10µH*
20pF
*TOKO D62CB A920CY-100M
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***TAIYO YUDEN CERAMIC JMK325BJ226MM
14
VIN
≤ 9V
CIN**
10µF
CER
LTC1877
3
1000
887k
COUT***
22µF
CER
698k
1877 TA04
LTC1877
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TYPICAL APPLICATIONS
Externally Synchronized 2.5V/0.6A Regulator
Using all Ceramic Capacitors
2
RUN
ITH
220pF
PLL LPF
SYNC/MODE
8
7
LTC1877
3
4
VFB
VIN
GND
SW
VIN
2.85V
TO 10V
VIN
4V
TO 10V
0.01µF
1
Low Noise 2.5V/0.3A Regulator
EXT
CLOCK
700kHz
1
CIN**
10µF
CER
10k
2
RUN
ITH
220pF
VOUT
2.5V
/0.6A
5
10µH*
20pF
4
VFB
VIN
GND
SW
6
5
VOUT
2.5V/0.3A
15µH*
20pF
COUT***
22µF
CER
1877 TA05
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PACKAGE DESCRIPTION
CIN**
10µF
CER
7
887k
412k
*TOKO D62CB A920CY-100M
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***TAIYO YUDEN CERAMIC JMK325BJ226MM
SYNC/MODE
8
LTC1877
3
6
PLL LPF
887k
COUT***
47µF
6.3V
412k
*SUMIDA CD54-150
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***SANYO POSCAP 6TPA47M
1877 TA06
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
0.034 ± 0.004
(0.86 ± 0.102)
8
7 6
5
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE 0.012
(0.30)
0.0256
REF
(0.65)
TYP
0.006 ± 0.004
(0.15 ± 0.102)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.118 ± 0.004**
(3.00 ± 0.102)
0.192 ± 0.004
(4.88 ± 0.10)
1
2 3
4
MSOP (MS8) 1197
15
LTC1877
U
TYPICAL APPLICATION
Single Lithium-Ion to 3.3V/0.3A Regulator
1
2
RUN
ITH
220pF
PLL LPF
SYNC/MODE
10µF**
8
+
–
VIN
Li-Ion BATTERY
3V TO 4.2V
7
LTC1877
3
4
VFB
VIN
GND
SW
6
5
VOUT
3.3V/0.25A
10µH*
20pF
887k
47µF***
280k
*TOKO D62CB A920CY-100M
**TAIYO YUDEN CERAMIC LMK325BJ106MN
***SANYO POSCAP 6TPA47M
1877 TA07
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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Monolithic, IOUT to 250mA, IQ = 10µA, 8-Pin MSOP
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Low Cost, Voltage Mode IOUT to 500mA, VIN from 4V to 10V
LTC1622
Low Input Voltage Current Mode Step-Down DC/DC Controller
High Frequency, High Efficiency, 8-Pin MSOP
LTC1626
Low Voltage, High Efficiency Step-Down DC/DC Converter
Monolithic, Constant Off-Time, IOUT to 600mA,
Low Supply Voltage Range: 2.5V to 6V
LTC1627
Monolithic Synchronous Step-Down Switching Regulator
Constant Frequency, IOUT to 500mA, Secondary Winding
Regulation, VIN from 2.65V to 8.5V
LTC1701
Monolithic Current Mode Step-Down Switching Regulator
Constant Off-Time, IOUT to 500mA, 1MHz Operation,
VIN from 2.5V to 5.5V
LTC1707
Monolithic Synchronous Step-Down Switching Regulator
1.19V VREF Pin, Constant Frequency, IOUT to 600mA,
VIN from 2.65V to 8.5V
LTC1735
High Efficiency, Synchronous Step-Down Converter
16-Pin SO and SSOP, VIN up to 36V, Fault Protection
LTC1772
Low Input Voltage Current Mode Step-Down DC/DC Controller
550kHz, 6-Pin SOT-23, IOUT up to 5A, VIN from 2.2V to 10V
LTC1878
High Efficiency Monolithic Step-Down Regulator
550kHz, MS8, VIN up to 6V, IQ = 10µA, IOUT to 600mA
16
Linear Technology Corporation
1877i LT/TP 0500 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2000