LTC3404 1.4MHz High Efficiency Monolithic Synchronous Step-Down Regulator U FEATURES DESCRIPTIO ■ The LTC ®3404 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation is only 10μA and drops to < 1μA in shutdown. The 2.65V to 6V input voltage range makes the LTC3404 ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High Efficiency: Up to 95% Very Low Quiescent Current: Only 10μA During Operation 600mA Output Current at VIN = 3.3V 2.65V to 6V Input Voltage Range 1.4MHz Constant Frequency Operation No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle Synchronizable from 1MHz to 1.7MHz Selectable Burst Mode® Operation or Pulse Skipping Mode 0.8V Reference Allows Low Output Voltages Shutdown Mode Draws < 1μA Supply Current ±2% Output Voltage Accuracy Current Mode Control for Excellent Line and Load Transient Response Overcurrent and Overtemperature Protected Available in 8-Lead MSOP Package Switching frequency is internally set at 1.4MHz, allowing the use of small surface mount inductors and capacitors. For noise sensitive applications the LTC3404 can be externally synchronized from 1MHz to 1.7MHz. Burst Mode operation is inhibited during synchronization or when the SYNC/MODE pin is pulled low, preventing low frequency ripple from interfering with audio circuitry. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with the 0.8V feedback reference voltage. The LTC3404 is available in a space saving 8-lead MSOP package. U APPLICATIO S ■ ■ ■ ■ ■ ■ Cellular Telephones Wireless and DSL Modems Personal Information Appliances Portable Instruments Distributed Power Systems Battery-Powered Equipment For higher input voltage (11V abs max) applications, refer to the LTC1877 data sheet. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U Efficiency vs Output Load Current TYPICAL APPLICATIO 100 95 VIN 2.65V TO 6V 7 10μF*** CER 6 1 2 47pF SW SYNC VIN 5 4.7μH* 20pF LTC3404 RUN ITH GND VFB 4 887k 3 VOUT† 3.3V 22μF** CER EFFICIENCY (%) High Efficiency Step-Down Converter VIN = 3.6V VIN = 4.2V 90 VIN = 6V 85 80 280k Burst Mode OPERATION VOUT = 3.3V L = 4.7μH 75 3404 TA01 *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN † VOUT CONNECTED TO VIN FOR 2.65V < VIN < 3.3V 70 0.1 1 10 LOAD (mA) 100 1000 3404 TA02 3404fb 1 LTC3404 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) Input Supply Voltage (VIN)...........................– 0.3V to 7V ITH, PLL LPF Voltage ................................– 0.3V to 2.7V RUN, VFB Voltages ...................................... – 0.3V to VIN SYNC/MODE Voltage .................................. – 0.3V to VIN SW Voltage (DC) .......................... – 0.3V to (VIN + 0.3V) P-Channel MOSFET Source Current (DC) ........... 800mA N-Channel MOSFET Sink Current (DC) ............... 800mA Peak SW Sink and Source Current ........................ 1.5A Operating Temperature Range (Note 2) LTC3404E/LTC3404I ........................... –40°C to 85°C LTC3404MP ...................................... –55°C to 125°C Junction Temperature (Note 3) ............................ 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C TOP VIEW RUN ITH VFB GND 8 7 6 5 1 2 3 4 PLL LPF SYNC/MODE VIN SW MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 125°C/W MS8 PART MARKING LTKR LTCJR LTCXG ORDER PART NUMBER LTC3404EMS8 LTC3404IMS8 LTC3404MPMS8 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over –40°C to 85°C, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified. SYMBOL IVFB VFB PARAMETER Feedback Current Regulated Output Voltage ΔVOVL ΔVFB VLOADREG Output Overvoltage Lockout Reference Voltage Line Regulation Output Voltage Load Regulation VIN IQ Input Voltage Range Input DC Bias Current Pulse Skipping Mode Burst Mode Operation Shutdown Oscillator Frequency fOSC SYNC Capture Range Phase Detector Output Current Sinking Capability Sourcing Capability RPFET RDS(ON) of P-Channel MOSFET RNFET RDS(ON) of N-Channel MOSFET IPK Peak Inductor Current ILSW SW Leakage VSYNC/MODE SYNC/MODE Threshold ISYNC/MODE SYNC/MODE Leakage Current VRUN RUN Threshold IRUN RUN Input Current CONDITIONS (Note 4) (Note 4) 0°C ≤ TA ≤ 85°C (Note 4) – 40°C ≤ TA ≤ 85°C ΔVOVL = VOVL – VFB VIN = 2.65V to 6V (Note 4) Measured in Servo Loop; VITH = 0.9V to 1.2V Measured in Servo Loop; VITH = 1.6V to 1.2V MIN ● ● ● ● ● ● (Note 5) 2.65V < VIN < 6V, VSYNC/MODE = 0V, IOUT = 0A VSYNC/MODE = VIN, IOUT = 0A VRUN = 0V, VIN = 6V VFB = 0.8V VFB = 0V fSYNC IPLL LPF 0.784 0.74 20 ● TYP 4 0.8 0.8 50 0.05 0.1 – 0.1 MAX 30 0.816 0.84 110 0.2 0.5 – 0.5 6 UNITS nA V V mV %/V % % V 400 10 0 1.4 200 700 15 1 1.65 1.7 μA μA μA MHz kHz MHz 40 –40 0.7 0.8 1.25 ±1 1.5 ±1 1.5 ±1 μA μA Ω Ω A μA V μA V μA 2.65 1.25 1.0 fPLLIN < fOSC fPLLIN > fOSC ISW = 100mA ISW = –100mA VIN = 3.3V, VFB = 0.7V, Duty Cycle < 35% VRUN = 0V, VSW = 0V or 6V, VIN = 6V VSYNC/MODE Rising ● ● ● 0.3 VRUN Rising ● 0.3 6 –6 0.8 20 –20 0.5 0.6 1.0 ±0.01 1.0 ±0.01 0.7 ±0.01 3404fb 2 LTC3404 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over –55°C to 125°C, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified. SYMBOL IVFB VFB PARAMETER Feedback Current Regulated Output Voltage ΔVOVL ΔVFB VLOADREG Output Overvoltage Lockout Reference Voltage Line Regulation Output Voltage Load Regulation VIN IQ Input Voltage Range Input DC Bias Current Pulse Skipping Mode Burst Mode Operation Shutdown Oscillator Frequency fOSC fSYNC IPLL LPF RPFET RNFET IPK ILSW VSYNC/MODE ISYNC/MODE VRUN IRUN SYNC Capture Range Phase Detector Output Current Sinking Capability Sourcing Capability RDS(ON) of P-Channel MOSFET RDS(ON) of N-Channel MOSFET Peak Inductor Current SW Leakage SYNC/MODE Threshold SYNC/MODE Leakage Current RUN Threshold RUN Input Current CONDITIONS (Note 4) (Note 4) 0°C ≤ TA ≤ 125°C (Note 4) – 55°C ≤ TA ≤ 125°C ΔVOVL = VOVL – VFB VIN = 2.65V to 6V (Note 4) Measured in Servo Loop; VITH = 0.9V to 1.2V Measured in Servo Loop; VITH = 1.5V to 1.2V MIN 0.784 0.74 20 TYP 4 0.8 0.8 50 0.05 0.1 – 0.1 MAX 30 0.816 0.84 110 0.2 1 –1 6 UNITS nA V V mV %/V % % V 400 10 0 1.4 200 700 15 1 1.65 1.7 μA μA μA MHz kHz MHz 40 –40 0.7 0.8 1.1 μA μA Ω Ω A 1.2 A ±3 1.5 ±1 1.5 ±1 μA V μA V μA 2.65 (Note 5) 2.65V < VIN < 6V, VSYNC/MODE = 0V, IOUT = 0A VSYNC/MODE = VIN, IOUT = 0A VRUN = 0V, VIN = 6V VFB = 0.8V VFB = 0V 1.25 1.0 fPLLIN < fOSC fPLLIN > fOSC ISW = 100mA ISW = –100mA VIN = 3.3V, VFB = 0.7V, Duty Cycle < 35%, TA = 125°C VIN = 4V, VFB = 0.7V, Duty Cycle < 35%, TA = 125°C VRUN = 0V, VSW = 0V or 6V, VIN = 6V VSYNC/MODE Rising 0.3 VRUN Rising 0.3 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3404E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3404I is guaranteed to meet performance specifications over the –40°C to 85°C operating temperature range. The LTC3404MP is guaranteed to meet performance specifications over the –55°C to 125°C operating temperature range. 6 –6 20 –20 0.4 1.0 0.8 Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: TJ = TA + (PD)(150°C/W) Note 4: The LTC3404 is tested in a feedback loop which servos VFB to the balance point for the error amplifier (VITH = 1.2V). Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. 3404fb 3 LTC3404 U W TYPICAL PERFOR A CE CHARACTERISTICS Efficiency vs Input Voltage Efficiency vs Output Current 95 IOUT = 100mA 90 IOUT = 10mA IOUT = 1mA IOUT = 300mA 80 75 70 VIN = 4.2V 60 VIN = 3.6V 50 VIN = 4.2V 40 20 65 Burst Mode OPERATION VOUT = 2.5V L = 4.7μH 60 3 4 6 2 5 INPUT VOLTAGE (V) 75 70 65 30 IOUT = 0.1mA 10 7 0 0.1 8 60 PULSE SKIPPING MODE Burst Mode OPERATION VOUT = 1.8V L = 4.7μH 1 10 100 OUTPUT CURRENT (mA) 55 Efficiency vs Output Current 50 0.1 1000 0.814 VIN = 3V 95 VIN = 3.6V EFFICIENCY (%) EFFICIENCY (%) 90 VIN = 4.2V 70 VIN = 6V 85 VIN = 4.2V 80 75 VIN = 6V 65 70 VOUT = 1.8V L = 4.7μH 60 0.1 1 10 100 OUTPUT CURRENT (mA) 10 100 1 OUTPUT CURRENT (mA) 0.804 0.799 0.794 0.789 VOUT = 3.1V L = 4.7μH 65 0.1 1000 VIN = 3.6V 0.809 REFERENCE VOLTAGE (V) 85 1000 Reference Voltage vs Temperature 100 90 75 10 100 1 OUTPUT CURRENT (mA) 3404 G03 Efficiency vs Output Current VIN = 3.6V Burst Mode OPERATION VIN = 6V VOUT = 2.5V 3404 G02 3404 G01 80 L = 3.5μH 80 70 EFFICIENCY (%) 85 L = 4.7μH 85 VIN = 3.6V 80 EFFICIENCY (%) 90 EFFICIENCY (%) Efficiency vs Output Current 90 100 1000 0.784 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3404 G4a 3404 G04 3404 G05 Oscillator Frequency vs Temperature VIN = 3.6V OSCILLATOR FREQUENCY (MHz) FREQUENCY (MHz) 1.50 1.45 1.40 1.35 1.30 1.25 –50 –25 Output Voltage vs Load Current 1.55 25 50 75 0 TEMPERATURE (°C) 100 125 3404 G06 1.83 1.82 1.50 OUTPUT VOLTAGE (V) 1.55 Oscillator Frequency vs Supply Voltage 1.45 1.40 1.35 1.30 1.25 2 4 6 SUPPLY VOLTAGE (V) 8 3404 G07 1.81 1.80 1.79 1.78 1.77 PULSE SKIPPING MODE 1.76 VIN = 3.6V L = 4.7μF 1.75 200 0 600 400 LOAD CURRENT (mA) 800 3404 G08 3404fb 4 LTC3404 U W TYPICAL PERFOR A CE CHARACTERISTICS 0.9 1.2 0.8 1.1 SYNCHRONOUS SWITCH 0.4 0.7 0.3 0.6 0.2 0.5 0.1 0.4 0 1 2 3 5 6 4 INPUT VOLTAGE (V) 7 VIN = 3V 0.8 VIN = 5V 0.3 –50 8 400 –25 0 25 50 75 TEMPERATURE (°C) SWITCH LEAKAGE (μA) V = 3.6V 250 IN VOUT = 1.5V 200 150 100 0 –50 100 100 125 4 5 6 INPUT VOLTAGE (V) 3 MAIN SWITCH 1.0 SYNCHRONOUS SWITCH 0 – 50 – 25 RUN = 0V 0 50 75 25 TEMPERATURE (°C) SYNCHRONOUS SWITCH 0.8 0.6 0.4 MAIN SWITCH 0.2 100 125 0 0 1 2 6 5 4 3 INPUT VOLTAGE (V) VOUT 50mV/DIV AC COUPLED VOUT 10mV/DIV IL 200mA/DIV IL 100mA/DIV 7 8 3404 G20 Pulse Skipping Mode Operation SW 5V/DIV 8 3404 G11 3404 G13 SW 5V/DIV 7 1.0 1.5 Burst Mode Operation 3404 G14 Burst Mode OPERATION 2 VIN = 7V RUN = 0V 3404 G12 10μs/DIV VIN = 4.2V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 30mA 150 Switch Leakage vs Input Voltage Burst Mode OPERATION 50 25 75 0 TEMPERATURE (°C) 200 1.2 0.5 –25 250 0 125 100 2.0 300 50 300 Switch Leakage vs Temperature 2.5 450 PULSE SKIPPING MODE PULSE SKIPPING MODE 3404 G10 DC Supply Current vs Temperature 350 400 350 50 3404 G09 SUPPLY CURRENT (μA) DC SUPPLY CURRENT (μA) MAIN SWITCH SWITCH LEAKAGE (nA) 0.5 VOUT = 1.8V 450 0.9 0.6 0 500 SYNCHRONOUS SWITCH MAIN SWITCH 1.0 RDS(ON) (Ω) RDS(ON) (Ω) 0.7 DC Supply Current vs Input Voltage RDS(ON) vs Temperature RDS(ON) vs Input Voltage Start-Up from Shutdown RUN 2V/DIV VOUT 1V/DIV IL 500mA/DIV 500ns/DIV VIN = 4.2V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 30mA 3404 G15 40μs/DIV VIN = 3.6V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 500mA 3404 G16 3404fb 5 LTC3404 U W TYPICAL PERFOR A CE CHARACTERISTICS Load Step Response Load Step Response Load Step Response VOUT 100mV/DIV VOUT 100mV/DIV VOUT 100mV/DIV IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ITH 1V/DIV ITH 1V/DIV 40μs/DIV VIN = 3.6V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 200mA TO 500mA PULSE SKIPPING MODE 3404 G17 ITH 1V/DIV 40μs/DIV VIN = 3.6V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 50mA TO 500mA PULSE SKIPPING MODE 3404 G18 40μs/DIV VIN = 3.6V CIN = 10μF VOUT = 1.5V COUT = 22μF L = 4.7μH ILOAD = 50mA TO 500mA Burst Mode OPERATION 3404 G19 U U U PI FU CTIO S RUN (Pin 1): Run Control Input. Forcing this pin below 0.4V shuts down the LTC3404. In shutdown all functions are disabled drawing < 1μA supply current. Forcing this pin above 1.2V enables the LTC3404. Do not leave RUN floating. ITH (Pin 2): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.5V to 1.9V. VFB (Pin 3): Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. GND (Pin 4): Ground Pin. SW (Pin 5): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. VIN (Pin 6): Main Supply Pin. Must be closely decoupled to GND, Pin 4. SYNC/MODE (Pin 7): External Clock Synchronization and Mode Select Input. To synchronize with an external clock, apply a clock with a frequency between 1MHz and 1.7MHz. To select Burst Mode operation, tie to VIN. Grounding this pin selects pulse skipping mode. Do not leave this pin floating. PLL LPF (Pin 8): Output of the Phase Detector and Control Input of Oscillator. Connect a series RC lowpass network from this pin to ground if externally synchronized. If unused, this pin may be left open. 3404fb 6 LTC3404 W FU CTIO AL DIAGRA U U VIN BURST DEFEAT PLL LPF Y Y = “0” ONLY WHEN X IS A CONSTANT “1” X 8 SLOPE COMP SYNC/MODE 7 0.8V VCO OSC 0.6V 3 VFB – 6 VIN FREQ SHIFT + – + 0.55V – EA gm = 0.5m Ω 0.8V REF EN SLEEP – + VIN S Q R Q RS LATCH 6Ω + ICOMP BURST VIN SLEEP 2 ITH VIN RUN 1 – + VREF 0.8V SWITCHING LOGIC AND BLANKING CIRCUIT P-CH ANTISHOOTTHRU P-CH 5 SW – OVDET + + 0.85V SHUTDOWN N-CH IRCMP 4 GND – 3404 BD U OPERATIO Main Control Loop The LTC3404 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each clock cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage, VFB, relative to the 0.8V internal reference, which in turn, causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Comparator OVDET guards against transient overshoots >6.25% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC3404 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply tie the SYNC/MODE pin to VIN or connect it to a logic high (VSYNC/MODE > 1.5V). To disable Burst Mode operation and enable PWM pulse skipping mode, connect the SYNC/ MODE pin to GND. In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 50mA. The advantage of pulse skipping mode is lower output ripple and less interference to audio circuitry. 3404fb 7 LTC3404 U OPERATIO In sleep mode, both power MOSFETs are held off and a majority of the internal circuitry is partially turned off, reducing the quiescent current to 10μA. The load current is now being supplied solely from the output capacitor. When the output voltage drops, the ITH pin reconnects to the output of the EA amplifier and the top MOSFET is again turned on and this process repeats. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 200kHz, 1/7 the nominal frequency. This frequency foldback ensures that the inductor current has ample time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 1.4MHz (or the synchronized frequency) when VFB rises above 0.3V. Frequency Synchronization A phase-locked loop (PLL) is available on the LTC3404 to allow the internal oscillator to be synchronized to an external source connected to the SYNC/MODE pin. The output of the phase detector at the PLL LPF pin operates over a 0V to 2.4V range corresponding to 1MHz to 1.7MHz. When locked, the PLL aligns the turn-on of the top MOSFET to the rising edge of the synchronizing signal. When the LTC3404 is clocked by an external source, Burst Mode operation is disabled; the LTC3404 then operates in PWM pulse skipping mode. In this mode, when the output load is very low, current comparator ICOMP may remain tripped for several cycles and force the main switch to stay off for the same number of cycles. Increasing the output load slightly allows constant frequency PWM operation to resume. This mode exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency. Frequency synchronization is inhibited when the feedback voltage VFB is below 0.6V. This prevents the external clock from interfering with the frequency foldback for shortcircuit protection. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-channel MOSFET and the inductor. Low Supply Operation The LTC3404 is designed to operate down to an input supply voltage of 2.65V although the maximum allowable output current is reduced at this low voltage. Figure 1 shows the reduction in the maximum output current as a function of input voltage for various output voltages. Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases. Therefore, the user should calculate the power dissipation when the LTC3404 is used at 100% duty cycle with a low input voltage (see Thermal Considerations in the Applications Information section). 1200 MAXIMUM OUTPUT CURRENT (mA) When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 250mA, even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the ITH voltage drops below approximately 0.55V, the BURST comparator trips, causing the internal sleep line to go high and forces off both power MOSFETs. The ITH pin is then disconnected from the output of the EA amplifier and held a diode voltage (0.7V) above ground. L = 4.7μH 1000 VOUT = 3.3V 800 600 VOUT = 2.5V 400 VOUT = 1.5V 200 0 2.5 3.5 4.5 5.5 6.5 SUPPLY VOLTAGE (V) 7.5 3404 • F01 Figure 1. Maximum Output Current vs Input Voltage 3404fb 8 LTC3404 Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. As a result, the maximum inductor peak current is reduced for duty cycles > 40%. This is shown in the decrease of the inductor peak current as a function of duty cycle graph in Figure 2. MAXIMUM INDUCTOR PEAK CURRENT (mA) U OPERATIO 1100 VIN = 3.3V 1000 900 800 700 600 0 20 60 40 DUTY CYCLE (%) 80 100 3404 F02 Figure 2. Maximum Inductor Peak Current vs Duty Cycle U W U U APPLICATIO S I FOR ATIO The basic LTC3404 application circuit is shown on the first page. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Value Calculation The inductor selection will depend on the operating frequency of the LTC3404. The internal nominal frequency is 1.4MHz, but can be externally synchronized from 1MHz to 1.7MHz. The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. However, operating at a higher frequency generally results in lower efficiency because of increased internal gate charge losses. The inductor value has a direct effect on ripple current. The ripple current ΔIL decreases with higher inductance or frequency and increases with higher VIN or VOUT. ΔIL = ⎛ V ⎞ 1 VOUT ⎜ 1 − OUT ⎟ ( f)(L) ⎝ VIN ⎠ (1) Accepting larger values of ΔIL allows the use of smaller inductors, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ΔIL = 0.4(IMAX). The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 250mA. Lower inductor values (higher ΔIL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy, or Kool Mμ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in 3404fb 9 LTC3404 U W U U APPLICATIO S I FOR ATIO inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Kool Mμ (from Magnetics, Inc.) is a very good, low loss core material for toroids with a “soft” saturation characteristic. Molypermalloy is slightly more efficient at high (>200kHz) switching frequencies but quite a bit more expensive. Toroids are very space efficient, especially when you can use several layers of wire, while inductors wound on bobbins are generally easier to surface mount. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Dale and Sumida. CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN required IRMS ≅ IOMAX [VOUT (VIN − VOUT )]1/ 2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple ΔVOUT is determined by: ΔVOUT ⎛ 1 ⎞ ≅ ΔIL ⎜ ESR + ⎟ 8 fCOUT ⎠ ⎝ where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. For the LTC3404, the general rule for proper operation is: COUT required ESR < 0.25Ω The choice of using a smaller output capacitance increases the output ripple voltage due to the frequency dependent term but can be compensated for by using capacitor(s) of very low ESR to maintain low ripple voltage. The ITH pin compensation components can be optimized to provide stable high performance transient response regardless of the output capacitor selected. ESR is a direct function of the volume of the capacitor. Manufacturers such as Taiyo-Yuden, AVX, Kemet, Sprague and Sanyo should be considered for high performance capacitors. The POSCAP solid electrolytic chip capacitor available from Sanyo is an excellent choice for output bulk capacitors due to its low ESR/size ratio. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. When using tantalum capacitors, it is critical that they are surge tested for use in switching power supplies. A good choice is the AVX TPS series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include KEMET T510 and T495 series and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula: ⎛ R2 ⎞ VOUT = 0.8V ⎜ 1 + ⎟ ⎝ R1⎠ (2) The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 3. 0.8V ≤ VOUT ≤ 6V R2 VFB LTC3404 R1 GND 3404 F03 Figure 3. Setting the LTC3404 Output Voltage 3404fb 10 LTC3404 U W U U APPLICATIO S I FOR ATIO Phase-Locked Loop and Frequency Synchronization The LTC3404 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the top MOSFET turn-on to be locked to the rising edge of an external frequency source. The frequency range of the voltage-controlled oscillator is 1MHz to 1.7MHz. The phase detector used is an edge sensitive digital type that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the harmonics of the VCO center frequency. The PLL hold-in range ΔfH is equal to the capture range, ΔfH = ΔfC = 300kHz and –400kHz. The output of the phase detector is a pair of complementary current sources charging or discharging the external filter network on the PLL LPF pin. The relationship OSCILLATOR FREQUENCY (MHz) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.8 1.0 1.2 1.4 1.6 1.8 Efficiency Considerations 2.0 VPPL LPF (V) The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: 3404 • F04 Figure 4. Relationship Between Oscillator Frequency and Voltage at PLL LPF Pin RLP PHASE DETECTOR 2.4V CLP PLL LPF SYNC/ MODE If the external frequency (VSYNC/MODE) is greater than 1.4MHz, the center frequency, current is sourced continuously, pulling up the PLL LPF pin. When the external frequency is less than 1.4MHz, current is sunk continuously, pulling down the PLL LPF pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference. Thus the voltage on the PLL LPF pin is adjusted until the phase and frequency of the external and internal oscillators are identical. At this stable operating point the phase comparator output is high impedance and the filter capacitor CLP holds the voltage. The loop filter components CLP and RLP smooth out the current pulses from the phase detector and provide a stable input to the voltage controlled oscillator. The filter component’s CLP and RLP determine how fast the loop acquires lock. Typically RLP = 10k and CLP is 2200pF to 0.01μF. When not synchronized to an external clock, the internal connection to the VCO is disconnected. This disallows setting the internal oscillator frequency by a DC voltage on the VPLL LPF pin. 2.0 0.6 0.4 between the voltage on the PLL LPF pin and operating frequency is shown in Figure 4. A simplified block diagram is shown in Figure 5. DIGITAL PHASE/ FREQUENCY DETECTOR Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. VCO 3404 F05 Figure 5. Phase-Locked Loop Block Diagram Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3404 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at 3404fb 11 LTC3404 U W U U APPLICATIO S I FOR ATIO 1 very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 6. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3404 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3404 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction POWER LOST (W) 0.1 1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 0.01 VIN = 4.2V L = 4.7μH VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V Burst Mode OPERATION 0.001 0.0001 0.00001 0.1 1 10 100 LOAD CURRENT (mA) 1000 3404 F06 Figure 6. Power Lost vs Load Current temperature reaches approximately 175°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3404 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and qJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: T J = TA + TR where TA is the ambient temperature. As an example, consider the LTC3404 in dropout at an input voltage of 3V, a load current of 500mA, and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.7Ω. Therefore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 0.175W For the MSOP package, the θJA is 150°C/ W. Thus, the junction temperature of the regulator is: TJ = 70°C + (0.175)(150) = 96°C 3404fb 12 LTC3404 U W U U APPLICATIO S I FOR ATIO which is below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ΔILOAD • ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The internal compensation provides adequate compensation for most applications. But if additional compensation is required, the ITH pin can be used for external compensation using RC, CC1 as shown in Figure 7. (The 47pF capacitor, CC2, is typically needed for noise decoupling.) A second, more severe transient is caused by switching in loads with large (>1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). CC2 LTC3404 OPTIONAL 1 CC1 RC 2 3 R2 R1 4 RUN ITH SYNC/MODE 8 7 BOLD LINES INDICATE HIGH CURRENT PATHS VIN 6 VFB GND CIN PLL LPF + SW 5 + L1 + + COUT VOUT VIN – – 3404 F07 Thus, a 10μF capacitor charging to 3.3V would require a 250μs rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3404. These items are also illustrated graphically in the layout diagram of Figure 7. Check the following in your layout: 1. Are the signal and power grounds segregated? The LTC3404 signal ground consists of the resistive divider, the optional compensation network (RC and CC1) and CC2. The power ground consists of the (–) plate of CIN, the (–) plate of COUT and Pin 4 of the LTC3404. The power ground traces should be kept short, direct and wide. The signal ground and power ground should converge to a common node in a starground configuration. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node SW away from sensitive small signal nodes. Design Example As a design example, assume the LTC3404 is used in a single lithium-ion battery-powered cellular phone application. The input voltage will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.3A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1), L= ⎛ V ⎞ 1 VOUT ⎜ 1 − OUT ⎟ ( f)(ΔIL ) ⎝ VIN ⎠ (3) Figure 7. LTC3404 Layout Diagram 3404fb 13 LTC3404 U W U U APPLICATIO S I FOR ATIO Substituting VOUT = 2.5V, VIN = 4.2V, ΔIL=120mA and f = 1.4MHz in equation (3) gives: L= 0.25Ω. In most applications, the requirements for these capacitors are fairly similar. For the feedback resistors, choose R1 = 412k. R2 can then be calculated from equation (2) to be: ⎛ 2.5V ⎞ 2.5V ⎜1 − ⎟ = 6μH 1.4MHz(120mA) ⎝ 4.2V ⎠ ⎛V ⎞ R2 = ⎜ OUT − 1⎟ R1 = 875.5k ; use 887k ⎝ 0.8 ⎠ A 6.2μH inductor works well for this application. For best efficiency choose a 1A inductor with less than 0.25Ω series resistance. Figure 8 shows the complete circuit along with its efficiency curve. CIN will require an RMS current rating of at least 0.15A at temperature and COUT will require an ESR of less than 95 VIN 2.65V TO 4.2V LTC3404 2 3 4 RUN PLL LPF ITH SYNC/MODE VFB VIN GND SW 90 10μF*** CER 8 EFFICIENCY (%) 47pF 1 VIN = 3V 7 6 5 6.2μH* VOUT 2.5V 22μF** CER VIN = 3.6V 85 80 VIN = 4.2V 75 887k VOUT = 2.5V L = 6.2μH 3404 F08a 412k 20pF 70 0.1 *TOKO D63LCB A920CY-6R2M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN 10 100 1.0 OUTPUT CURRENT (mA) 1000 3404 F8b Figure 8. Single Lithium-Ion to 2.5V/0.3A Regulator from Design Example U TYPICAL APPLICATIO S Single Li-Ion to 2.5V/0.6A Regulator Using All Ceramic Capacitors LTC3404 1 2 47pF 3 4 RUN PLL LPF ITH SYNC/MODE VFB VIN GND SW 8 7 6 5 4.7μH* 20pF *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN 887k VOUT 2.5V COUT** 0.6A 22μF CER VIN CIN*** 3V TO 4.2V 10μF CER 412k 3404 TA03 3404fb 14 LTC3404 U TYPICAL APPLICATIO S 3- to 4-Cell NiCd/NiMH to 1.8V/0.5A Regulator Using All Ceramic Capacitors LTC3404 1 2 47pF 3 4 RUN 8 PLL LPF ITH SYNC/MODE VFB VIN GND 7 6 4.7μH* 5 SW 887k 20pF *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN COUT** 22μF CER VOUT 1.8V 0.5A VIN 2.7V TO 6V CIN*** 10μF CER 698k 3404 TA04 Externally Synchronized 2.5V/0.6A Regulator Using All Ceramic Capacitors LTC3404 1 2 47pF 3 4 RUN 0.01μF PLL LPF ITH SYNC/MODE VFB VIN GND SW 10k 8 7 6 EXT CLOCK 1.7MHz 4.7μH* 5 20pF *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN VOUT 2.5V COUT** 0.6A 22μF CER 887k CIN*** 10μF CER VIN 3V TO 6V 412k 3404 TA04 Low Noise 2.5V/0.3A Regulator LTC3404 1 2 47pF 3 4 RUN PLL LPF ITH SYNC/MODE VFB VIN GND SW 8 7 6 5 6.2μH* 20pF *TOKO D63LCB A920CY-6R2M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN COUT** 22μF CER 887k VOUT 2.5V 0.3A CIN*** 10μF CER VIN 2.65V TO 6V 412k 3404 TA06 U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (LTC DWG # 05-08-1660 Rev F) 0.889 ± 0.127 (.035 ± .005) 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 6 5 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.52 (.0205) REF 0° – 6° TYP GAUGE PLANE 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 1 2 3 1.10 (.043) MAX 4 0.86 (.034) REF 0.18 (.007) RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS8) 0307 REV F 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 3404fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3404 U TYPICAL APPLICATIO S 3- to 4-Cell NiCd/NiMH to 3.3V/0.5A Regulator Using All Ceramic Capacitors LTC3404 1 2 47pF 3 4 RUN PLL LPF ITH SYNC/MODE VFB VIN GND SW 8 7 6 5 4.7μH* 20pF 887k *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN † VOUT CONNECTED TO VIN FOR 2.7V < VIN < 3.3V VOUT† 3.3V COUT** 0.5A 22μF CER CIN*** 10μF CER VIN 2.7V TO 6V 280k 3404 TA06 Single Li-Ion to 2.5V/0.5A Regulator with Precision 2.7V Undervoltage Lockout 1.58M 1% 2 3 1.18M 1% 0.1μF LTC1540 1 4 GND OUT V– V+ IN+ REF IN– HYS 10k LTC3404 8 1 7 2 6 5 44.2k 1% 47pF 3 0.01μF 4 RUN PLL LPF ITH SYNC/MODE VFB VIN GND SW 8 7 6 5 4.7μH* 20pF 2.37M 1% *TOKO D52LC A914BYW-4R7M **TAIYO-YUDEN CERAMIC JMK325BJ226MM ***TAIYO-YUDEN CERAMIC LMK325BJ106MN 887k COUT** 22μF CER VOUT 2.5V 0.6A CIN*** 10μF CER VIN 2.7V TO 4.2V 412k 3404 TA08 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1174/LTC1174-3.3 LTC1174-5 High Efficiency Step-Down and Inverting DC/DC Converters Monolithic Switching Regulators, I OUT to 450mA, Burst Mode Operation LTC1265 1.2A, High Efficiency Step-Down DC/DC Converter Constant Off-Time, Monolithic, Burst Mode Operation LTC1474/LTC1475 Low Quiescent Current Step-Down DC/DC Converters Monolithic, IOUT to 250mA, IQ = 10μA, 8-Pin MSOP LTC1504A Monolithic Synchronous Step-Down Switching Regulator Low Cost, Voltage Mode IOUT to 500mA, VIN from 4V to 10V LTC1622 Low Input Voltage Current Mode Step-Down DC/DC Controller High Frequency, High Efficiency, 8-Pin MSOP LTC1626 Low Voltage, High Efficiency Step-Down DC/DC Converter Monolithic, Constant Off-Time, IOUT to 600mA, Low Supply Voltage Range: 2.5V to 6V LTC1627 Monolithic Synchronous Step-Down Switching Regulator Constant Frequency, IOUT to 500mA, Secondary Winding Regulation, VIN from 2.65V to 8.5V LTC1701 Monolithic Current Mode Step-Down Switching Regulator Constant Off-Time, IOUT to 500mA, 1MHz Operation, VIN from 2.5V to 5.5V LTC1707 Monolithic Synchronous Step-Down Switching Regulator 1.19V VREF Pin, Constant Frequency, IOUT to 600mA, VIN from 2.65V to 8.5V LTC1772 Low Input Voltage Current Mode Step-Down DC/DC Controller 550kHz, 6-Pin SOT-23, IOUT Up to 5A, VIN from 2.2V to 10V LTC1877 High Efficiency Monolithic Step-Down Regulator 550kHz, MS8, VIN Up to 10V, IQ = 10μA, IOUT to 600mA at VIN = 5V LTC1878 High Efficiency Monolithic Step-Down Regulator 550kHz, MS8, VIN Up to 6V, IQ = 10μA, IOUT to 600mA at VIN = 3.3V 3404fb 16 Linear Technology Corporation LT 0607 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2000