Matched Monolithic Quad Transistor MAT14 Low offset voltage: 400 µV maximum High current gain: 300 minimum Excellent current gain match: 4% maximum Low voltage noise density at 100 Hz, 1 mA 3 nV/√Hz maximum Excellent log conformance Bulk resistance (rBE) = 0.6 Ω maximum Guaranteed matching for all transistors PIN CONFIGURATION C1 1 14 C4 B1 2 13 B4 12 E4 E1 3 MAT14 TOP VIEW 11 SUB (Not to Scale) 10 E3 E2 5 9 B3 B2 6 SUB 4 C2 7 8 C3 09045-001 FEATURES Figure 1. APPLICATIONS Low noise op amp front end Current mirror and current sink/source Low noise instrumentation amplifiers Voltage controlled attenuators Log amplifiers GENERAL DESCRIPTION The MAT14 is a quad monolithic NPN transistor that offers excellent parametric matching for precision amplifier and nonlinear circuit applications. Performance characteristics of the MAT14 include high gain (300 minimum) over a wide range of collector current, low noise (3 nV/√Hz maximum at 100 Hz, IC = 1 mA), and excellent logarithmic conformance. The MAT14 also features a low offset voltage of 100 µV typical and tight current gain matching to within 4%. Each transistor of the MAT14 is individually tested to data sheet specifications. For matching parameters (offset voltage, input offset current, and gain match), each of the dual transistor combinations are verified to meet stated limits. Device performance is guaranteed at an ambient temperature of 25°C and over the industrial temperature range. The long-term stability of matching parameters is guaranteed by the protection diodes across the base emitter junction of each transistor. These diodes prevent degradation of beta and matching characteristics due to reverse bias, base emitter current. The superior logarithmic conformance and accurate matching characteristics of the MAT14 make it an excellent choice for use in log and antilog circuits. The MAT14 is an ideal choice in applications where low noise and high gain are required. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. MAT14 TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .......................................................................4 Applications ....................................................................................... 1 ESD Caution...................................................................................4 Pin Configuration ............................................................................. 1 Typical Performance Characteristics ..............................................5 General Description ......................................................................... 1 Theory of Operation .........................................................................8 Revision History ............................................................................... 2 Applications Information .............................................................8 Specifications..................................................................................... 3 Outline Dimensions ..........................................................................9 Electrical Characteristics ............................................................. 3 Ordering Guide .............................................................................9 Absolute Maximum Ratings ............................................................ 4 REVISION HISTORY 12/10—Rev. 0 to Rev. A Changes to General Description .................................................... 1 Changes to Operating Temperature Range in Table 2 ................. 4 Updated Outline Dimensions ......................................................... 9 Changes to Ordering Guide ............................................................ 9 10/10—Revision 0: Initial Version Rev. A | Page 2 of 12 MAT14 SPECIFICATIONS ELECTRICAL CHARACTERISTICS TA = 25°C, unless otherwise specified. Table 1. Parameter DC AND AC CHARACTERISTICS Current Gain Symbol Test Conditions/Comments hFE 10 µA ≤ IC ≤ 1 mA 0 V ≤ VCB ≤ 30 V 1 −40°C ≤ TA ≤ +85°C IC = 100 µA2 0 V ≤ VCB ≤ 30 V IC = 1 mA, VCB = 03 fO = 10 Hz fO = 100 Hz fO = 1 kHz 10 µA ≤ IC ≤ 1 mA4 0 V ≤ VCB ≤ 30 V −40°C ≤ TA ≤ +85°C 0 V ≤ VCB ≤ 30 V4 10 µA ≤ IC ≤ 1 mA 10 µA ≤ IC ≤ 1 mA4, VCB = 0 V −40°C ≤ TA ≤ +85°C IC = 100 µA, VCB = 0 V IC = 10 µA −40°C ≤ TA ≤ +85°C IC = 1 mA, VCE = 10 V Current Gain Match ΔhFE Noise Voltage Density eN Offset Voltage Offset Voltage Change vs. VCB Change Offset Voltage Change vs. IC Change Offset Voltage Drift VOS ΔVOS/ΔVCB ΔVOS/ΔIC ΔVOS/ΔT Breakdown Voltage BVCEO Gain-Bandwidth Product Collector Leakage Current Base fT ICBO Substrate ICS Emitter ICES Input Current Bias IB Offset IOS Offset Drift ΔIOS/ΔT Collector Saturation Voltage Output Capacitance Bulk Resistance Input Capacitance VCE(SAT) COBO rBE CEBO Min Typ Max Unit 300 200 600 500 1 4 % 2 1.8 1.8 4 3 3 nV/√Hz nV/√Hz nV/√Hz 100 120 400 520 µV μV 100 10 200 50 µV µV 0.4 2 300 µV/°C V V MHz VCB = 40 V −40°C ≤TA ≤ +85°C VCS = 40 V −40°C ≤ TA ≤ +85°C VCE = 40 V −40°C ≤ TA ≤ +85°C 5 0.5 0.5 0.7 3 5 pA nA nA nA nA nA IC = 100 µA, 0 V ≤ VCB ≤ 30 V −40°C ≤ TA ≤ +85°C IC = 100 µA, VCB = 0 V −40°C ≤ TA ≤ +85°C IC = 100 µA −40°C ≤ TA ≤ +85°C IC = 1 mA, IB = 100 µA VCB = 15 V, IE5 = 0, f = 1 MHz 10 µA ≤ IC ≤ 10 mA,VCB = 0 V6 VCB = 15 V, IE = 0, f = 1 MHz 165 200 2 8 1 Current gain measured at IC = 10 µA, 100 µA, and 1 mA. Current gain match (ΔhFE) defined as: ΔhFE = (100(ΔIB)(hFE min)/IC). 3 Sample tested. 4 Measured at IC = 10 µA and guaranteed by design over the specified range of IC. 5 See Table 2 for the emitter current rating. 6 Guaranteed by design. 2 Rev. A | Page 3 of 12 40 40 100 0.03 10 0.4 40 330 500 13 40 0.06 0.6 nA nA nA nA pA/°C V pF Ω pF MAT14 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Voltage Collector-to-Base Voltage (BVCBO) Collector-to-Emitter Voltage (BVCEO) Collector-to-Collector Voltage (BVCC) Emitter-to-Emitter Voltage (BVEE) Current Collector Current (IC) Emitter Current (IE) Temperature Storage Temperature Range Operating Temperature Range Junction Temperature Range Rating θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. 40 V 40 V 40 V 40 V Package Type 14-Lead SOIC Table 3. Thermal Resistance ESD CAUTION 30 mA 30 mA −65°C to +150°C −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 4 of 12 θJA 115 θJC 36 Unit °C/W MAT14 700 680 660 640 620 600 580 560 540 520 500 480 460 440 420 400 380 360 340 320 300 0.001 0.70 BASE EMITTER-ON-VOLTAGE (V) 0.65 TA = 125°C TA = 85°C TA = 25°C 0.60 0.55 0.50 0.45 0.40 0.01 0.1 COLLECTOR CURRENT (mA) 1 0.30 0.001 100 10 INPUT RESISTANCE (MΩ) VCB = 20V VCB = 0V 0.1 0.01 –25 0 25 50 75 TEMPERATURE (°C) 100 125 150 0.001 0.001 Figure 3. Current Gain vs. Temperature 0.01 0.1 1 COLLECTOR CURRENT (mA) 10 Figure 6. Small Signal Input Resistance vs. Collector Current 1m 3.0 2.5 CONDUCTANCE ( ) 0.1m 2.0 1.5 1.0 0.01m 1µ NOISE = 100Hz 0.1µ 0.5 0 0 2 4 6 8 COLLECTOR CURRENT (IC) 10 12 0.01µ 1µ Figure 4. Voltage Noise Density vs. Collector Current 0.01m 0.1m 1m 0.01 COLLECTOR CURRENT (A) 0.1 1 Figure 7. Small Signal Output Conductance vs. Collector Current Rev. A | Page 5 of 12 09045-007 NOISE = 10Hz 09045-004 VOLTAGE NOISE DENSITY (nV/srtHz) 1 09045-006 700 680 660 640 620 600 580 560 540 520 500 480 460 440 420 400 380 360 340 320 300 –50 10 Figure 5. Base Emitter-On-Voltage vs. Collector Current 09045-003 CURRENT GAIN (β) Figure 2. Current Gain vs. Collector Current 0.01 0.1 1 COLLECTOR CURRENT (mA) 09045-005 0.35 09045-002 CURRENT GAIN (β) TYPICAL PERFORMANCE CHARACTERISTICS MAT14 200 10 TOTAL NOISE (nV/√Hz) SATURATION VOLTAGE (V) 160 1 TA = 125°C 0.1 120 100kΩ 80 10kΩ 40 TA = 85°C TA = 25°C 1 10 COLLECTOR CURRENT (mA) 100 09045-008 0.1 0 0.001 Figure 8. Saturation Voltage vs. Collector Current 0.1 1 Figure 10. Total Noise vs. Collector Current 20 COLLECTOR-TO-BASE CAPACITANCE (pF) 100 10µA 10 1mA 18 16 14 12 10 8 6 4 2 1 10 100 1k FREQUENCY (Hz) Figure 9. Noise Voltage Density vs. Frequency 10k 0 1 2 3 4 5 6 7 8 COLLECTOR-TO-BASE VOLTAGE (V) 9 10 09045-011 0 1 09045-009 NOISE DENSITY (nV√Hz) 0.01 COLLECTOR CURRENT (mA) 09045-010 1kΩ 0.01 0.01 Figure 11. Collector-to-Base Capacitance vs. Collector-to-Base Voltage Rev. A | Page 6 of 12 40 10 35 1 ICC CURRENT (nA) 30 25 20 15 0 1 2 3 4 5 6 7 8 9 10 COLLECTOR-TO-SUBSTRATE VOLTAGE (V) 0.001 25 1 0.1 75 100 125 09045-013 0.01 TEMPERATURE (°C) 100 Figure 14. Collector-to-Collector Leakage vs. Temperature 10 50 75 TEMPERATURE (°C) Figure 12. Collector-to-Substrate Capacitance vs. Collector-to-Substrate Voltage 0.001 25 50 Figure 13. Collector-to-Base Leakage vs. Temperature Rev. A | Page 7 of 12 125 09045-014 5 0 ICBO CURRENT (nA) 0.1 0.01 10 09045-012 COLLECTOR-TO-SUBSTRATE CAPACITANCE (pF) MAT14 MAT14 THEORY OF OPERATION APPLICATIONS INFORMATION these mirrors is reduced from that of the unity-gain source due to base current errors but remains better than 2%. To minimize coupling between devices, tie one of the substrate pins (Pin 4 or Pin 11) to the most negative circuit potential. Note that Pin 4 and Pin 11 are internally connected. IOUT = 2(IREF ) IREF Applications Current Sources Q1 IREF Q2 Q3 IOUT = IREF Q4 09045-016 MAT14 can be used to implement a variety of high impedance current mirrors as shown in Figure 15, Figure 16, and Figure 17. These current mirrors can be used as biasing elements and load devices for amplifier stages. V– Figure 16. Current Mirror, IOUT = 2(lREF) Q1 Q2 Q3 Q4 IOUT = 1/2(IREF ) IREF 09045-015 Q1 V– Q2 Q4 Q3 09045-017 Figure 15. Unity-Gain Current Mirror, IOUT = IREF V– The unity-gain current mirror shown in Figure 15 has an accuracy of better than 1% and an output impedance of more than 100 MΩ at 100 μA. Figure 17. Current Mirror, IOUT = ½(IREF) Figure 18 is a temperature independent current sink that has an accuracy of better than 1% at an output current of 100 μA to 1 mA. A Schottky diode acts as a clamp to ensure correct circuit startup at power-on. Use 1% metal film type resistors in this circuit. Figure 16 and Figure 17 each show a modified current mirror; Figure 16 is designed for a current gain of two (2), and Figure 17 is designed for a current gain of one-half (½). The accuracy of +15V 2 4 6 IOUT = IOUT R 10V R IOUT IOUT 100pF R 2 3 7 OP1177 6 2 1 3 6 7 5 9 8 13 10 14 MAT14 12 4 HP 5082-2811 R R R –15V Figure 18. Temperature Independent Current Sink, IOUT = 10 V/R Rev. A | Page 8 of 12 R 09045-018 ADR01 MAT14 OUTLINE DIMENSIONS 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 19. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 MAT14ARZ MAT14ARZ-R7 MAT14ARZ-RL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. Rev. A | Page 9 of 12 Package Option R-14 R-14 R-14 MAT14 NOTES Rev. A | Page 10 of 12 MAT14 NOTES Rev. A | Page 11 of 12 MAT14 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09045-0-12/10(A) Rev. A | Page 12 of 12