M27C64A 64K (8K x 8) UV EPROM and OTP ROM VERY FAST ACCESS TIME: 150ns COMPATIBLE with HIGH SPEED MICROPROCESSORS, ZERO WAIT STATE LOW POWER “CMOS” CONSUMPTION: – Active Current 30mA – Standby Current 100µA PROGRAMMING VOLTAGE: 12.5V ELECTRONIC SIGNATURE for AUTOMATED PROGRAMMING HIGH SPEED PROGRAMMING (less than 1 minute) DESCRIPTION The M27C64A is a high speed 65,536 bit UV erasable and electrically programmable memory EPROM ideally suited for microprocessor systems requiring large programs. It is organized as 8,192 by 8 bits. The 28 pin Window Ceramic Frit-Seal Dual-in-Line package has transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. Anew pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only on time and erasure is not required, the M27C64A is offered in Plastic Leaded Chip Carrier package. 28 1 FDIP28W (F) Figure 1. Logic Diagram VCC A0 - A12 Address Inputs Q0 - Q7 Data Outputs E Chip Enable G Output Enable P Program VPP Program Supply VCC Supply Voltage VSS Ground VPP 13 8 A0-A12 P Table 1. Signal Names PLCC32 (C) Q0-Q7 M27C64A E G VSS AI00834B March 1995 1/11 M27C64A VCC P NC A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 9 M27C64A 25 A8 A9 A11 NC G A10 E Q7 Q6 17 VSS DU Q3 Q4 Q5 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27C64A 8 21 9 20 10 19 11 18 12 17 13 16 14 15 A7 A12 VPP DU VCC P NC VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS Figure 2B. LCC Pin Connections Q1 Q2 Figure 2A. DIP Pin Connections AI00835 AI00836 Warning: NC = Not Connected Warning: NC = Not Connected, DU = Don’t Use Table 2. Absolute Maximum Ratings (1) Symbol Parameter Value Unit Ambient Operating Temperature –40 to 125 °C TBIAS Temperature Under Bias –50 to 125 °C TSTG Storage Temperature –65 to 150 °C VIO (2) Input or Output Voltages (except A9) –2 to 7 V Supply Voltage –2 to 7 V A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V TA VCC VA9 (2) VPP Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. DEVICE OPERATION The modes of operation of the M27C64A are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. 2/11 Read Mode The M27C64A has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should M27C64A be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) isequal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C64A has a standby mode which reduces the active current from 30mA to 100µA. The M27C64A is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loadingof the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. Table 3. Operating Modes Mode E G P A9 VPP Q0 - Q7 Read VIL VIL VIH X VCC Data Out Output Disable VIL VIH VIH X VCC Hi-Z Program VIL VIH VIL Pulse X VPP Data In Verify VIL VIL VIH X VPP Data Out Program Inhibit VIH X X X VPP Hi-Z Standby VIH X X X VCC Hi-Z Electronic Signature VIL VIL VIH VID VCC Codes Note: X = VIH or VIL, VID = 12V ± 0.5V Table 4. Electronic Signature Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data Manufacturer’s Code VIL 1 0 0 1 1 0 1 1 9Bh Device Code VIH 0 0 0 0 1 0 0 0 08h 3/11 M27C64A Figure 4. AC Testing Load Circuit AC MEASUREMENT CONDITIONS Input Rise and Fall Times ≤ 20ns Input Pulse Voltages 0.4 to 2.4V Input and Output Timing Ref. Voltages 0.8 to 2.0V 1.3V 1N914 Note that Output Hi-Z is defined as the point where data is no longer driven. 3.3kΩ Figure 3. AC Testing Input Output Waveforms DEVICE UNDER TEST 2.4V OUT 2.0V CL = 100pF 0.8V 0.4V AI00826 CL includes JIG capacitance AI00828 Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz ) Symbol Parameter Test Condition Input Capacitance C IN C OUT Output Capacitance Min Max Unit VIN = 0V 6 pF VOUT = 0V 12 pF Note: 1. Sampled only, not 100% tested. Figure 5. Read Mode AC Waveforms VALID A0-A12 tAVQV tAXQX E tEHQZ tGLQV G tGHQZ tELQV Q0-Q7 Hi-Z DATA OUT AI00778 4/11 M27C64A Table 6. Read Mode DC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC) Symbol Parameter Test Condition ILI Input Leakage Current ILO Output Leakage Current ICC Supply Current ICC1 Supply Current (Standby) TTL ICC2 Supply Current (Standby) CMOS IPP Program Current VIL Input Low Voltage Input High Voltage VIH (2) VOL Output Low Voltage VOH Min Max Unit 0V ≤ VIN ≤ VCC ±10 µA 0V ≤ VOUT ≤ VCC ±10 µA E = VIL, G = VIL, IOUT = 0mA, f = 5MHz 30 mA E = VIH 1 mA E > VCC – 0.2V 100 µA VPP = VCC 100 µA –0.3 0.8 V 2 VCC + 1 V 0.4 V IOL = 2.1mA Output High Voltage TTL IOH = –400µA 2.4 V Output High Voltage CMOS IOH = –100µA VCC – 0.7V V Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V. Table 7. Read Mode AC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC) M27C64A Symbol Alt Parameter Test Condition -15 -20 -25 -30 Unit Min Max Min Max Min Max Min Max tAVQV tACC Address Valid to Output Valid tELQV tCE tGLQV E = VIL, G = VIL 150 200 250 300 ns Chip Enable Low to Output Valid G = VIL 150 200 250 300 ns tOE Output Enable Low to Output Valid E = VIL 75 80 100 120 ns tEHQZ (2) tDF Chip Enable High to Output Hi-Z G = VIL 0 50 0 50 0 60 0 105 ns (2) tDF Output Enable High to Output Hi-Z E = VIL 0 50 0 50 0 60 0 105 ns tOH Address Transition to Output Transition E = VIL, G = VIL 0 tGHQZ tAXQX 0 0 0 ns Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. Sampled only, not 100% tested. 5/11 M27C64A Table 8. Programming Mode DC Characteristics (1) (TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V) Symbol Parameter Test Condition Min VIL ≤ VIN ≤ VIH Max Unit ±10 µA 30 mA 30 mA ILI Input Leakage Current ICC Supply Current IPP Program Current VIL Input Low Voltage –0.3 0.8 V VIH Input High Voltage 2 VCC + 0.5 V VOL Output Low Voltage 0.4 V VOH Output High Voltage TTL VID A9 Voltage E = VIL IOL = 2.1mA IOH = –400µA 2.4 V 11.5 12.5 V Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Table 9. Programming Mode AC Characteristics (1) (TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V) Symbol Alt Parameter Test Condition Min Max Unit tAVPL tAS Address Valid to Program Low 2 µs tQVPL tDS Input Valid to Program Low 2 µs tVPHPL tVPS VPP High to Program Low 2 µs tVCHPL tVCS VCC High to Program Low 2 µs tELPL tCES Chip Enable Low to Program Low 2 µs tPLPH tPW Program Pulse Width (Initial) 0.95 1.05 ms Program Pulse Width (Over Program) 2.85 78.75 ms tPHQX tDH Program High to Input Transition 2 µs tQXGL tOES Input Transition to Output Enable Low 2 µs tGLQV tOE Output Enable Low to Output Valid tDFP Output Enable High to Output Hi-Z 0 tAH Output Enable High to Address Transition 0 tGHQZ (2) tGHAX Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. 6/11 100 ns 130 ns ns M27C64A Figure 6. Programming and Verify Modes AC Waveforms VALID A0-A12 tAVPL Q0-Q7 DATA IN tQVPL DATA OUT tPHQX VPP tVPHPL tGLQV tGHQZ VCC tVCHPL tGHAX E tELPL P tPLPH tQXGL G PROGRAM VERIFY AI00779 Figure 7. Programming Flowchart VCC = 6V, VPP = 12.5V n =1 P = 1ms Pulse NO ++n > 25 YES NO VERIFY ++ Addr YES P = 3ms Pulse by n FAIL Last Addr NO YES CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V AI01167 Programming When delivered (and after each erasure for UV EPROM), all bits of the M27C64A are in the “1” state. Data is introduced by selectively programming ”0s” into the desired bit locations. Although only “0s” will be programmed, both “1s” and “0s” can be present in the data word. The only way to change a “0” to a ”1” is by die exposition to ultraviolet light (UV EPROM). The M27C64A is in the programming mode when Vpp input is at 12.5V, and E and P are at TTL-low. The data to be programmed is applied 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6V ± 0.25V. High Speed Programming The high speed programming algorithm, described in the flowchart, rapidly programs the M27C64A using an efficient and reliable method, particularly suited to the production programming environment. An individual device will take around1 minute to program. Program Inhibit Programming of multiple M27C64A in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27C64A may be common. A TTL low level pulse applied to a M27C64A E input, with P low and VPP 7/11 M27C64A DEVICE OPERATIONS (cont’d) at 12.5V, will program that M27C64A. A high level E input inhibits the other M27C64A from being programmed. Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E and G at VIL, P at VIH, VPP at 12.5V and VCC at 6V. Electronic Signature The Electronic Signature mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27C64A. To activate this mode, the programming equipmentmust force11.5V to 12.5V on address line A9 of the M27C64A, with VPP=VCC=5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0=VIL ) represents the manufacturer code and byte 1 (A0=VIH) the device identifier code. For the SGS-THOMSON M27C64A, these two identifier bytes are given in Table 4 and can be read-out on outputs Q0 to Q7. ERASURE OPERATION (applies to UV EPROM) The erasure characteristics of the M27C64A is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C64A in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C64A is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27C64Awindow to prevent unintentional erasure. The recommended erasure procedure for the M27C64A is exposure to short wave ultraviolet light which has a wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 uW/cm2 powerrating. The M27C64A should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubeswhich should be removed beforeerasure. ORDERING INFORMATION SCHEME Example: M27C64A -15 F Package Speed 1 TR Option Temperature Range -15 150 ns F FDIP28W 1 0 to 70 °C -20 200 ns C PLCC32 6 –40 to 85 °C -25 250 ns -30 300 ns X TR Additional Burn-in Tape & Reel Packing For a list of available options (Speed, Package, etc...) refer to the current Memory Shortform catalogue. For further information on any aspect of this device, please contact SGS-THOMSON Sales Office nearest to you. 8/11 M27C64A FDIP28W - 28 pin Ceramic Frit-seal DIP, with window mm Symb Typ inches Min Max A Typ Min 5.71 Max 0.225 A1 0.50 1.78 0.020 0.070 A2 3.90 5.08 0.154 0.200 B 0.40 0.55 0.016 0.022 B1 1.17 1.42 0.046 0.056 C 0.22 0.31 0.009 0.012 D 38.10 E E1 15.40 15.80 1.500 0.606 0.622 13.05 13.36 0.514 0.526 e1 2.54 – – 0.100 – – e3 33.02 – – 1.300 – – eA 16.17 18.32 0.637 0.721 L 3.18 4.10 0.125 0.161 1.52 2.49 0.060 0.098 – – – – α 4° 15° 4° 15° N 28 S ∅ 7.11 0.280 28 FDIP28W A2 A1 B1 B A L α e1 eA C e3 D S N ∅ E1 E 1 FDIPW-a Drawing is no to scale 9/11 M27C64A PLCC32 - 32 lead Plastic Leaded Chip Carrier - rectangular mm Symb Typ inches Min Max A 2.54 A1 Min Max 3.56 0.100 0.140 1.52 2.41 0.060 0.095 B 0.33 0.53 0.013 0.021 B1 0.66 0.81 0.026 0.032 D 12.32 12.57 0.485 0.495 D1 11.35 11.56 0.447 0.455 D2 9.91 10.92 0.390 0.430 E 14.86 15.11 0.585 0.595 E1 13.89 14.10 0.547 0.555 E2 12.45 13.46 0.490 0.530 – – – – e 1.27 Typ 0.050 N 32 32 Nd 7 7 Ne 9 9 CP 0.10 0.004 PLCC32 D D1 A1 1 N B1 E1 E Ne e D2/E2 B A Nd PLCC Drawing is no to scale 10/11 CP M27C64A Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1995 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 11/11