AD ADM483EAR

a
615 kV ESD Protected, EMC Compliant
Slew Rate Limited, EIA RS-485 Transceiver
ADM483E
FEATURES
Robust RS-485 Transceiver
15 kV ESD Protection Using HBM
2 kV EFT Protection Meets IEC1000-4-4
High EM Immunity Meets IEC1000-4-3
Reduced Slew Rate for Low EM Interference
250 kbps Data Rate
Single +5 V 6 10% Supply
–7 V to +12 V Bus Common-Mode Range
12 kV Input Impedance
Short Circuit Protection
Excellent Noise Immunity
36 mA Supply Current
0.1 mA Shutdown Current
FUNCTIONAL BLOCK DIAGRAM
ADM483E
RO
R
B
RE
DE
DI
A
D
APPLICATIONS
Low Power RS-485 Systems
Electrically Harsh Environments
EMI Sensitive Applications
DTE-DCE Interface
Packet Switching
Local Area Networks
GENERAL DESCRIPTION
The ADM483E is a robust, low power differential line transceiver suitable for communication on multipoint bus transmission lines. Internal protection against electrostatic discharge
(ESD), electrical fast transient (EFT) and electromagnetic
immunity (EMI) allows operation in electrically harsh environments. ESD protection on the I-O lines meets ± 15 kV when
tested using the Human Body Model. EFT protection meets
± 2 kV in accordance with IEC1000-4-4, while EMI immunity is
in excess of 10 V/m meeting IEC1000-4-3.
The level of unwanted emissions is also carefully controlled
using slew limiting on the driver outputs. This reduces reflections with improperly terminated cables and also minimizes
electromagnetic interference. The controlled slew rate limits the
data rate to 250 kbps.
The ADM483E is intended for balanced data transmission and
complies with both EIA Standards RS-485 and RS-422. It
contains a differential line driver and a differential line receiver
and is suitable for half duplex data transmission, as the driver
and receiver share the same differential pins.
The input impedance on the ADM483E is 12 kΩ, allowing up
to 32 transceivers on the bus.
The ADM483E operates from a single +5 V ± 10% power supply. Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit. This
feature forces the driver output into a high impedance state if,
during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM483E is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with robust
bipolar technology.
It is fully specified over the industrial temperature range and is
available in 8-lead DIP and SOIC packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
ADM483E–SPECIFICATIONS (V
CC
Parameter
Min
= +5 V 6 10%. All specifications TMIN to TMAX unless otherwise noted)
Typ
DRIVER
Differential Output Voltage, VOD
2.0
1.5
1.5
∆|VOD| for Complementary Output States
Common-Mode Output Voltage VOC
∆|VOC| for Complementary Output States
Output Short Circuit Current (VOUT = High)
Output Short Circuit Current (VOUT = Low)
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
2.0
Logic Input Current (DE, DI)
RECEIVER
Differential Input Threshold Voltage, VTH
Input Voltage Hysteresis, ∆VTH
Input Resistance
Input Current (A, B)
1.4
1.4
–0.2
Units
Test Conditions/Comments
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
V
V
V
V
V
V
V
mA
mA
V
V
µA
VCC = 5.25 V. R = ∞, Figure 1
R = 50 Ω (RS-422), Figure 1
R = 27 Ω (RS-485), Figure 1
VTST = –7 V to +12 V, Figure 2, VCC ≥ 4.75 V
R = 27 Ω or 50 Ω, Figure 1
R = 27 Ω or 50 Ω, Figure 1
R = 27 Ω or 50 Ω
–7 V ≤ VO ≤ +12 V
–7 V ≤ VO ≤ +12 V
–7 V ≤ VCM ≤ +12 V
VCM = 0 V
–7 V ≤ VCM ≤ +12 V
VIN = 12 V
VIN = –7 V
85
± 1.0
V
mV
kΩ
mA
mA
µA
V
V
mA
µA
60
360
10
µA
µA
µA
Outputs Unloaded, Receivers Enabled
DE = 0 V (Disabled) RE = 0 V
DE = 5 V (Enabled) = RE = 0 V
DE = 0 V, RE = VCC
kV
kV
kV
V/m
HBM Air Discharge. A, B Pins
HBM 3015.7 Contact Discharge. All Pins
IEC1000-4-4, A, B Pins
IEC1000-4-3
± 1.0
+0.2
70
12
+1
–0.8
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL
CMOS Output Voltage High, VOH
Short Circuit Output Current
Three-State Output Leakage Current
Max
±1
0.4
4.0
7
POWER SUPPLY CURRENT
ICC (ADM483E)
36
270
0.1
Supply Current in Shutdown
ESD/EFT IMMUNITY
ESD Protection
± 15
± 3.5
±2
10
EFT Protection
EMI Immunity
IOUT = +4.0 mA
IOUT = –4.0 mA
VOUT = GND or VCC
0.4 V ≤ VOUT ≤ +2.4 V
Specifications subject to change without notice.
TIMING SPECIFICATIONS
(VCC = +5 V 6 10%. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
DRIVER
Propagation Delay Input to Output TPLH, TPHL
Driver O/P to O/P TSKEW
Driver Rise/Fall Time TR, TF
Driver Enable to Output Valid
Driver Disable Timing
RECEIVER
Propagation Delay Input to Output TPLH, TPHL
Skew |TPLH–TPHL|
Receiver Enable TEN1
Receiver Disable TEN2
SHUTDOWN
Time to Shutdown
Driver Enable from Shutdown
Receiver Enable from Shutdown
Min Typ
Max
Units
Test Conditions/Comments
250
2000
800
2000
2000
3000
ns
ns
ns
ns
ns
RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
RL Diff = 54 Ω CL1 = CL2 = 100 pF, Figure 5
RL = 500 Ω, CL = 100 pF, Figure 3
RL = 500 Ω, CL = 15 pF, Figure 3
2000
CL = 15 pF, Figure 5
50
50
ns
ns
ns
ns
RL = 1 kΩ, CL = 15 pF, Figure 4
RL = 1 kΩ, CL = 15 pF, Figure 4
600
2000
2500
ns
ns
ns
RL = 500 Ω, CL = 100 pF, Figure 3
RL = 1 kΩ, CL = 15 pF, Figure 4
100
250
250
300
250
200
10
10
50
200
Specifications subject to change without notice.
–2–
REV. 0
ADM483E
ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTION
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V
Inputs
Driver Input (DI) . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Control Inputs (DE, RE) . . . . . . . . . . –0.5 V to VCC + 0.5 V
Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . –14 V to +14 V
Outputs
Driver Outputs . . . . . . . . . . . . . . . . . . . . –12.5 V to +12.5 V
Receiver Output . . . . . . . . . . . . . . . . . –0.5 V to VCC +0.5 V
ESD Rating: Air (Human Body Model) (A, B Pins) . . ± 15 kV
ESD Rating: Contact (Human Body Model)
(A, B Pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 8 kV
ESD Rating MIL-STD-883B Method 3015
(Except A, B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 3.5 kV
EFT Rating (IEC1000-4-4) (A, B Pins) . . . . . . . . . . . . ± 2 kV
EMI Immunity (IEC1000-4-3) . . . . . . . . . . . . . . . . . . 10 V/m
Power Dissipation 8-Pin DIP . . . . . . . . . . . . . . . . . . . 727 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . +135°C/W
Power Dissipation 8-Pin SOIC . . . . . . . . . . . . . . . . . 470 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . +110°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Pin Mnemonic Function
1
RO
Receiver Output. When enabled if A > B by
200 mV, then RO = High. If A < B by
200 mV, then RO = Low.
2
RE
Receiver Output Enable. A low level enables
the receiver output, RO. A high level places it
in a high impedance state.
3
DE
Driver Output Enable. A high level enables
the driver differential outputs, A and B. A
low level places it in a high impedance state.
4
DI
Driver Input. When the driver is enabled a
logic Low on DI forces A low and B high
while a logic High on DI forces A high and B
low.
5
GND
Ground Connection, 0 V.
6
A
Noninverting Receiver Input A/Driver
Output A.
7
B
Inverting Receiver Input B/Driver Output B.
8
VCC
Power Supply, 5 V ± 10%.
PIN CONFIGURATION
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
Temperature Range
Package Option
ADM483EAN
ADM483EAR
–40°C to +85°C
–40°C to +85°C
N-8
SO-8
VCC
7
B
6
A
DI 4
5
GND
RE 2
DE 3
ORDERING GUIDE
Model
1
8
RO
ADM483E
TOP VIEW
(Not to Scale)
Table I. Selection Table
Part No.
Duplex
Data Rate
kb/s
Low Power
Shutdown
Tx/Rx
Enable
ICC
mA
No of Tx/Rx
On Bus
ESD
kV
EFT
kV
EMI
V/m
ADM483E
Half
250
Yes
Yes
36
32
± 15
±2
10
REV. 0
–3–
ADM483E
Test Circuits
VCC
A
R
RL
S1
0V OR 3V
VOD
DE
R
S2
CL
VOUT
B
VOC
DE IN
Figure 1. Driver Voltage Measurement Test Circuit
Figure 3. Driver Enable/Disable Test Circuit
VCC
+15V
375Ω
S1
VOD3
60Ω
RL
S2
VTST
RE
–15V
CL
VOUT
375Ω
RE IN
Figure 2. Driver Voltage Measurement Test Circuit 2
Figure 4. Receiver Enable/Disable Test Circuit
CL1
DI
A
RO
RLDIFF
D
R
CL2
B
RE
Figure 5. Receiver Propagation Delay Test Circuit
Switching Characteristics
3V
3V
1.5V
1.5V
DE
TPLH
0V
1.5V
1.5V
TPHL
0V
TZL
B
TLZ
1/2VO
VO
A, B
2.3V
A
VOL+ 0.5V
TSKEW
VO
TSKEW
90% POINT
VOL
TZH
90% POINT
THZ
VOH
0V
–VO
10% POINT
A, B
10% POINT
TR
VOH – 0.5V
2.3V
TF
0V
Figure 7. Driver Enable/Disable Timing
Figure 6. Driver Propagation Delay, Rise/Fall Timing
3V
RE
A–B
1.5V
1.5V
0V
0V
0V
TZL
TPLH
TPHL
R
TLZ
1.5V
VOL+ 0.5V
O/P LOW
VOH
VOL
RO
1.5V
TZH
1.5V
THZ
VOH
O/P HIGH
VOL
R
1.5V
VOH – 0.5V
0V
Figure 8. Receiver Propagation Delay
Figure 9. Receiver Enable/Disable Timing
–4–
REV. 0
Typical Performance Characteristics–ADM483E
40
90
0
80
30
25
20
15
10
OUTPUT CURRENT – mA
OUTPUT CURRENT – mA
OUTPUT CURRENT – mA
35
–5
–10
–15
60
50
40
30
20
5
10
0
0
0.5
1.0
1.5
2.0
OUTPUT VOLTAGE – Volts
–20
3.4
2.5
Figure 11. Receiver Output Low
Voltage vs. Output Current
0
3.6
3.8 4.0 4.2 4.4 4.6 4.8
OUTPUT VOLTAGE – Volts
0
5.0
Figure 12. Receiver Output High
Voltage vs. Output Current
0
80
–10
70
–20
OUTPUT CURRENT – mA
–30
–40
–50
–60
–70
0.5
1.0
1.5
2.0
2.5
OUTPUT VOLTAGE – Volts
3.0
Figure 13. Driver Output Low
Voltage vs. Output Current
T
100
90
60
T
50
RO
40
T
DI
30
10
0%
20
10
–80
–90
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE – Volts
Figure 14. Driver Output High
Voltage vs. Output Current
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT VOLTAGE – Volts
Figure 16. ADM483E Driving
4000 ft. of Cable
Figure 15. Driver Differential Output
Voltage vs. Output Current
dBµV
100
90
10dB/DIV
80
80
70
70
60
60
50
50
40
LIMIT
dBµV
OUTPUT CURRENT – mA
70
LIMIT
40
30
30
20
20
10
10
10
0%
0
500kHz/DIV
5MHz
Figure 17. Driver Output Waveform
and FFT Plot Transmitting @ 150 kHz
REV. 0
0
0
30
FREQUENCY – MHz
3
6 10
0.3 0.6 1
LOG FREQUENCY (0.15–30) – MHz
Figure 18. Radiated Emissions
Figure 19. Conducted Emissions
200
–5–
30
ADM483E
GENERAL INFORMATION
The ADM483E is a ruggedized RS-485 transceiver that operates
from a single +5 V supply.
Tables II and III show the truth tables for transmitting and
receiving.
Table II. Transmitting Truth Table
It contains protection against radiated and conducted interference, including high levels of electrostatic discharge.
Inputs
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
+5V
0.1µF
B
A
A
ADM483E
RS485/RS-422 LINK
DI
RO
DE
GND
GND
RO
1
0
1
Hi-Z
X = Don’t Care.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or
heating. Even if catastrophic failure does not occur immediately, the device may suffer from parametric degradation, which
may result in degraded performance. The cumulative effects of
continuous exposure can eventually lead to complete failure.
DE
DI
B
A-B
≥ +0.2 V
≤ –0.2 V
Inputs O/C
X
Two coupling methods are used for ESD testing, contact
discharge and air-gap discharge. Contact discharge calls for a
direct connection to the unit being tested. Air-gap discharge
uses a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun is
moved toward the unit under test, developing an arc across the
air gap, hence the term air-discharge. This method is influenced
by humidity, temperature, barometric pressure, distance and
rate of closure of the discharge gun. The contact-discharge
method, while less realistic, is more repeatable and is gaining
acceptance and preference over the air-gap method.
The communications network may be extended to include
multipoint connections as shown in Figure 30. Up to 32
transceivers may be connected to the bus.
ADM483E
DE
0
0
0
0
ESD TESTING
A typical application for the ADM483E is illustrated in Figure
20. This shows a half-duplex link where data may be transferred
at rates up to 250 kbps. A terminating resistor is shown at both
ends of the link. This termination is not critical since the slew
rate is controlled by the ADM483E and reflections are minimized.
RO
RE
0
0
0
1
Outputs
The protection structure achieves ESD protection up to ± 15 kV
according to the Human Body Model, and EFT protection up
to ± 2 kV on all I-O lines.
The ADM483 can transmit at data rates up to 250 kbps.
VCC
Inputs
The ADM483E uses protective clamping structures on its
inputs and outputs that clamp the voltage to a safe level and
dissipates the energy present in ESD (Electrostatic) and EFT
(Electrical Fast Transients) discharges.
Low electromagnetic emissions are achieved using slew limited
drivers, minimizing interference both conducted and radiated.
VCC
A
1
0
Hi-Z
Hi-Z
ESD/EFT TRANSIENT PROTECTION SCHEME
A high level of robustness is achieved using internal protection
circuitry, eliminating the need for external protection components such as tranzorbs or surge suppressors.
RE
B
0
1
Hi-Z
Hi-Z
Table III. Receiving Truth Table
The ADM483E operates from a single +5 V ± 10% power
supply. Excessive power dissipation caused by bus contention or
by output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
0.1µF
DI
1
0
X
X
X = Don’t Care.
The input impedance on the ADM483E is 12 kΩ, allowing up to
32 transceivers on the differential bus.
+5V
DE
1
1
0
0
RE
X
X
0
1
It is ideally suited for operation in electrically harsh environments or where cables may be plugged/unplugged. It is also
immune to high RF field strengths without special shielding
precautions. It is intended for balanced data transmission and
complies with both EIA Standards RS-485 and RS-422. It contains a differential line driver and a differential line receiver, and
is suitable for half duplex data transmission as the driver and
receiver share the same differential pins.
Outputs
RE
HIGH
VOLTAGE
GENERATOR
R2
DEVICE
UNDER TEST
C1
Figure 20. Typical Half-Duplex Link Application
ESD Test Method
R2
C1
Human Body Model
1.5K
100pF
Figure 21. ESD Generator
–6–
REV. 0
ADM483E
I-O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I-O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I-O port.
V
t
It is, therefore, extremely important to have high levels of ESD
protection on the I-O lines.
300ms
16ms
V
It is possible that the ESD discharge could induce latchup in the
device under test. It is therefore important that ESD testing on
the I-O pins be carried out while device power is applied. This
type of testing is more representative of a real world I-O
discharge where the equipment is operating normally when the
discharge occurs.
5ns
50ns
t
0.2/0.4ms
100%
Figure 23. IEC1000-4-4 Fast Transient Waveform
90%
IPEAK
Table V shows the peak voltages for each of the environments.
Table V.
Level
VPEAK (kV)
PSU
VPEAK (kV)
I-O
1
2
3
4
0.5
1
2
4
0.25
0.5
1
2
36.8%
10%
TIME t
tRL
tDL
Figure 22. Human Body Model ESD Current Waveform
Table IV. ADM483E ESD Test Results
ESD Test Method
I-O Pins
Other Pins
Human Body Model: Air
Human Body Model: Contact
± 15 kV
± 8 kV
± 3.5 V
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
IEC1000-4-4 (previously 801-4) covers electrical fast-transient/
burst (EFT) immunity. Electrical fast transients occur as a
result of arcing contacts in switches and relays. The tests
simulate the interference generated when, for example, a power
relay disconnects an inductive load. A spark is generated due to
the well known back EMF effect. In fact, the spark consists of a
burst of sparks as the relay contacts separate. The voltage
appearing on the line, therefore, consists of a burst of extremely
fast transient impulses. A similar effect occurs when switching
on fluorescent lights.
The fast transient burst test, defined in IEC1000-4-4, simulates
this arcing and its waveform is illustrated in Figure 23. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at
300 ms intervals. It is specified for both power and data lines.
Four severity levels are defined in terms of an open-circuit
voltage as a function of installation environment. The installation environments are defined as
1.
2.
3.
4.
Well-protected
Protected
Typical Industrial
Severe Industrial
REV. 0
A simplified circuit diagram of the actual EFT generator is
illustrated in Figure 24.
These transients are coupled onto the signal lines using an EFT
coupling clamp. The clamp is 1 m long and completely surrounds the cable, providing maximum coupling capacitance
(50 pF to 200 pF typ) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns) as specified by the standard result in very
effective coupling. This test is very severe since high voltages are
coupled onto the signal lines. The repetitive transients can often
cause problems, where single pulses do not. Destructive latchup
may be induced due to the high energy content of the transients.
Note that this stress is applied while the interface products are
powered up and are transmitting data. The EFT test applies
hundreds of pulses with higher energy than ESD. Worst case
transient current on an I-O line can be as high as 40 A.
HIGH
VOLTAGE
SOURCE
RC
CC
RM CD
L
50Ω
OUTPUT
ZS
Figure 24. EFT Generator
Test results are classified according to the following
1. Normal performance within specification limits.
2. Temporary degradation or loss of performance that is selfrecoverable.
3. Temporary degradation or loss of function or performance
that requires operator intervention or system reset.
4. Degradation or loss of function that is not recoverable due to
damage.
–7–
ADM483E
EMI EMISSIONS
The ADM483E has been tested under worst case conditions
using unshielded cables, and meets Classification 2 at severity
Level 4. Data transmission during the transient condition is
corrupted, but it may be resumed immediately following the
EFT event without user intervention.
The ADM483E contains internal slew rate limiting in order to
minimize the level of electromagnetic interference generated.
Figure 25 shows an FFT plot when transmitting a 150 kHz
data stream.
RADIATED IMMUNITY (IEC1000-4-3)
IEC1000-4-3 (previously IEC801-3) describes the measurement
method and defines the levels of immunity to radiated electromagnetic fields. It was originally intended to simulate the electromagnetic fields generated by portable radio transceivers or any
other device that generates continuous wave radiated electromagnetic energy. Its scope has since been broadened to include
spurious EM energy, which can be radiated from fluorescent
lights, thyristor drives, inductive loads, etc.
100
90
10dB/DIV
10
0%
Testing for immunity involves irradiating the device with an EM
field. There are various methods of achieving this including use
of anechoic chamber, stripline cell, TEM cell and GTEM cell.
These consist essentially of two parallel plates with an electric
field developed between them. The device under test is placed
between the plates and exposed to the electric field. There
are three severity levels having field strengths ranging from
1 V to 10 V/m. Results are classified in a similar fashion to those
for IEC1000-4-2.
0
As may be seen, the slew limiting attenuates the high frequency
components. EMI is therefore reduced, as are reflections due to
improperly terminated cables.
EN55022, CISPR22 defines the permitted limits of radiated
and conducted interference from Information Technology
Equipment (ITE).
The objective is to control the level of emissions, both conducted and radiated.
For ease of measurement and analysis, conducted emissions are
assumed to predominate below 30 MHz, while radiated
emissions predominate above this frequency.
The ADM483E comfortably meets Classification 1 at the most
stringent (Level 3) requirement. In fact, field strengths up to
30 V/m showed no performance degradation and error-free data
transmission continued even during irradiation.
CONDUCTED EMISSIONS
This is a measure of noise that is conducted onto the mains
power supply. The noise is measured using a LISN (Linc
Impedance Stabilizing Network) and a spectrum analyzer. The
test setup is illustrated in Figure 26. The spectrum analyzer is
set to scan the spectrum from 0 MHz to 30 MHz. Figure 27
shows that the level of conducted emissions from the
ADM483E are well below the allowable limits.
Table VI.
Field Strength
1
2
3
1
3
10
5MHz
Figure 25. Driver Output Waveform and FFT Plot Transmitting @ 150 kHz
1. Normal Operation.
2. Temporary Degradation or loss of function that is selfrecoverable when the interfering signal is removed.
3. Temporary degradation or loss of function that requires
operator intervention or system reset when the interfering
signal is removed.
4. Degradation or loss of function that is not recoverable due to
damage.
Level
V/m
500kHz/DIV
SPECTRUM
ANALYSER
DUT
LISN
PSU
Figure 26. Conducted Emissions Test Setup
–8–
REV. 0
ADM483E
APPLICATIONS INFORMATION
Differential Data Transmission
80
70
LIMIT
60
dBµV
50
40
30
20
The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmission line with up to 10 receivers.
10
0
0.3 0.6 1
3
6 10
LOG FREQUENCY (0.15–30) – MHz
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals that appear as common-mode voltages on the
line. There are two main standards approved by the Electronics Industries Association (EIA) that specify the electrical
characteristics of transceivers used in differential data transmission.
30
Figure 27. Conducted Emissions
RADIATED EMISSIONS
Radiated emissions are measured at frequencies in excess of
30 MHz.
A typical test setup for monitoring radiated emissions is
illustrated in Figure 28.
RADIATED NOISE
In order to cater for true multipoint communications, the RS485 standard was defined. This standard meets or exceeds all
the requirements of RS-422, but also allows for up to 32 drivers
and 32 receivers to be connected to a single bus. An extended
common-mode range of –7 V to +12 V is defined. The most
significant difference between RS-422 and RS-485 is the fact
that the drivers may be disabled, thereby allowing more than
one (32 in fact) to be connected to a single line. Only one driver
should be enabled at a time, but the RS-485 standard contains
additional specifications to guarantee device safety in the event
of line contention.
Cable and Data Rate
OUT
TURNTABLE
ADJUSTABLE
ANTENNA
TO
RECEIVER
Figure 28. Radiated Emissions Test Setup
Figure 29 shows that the level of radiated emissions is also well
below the allowable limit.
80
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.
A typical application showing a multipoint transmission network
is illustrated in Figure 30. An RS-485 transmission line can have
as many as 32 transceivers on the bus. Only one driver can
transmit at a particular time, but multiple receivers may be
enabled simultaneously.
70
RT
RT
60
dBµV
50
D
40
D
LIMIT
30
R
R
20
10
R
0
30
D
R
D
200
FREQUENCY – MHz
Figure 29. Radiated Emissions
REV. 0
Figure 30. Typical RS-485 Network
–9–
ADM483E
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC (SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
PIN 1
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
SEATING
PLANE
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
8-Pin Plastic DIP (N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
0.240 (6.10)
1
4
PIN 1
0.210 (5.33)
MAX
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.022 (0.558) 0.100 0.070 (1.77)
0.014 (0.356) (2.54) 0.045 (1.15)
BSC
SEATING
PLANE
–10–
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
REV. 0
–11–
–12–
PRINTED IN U.S.A.
C2934–12–1/97