FAIRCHILD FKPF5N80

FKPF5N80
FKPF5N80
Application Explanation
•
•
•
•
Switching mode power supply, light dimmer, electric flasher unit
TV sets, stereo, refrigerator, washing machine, bread maker
Electric blanket, solenoid driver, small motor control
Photo copier, electric tool
2
1: T1
2: T2
3: Gate
3
1 2 3
TO-220F
1
Bi-Directional Triode Thyristor Planar Silicon
Absolute Maximum Ratings TC=25°C unless otherwise noted
Symbol
VDRM
Parameter
Repetitive Peak Off-State Voltage (Note1 )
Rating
800
Units
V
Symbol
IT (RMS)
Parameter
RMS On-State Current
Conditions
Commercial frequency, sine full wave 360°
conduction, TC=104°C
Rating
5
Units
A
ITSM
Surge On-State Current
Sinewave 1 full cycle, peak value,
non-repetitive
50Hz
50
A
60Hz
55
A
12.5
A2s
50
A/µs
I2t
I2t for Fusing
Value corresponding to 1 cycle of halfwave,
surge on-state current, tp=10ms
IG = 2x IGT, tr ≤ 100ns
di/dt
Critical Rate of Rise of On-State Current
PGM
Peak Gate Power Dissipation
PG (AV)
5
W
Average Gate Power Dissipation
0.5
W
VGM
Peak Gate Voltage
10
V
IGM
Peak Gate Current
2
A
TJ
Junction Temperature
- 40 ~ 125
°C
TSTG
Storage Temperature
- 40 ~ 125
°C
Viso
Isolation Voltage
1500
V
Ta=25°C, AC 1 minute, T1 T2 G terminal to
case
Thermal Characteristic
Symbol
Rth(J-C)
Parameter
Thermal Resistance
©2004 Fairchild Semiconductor Corporation
Test Condition
Junction to case (Note 4)
Min.
-
Typ.
-
Max.
3.9
Units
°C/W
Rev. A, April 2004
Symbol
IDRM
Parameter
Repetieive Peak Off-State Current
VTM
On-State Voltage
VGT
Gate Trigger Voltage (Note 2)
Test Condition
VDRM applied
Typ.
-
Max.
20
Units
µA
-
-
1.5
V
V
TC=25°C, ITM=7.5A
Instantaneous measurement
I
II
VD=12V, RL=20Ω
III
I
Gate Trigger Current (Note 2)
IGT
Min.
-
II
VD=12V, RL=20Ω
III
T2(+), Gate (+)
-
-
1.5
T2(+), Gate (-)
-
-
1.5
V
T2(-), Gate (-)
-
-
1.5
V
T2(+), Gate (+)
-
-
20
mA
T2(+), Gate (-)
-
-
20
mA
T2(-), Gate (-)
-
-
20
mA
VGD
Gate Non-Trigger Voltage
TJ=125°C, VD=1/2VDRM
0.2
-
-
V
IH
Holding Current
VD = 12V, ITM = 1A
-
-
30
mA
IL
Latching Current
VD = 12V, IG = 1.2IGT
-
-
30
mA
-
-
50
mA
-
300
-
V/µs
10
-
-
V/µs
I, III
II
dv/dt
Critical Rate of Rise of
Off-State Voltag
VDRM = Rated, Tj = 125°C,
Exponential Rise
(dv/dt)C
Critical-Rate of Rise of Off-State
Commutating Voltage (Note 3)
Notes:
1. Gate Open
2. Measurement using the gate trigger characteristics measurement circuit
3. The critical-rate of rise of the off-state commutating voltage is shown in the table below
4. The contact thermal resistance RTH(c-f) in case of greasing is 0.5 °C/W
VDRM
(V)
FKPF5N80
Commutating voltage and current waveforms
(inductive load)
Test Condition
Supply Voltage
1. Junction Temperature
TJ=125°C
2. Rate of decay of on-state
commutating current
(di/dt)C = - 3.0A/ms
3. Peak off-state voltage
VD = 400V
Time
(di/dt)C
Main Current
Time
Time
Main Voltage
(dv/dt)C
VD
Quadrant Definitions for a Triac
T2 Positive
+
(+) T2
Quadrant II
(-) IGT
GATE
(+) T2
(+) IGT
GATE
T1
Quadrant I
T1
IGT -
+ IGT
(-) T2
Quadrant III
(-) IGT
GATE
(-) T2
(+) IGT
GATE
T1
Quadrant IV
T1
T2 Negative
©2004 Fairchild Semiconductor Corporation
Rev. A, April 2004
FKPF5N80
Electrical Characteristics TC=25°C unless otherwise noted
FKPF5N80
Typical Curves
80
PEAK SURGE ON-STATE CURRENT [A]
20
o
ON-STATE CURRENT [A]
25 C
15
o
125 C
10
5
0
0.0
0.5
1.0
1.5
70
60
50
40
30
20
10
0
2.0
1
10
100
GATE VOLTAGE [V]
VGM=10V
PGM=5W
PG(AV)=0.5W
IGM=2A
VGT=1.5V
1
IRGTⅠ
VGD=0.2V
IFGTⅠ, IRGTⅢ
100
1000
Figure 2. Rated Surge On-state Current
NORMALIZED GATE TRIGGER CURRENT [%]
Figure 1. Maximum On-state Characteristics
0.1
10
1000
TYPICAL EXAMPLE
IⅡ, IⅢ
IⅠ
100
10
-60
-20
0
20
40
60
80
100
120
140
o
JUNCTION TEMPERATURE [ C]
Figure 3. Gate Characteristics
Figure 4. Gate Trigger Current vs Tj
1000
100
100
-40
-20
0
20
40
60
80
100
120
o
JUNCTION TEMPERATURE [ C]
Figure 5. Gate Trigger Voltage vs Tj
©2004 Fairchild Semiconductor Corporation
140
JUNCTION TO CASE
10
o
Rth(j-c) [ C/W]
TRANSIENT THERMAL IMPEDANCE
NORMALIZED GATE TRIGGER VOLTAGE [%]
-40
10000
GATE CURRENT [mA]
10
-60
100
NUMBER OF CYCLES AT 50Hz AND 60Hz
ON-STATE VOLTAGE [V]
10
60Hz
50Hz
1
0.1
0.01
1E-3
0.01
0.1
1
10
100
TIME [sec]
Figure 6. Transient Thermal Impedance
Rev. A, April 2004
FKPF5N80
Typical Curves (Continues)
160
①NO HEAT SINK
② 30 × 30 × 2 mm AL HEAT SINK
③ 50 × 50 × 2 mm AL HEAT SINK
④ 70 × 70 × 2 mm AL HEAT SINK
⑤ 100 × 100 × 2 mm AL HEAT SINK
120
100
80
⑤
60
④
40
③
20
0
1
120
100
80
60
o
360
CONDUCTION
RESISTIVE,
INDUCTIVE
LOADS
40
20
②
①
0
CURVES APPLY REGARDLESS
OF CONDUCTION ANGLE
140
o
140
CASE TEMPERATURE [ C]
MAXIMUM ALLOWABLE AMBIENT
o
TEMPERATURE [ C]
160
2
3
4
5
6
0
7
0
1
2
RMS ON-STATE CURRENT [A]
ON-STATE POWER DISSIPATION [W]
12
o
360
CONDUCTION
RESISTIVE,
INDUCTIVE
LOADS
8
6
4
2
0
0
1
2
3
4
5
6
7
4
5
6
7
Figure 8. Allowable Case Temperature
vs Rms On-state Current
8
9
10
NORMALIZED REPETIVITE OFF-STATE CURRENT [%]
Figure 7. Allowable Ambient Temperature
vs Rms On-state Current
10
3
RMS ON-STATE CURRENT [A]
5
10
TYPICAL EXAMPLE
4
10
3
10
2
10
-60
-40
-20
0
20
40
60
80
100
120
140
o
JUNCTION TEMPERATURE [ C]
RMS ON-STATE CURRNT [A]
Figure 9. Maximum On-state Power Dissipation
Figure 10. Repetitive Peak Off-state Current
vs Junction Temperature
1000
NORMALIZED LATCHING CURRENT [%]
NORMALIZED HOLDING CURRENT [%]
1000
100
10
-60
-40
-20
0
20
40
60
80
100
o
JUNCTION TEMPERATURE [ C]
Figure 11. Holding Current vs
Junction Temperature
©2004 Fairchild Semiconductor Corporation
120
140
ILⅢ
100
ILⅠ, ILⅡ
10
-60
-40
-20
0
20
40
60
80
100
120
140
o
JUNCTION TEMPERATURE [ C]
Figure 12. Laching Current vs
Junction Temperature
Rev. A, April 2004
FKPF5N80
Typical Curves (Continues)
1000
140
120
100
80
60
40
20
0
-60
-40
-20
0
20
40
60
80
100
120
140
NORMALIZED GATE TRIGGER CURRENT [%]
NORMALIZED BREAKDOWN VOLTAGE [%]
160
IⅡ
IⅢ
100
IⅠ
10
1
10
100
GATE CURRENT PULSE WIDTH [µs]
o
JUNCTION TEMPERATURE [ C]
Figure 13. Breakover Voltage vs.
Junction Temperature
Figure 14. Gate Trigger Current vs.
Gate Current Pulse Width
CRITICAL RATE OF RISE OF OFF-STATE
COMMUTATION VOLTAGE [V/us]
160
TYPICAL EXAMPLE
140
o
Tj=125 C
120
100
Ⅰ QUADRANT
80
60
Ⅲ QUADRANT
40
20
0
1
10
10
2
10
3
RATE OF RISE OF OFF-STATE VOLTAGE [V/ µ s]
Figure 15. Breakover Voltage vs.
Rate of Rise of Off-State Voltage
©2004 Fairchild Semiconductor Corporation
10
4
100
Ⅰ QUADRANT
TYPICAL
EXAMPLE
o
Tj=125 C
IT=4A
τ = 500us
VD=200V
F=3Hz
10
1
Ⅲ QUADRANT
1
10
100
RATE OF DECAY OF ON-STATE
COMMUTATION CURRENT [A/ms]
Figure 16. Commutation Characteristics
Rev. A, April 2004
FKPF5N80
Package Dimension
3.30 ±0.10
TO-220F
10.16 ±0.20
2.54 ±0.20
ø3.18 ±0.10
(7.00)
(1.00x45°)
15.87 ±0.20
15.80 ±0.20
6.68 ±0.20
(0.70)
0.80 ±0.10
)
0°
(3
9.75 ±0.30
MAX1.47
#1
+0.10
0.50 –0.05
2.54TYP
[2.54 ±0.20]
2.76 ±0.20
2.54TYP
[2.54 ±0.20]
9.40 ±0.20
4.70 ±0.20
0.35 ±0.10
Dimensions in Millimeters
©2003 Fairchild Semiconductor Corporation
Rev. A, April 2004
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I10