LINER LTC3409A

LTC3409A
600mA Low VIN Buck
Regulator in 3mm × 3mm DFN
FEATURES
DESCRIPTION
n
The LTC®3409A is a high efficiency, monolithic synchronous
buck regulator using a constant frequency, current mode
architecture. The LTC3409A improves upon the LTC3409’s
light load regulation in Burst Mode operation. The output
voltage is adjusted via an external resistor divider.
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1.6V to 5.5V Input Voltage Range
0.62V to 5.5V Output Voltage Range
Internal Soft-Start
Selectable 1.7MHz or 2.6MHz Constant Frequency
Operation
Internal Oscillator Can Be Synchronized to an
External Clock, 1MHz to 3MHz Range
High Efficiency: Up to 95%
65μA Quiescent Current, Burst Mode® Operation
600mA Output Current (VIN = 1.8V, VOUT = 1.2V)
750mA Peak Inductor Current
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
0.612V Reference Voltage
Stable with Ceramic Capacitors
Shutdown Mode Draws <1μA Supply Current
Current Mode Operation for Excellent Line and Load
Transient Response
Overtemperature Protection
Available in a Low Profile (0.75mm)
8-Lead (3mm × 3mm) DFN Package
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Supply current during Burst Mode operation is only
65μA dropping to <1μA in shutdown. The 1.6V to 5.5V
input voltage range makes the LTC3409A ideally suited
for single cell Li-Ion, Li-Metal and 2-cell alkaline, NiCd
or NiMH battery-powered applications. 100% duty cycle
capability provides low dropout operation, extending battery life in portable systems. Burst Mode operation can be
user-enabled, increasing efficiency at light loads, further
extending battery life.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Internal
soft-start offers controlled output voltage rise time at startup without the need for external components.
APPLICATIONS
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Fixed switching frequencies of 1.7MHz and 2.6MHz are
supported. Alternatively, an internal PLL will synchronize
to an external clock in the frequency range of 1MHz to
3MHz. This range of switching frequencies allows the
use of small surface mount inductors and capacitors,
including ceramics.
Cellular Phones
Digital Cameras
MP3 Players
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
TYPICAL APPLICATION
Burst Mode Efficiency, 1.8VOUT
High Efficiency Step-Down Converter
100
1
2.5VIN, BURST
90
RUN
267k
MODE
VFB
SYNC
GND
*SUMIDA CDRH2D18/LD
10pF
VOUT
1.8V
22μF
s2
137k
80
0.1
70
3.6VIN, BURST
60
50
0.01
4.2VIN, BURST
40
POWER LOST
3.6VIN, BURST
30
3409A TA01
POWER LOSS (W)
4.7μF
2.2μH*
EFFICIENCY (%)
LTC3409A
SW
VIN
VIN
1.8V TO 5.5V
0.001
20
10
0
0
1
100
10
LOAD CURRENT (mA)
0.0001
1000
3409A TA01b
3409af
1
LTC3409A
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
Input Supply Voltage ................................... –0.3V to 6V
RUN, VFB, MODE, SYNC Voltages . –0.3V to (VIN + 0.3V)
SW Voltage ................................... –0.3V to (VIN + 0.3V)
Operating Temperature Range (Note 2) ..–40°C to 85°C
Junction Temperature (Note 3) ........................... 125°C
Storage Temperature Range.................. –65°C to 125°C
VFB
1
8
SYNC
GND
2
7
RUN
VIN
3
6
SW
VIN
4
5
MODE
9
DD PACKAGE
8-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3409AEDD#PBF
LTC3409AEDD#TRPBF
LFGY
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3409AIDD#PBF
LTC3409AIDD#TRPBF
LFGY
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2.2V unless otherwise specified.
SYMBOL
PARAMETER
VIN
Input Voltage Range
VFB
Regulated Feedback Voltage
CONDITIONS
(Note 4) TA = 25°C
(Note 4) 0°C ≤ TA ≤ 85°C
(Note 4) –40°C ≤ TA ≤ 85°C
IVFB
Feedback Current
VFB = 0.612V
ΔVOVL
ΔVFBOVL Overvoltage Lockout
ΔVOVL = ΔVFBOVL – VFB (Note 6)
ΔVFB
Reference Voltage Line Regulation
1.6V < VIN < 5.5V (Note 4)
1.9V ≤ VIN ≤ 3.6V, 0°C ≤ TA ≤ 85°C (Note 4)
IPK
Peak Inductor Current
VFB = 0.5V or VOUT = 90%
VLOADREG
Output Voltage Load Regulation
VOUT = 1.8V, VMODE = 0V, 1mA < ILOAD < 210mA,
0°C ≤ TA ≤ 85°C (Note 8)
VRUN
RUN Threshold
IRUN
RUN Leakage Current
VMODE
MODE Threshold
IMODE
MODE Leakage Current
MIN
l
1.6
l
0.604
0.600
0.598
35
l
0.75
l
0.3
VRUN = 0V or = 2.2V
l
VMODE = 0V or = 2.2V
0.3
TYP
MAX
UNITS
5.5
V
0.612
0.612
0.612
0.620
0.624
0.626
V
V
V
±30
nA
61
85
mV
0.04
0.05
0.4
0.5
%/V
%
1
1.3
A
0.2
0.5
%
0.65
1.1
V
0.01
1
μA
0.65
1.1
V
0.01
1
μA
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LTC3409A
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2.2V unless otherwise specified.
SYMBOL
PARAMETER
VSYNCTH
SYNC Threshold
ISYNC
SYNC Leakage Current
IS
MIN
TYP
MAX
0.3
0.65
1.1
V
VSYNC = 0V or = 2.2V
0.01
1
μA
Input DC Bias Current
Active Mode
Sleep Mode
Shutdown
(Note 5)
VOUT = 90%, ILOAD = 0A
VOUT = 103%, ILOAD = 0A
VRUN = 0V, VIN = 5.5V
350
65
0.1
475
120
1
μA
μA
μA
fOSC
Nominal Oscillator Frequency
SYNC = GND
SYNC = VIN
1.7
2.6
2.2
3.2
MHz
MHz
SYNC TH
SYNC Threshold
When SYNC Input is Toggling (Note 7)
SYNC fMIN
Minimum SYNC Pin Frequency
SYNC fMAX
Maximum SYNC Pin Frequency
SYNC PW
Minimum SYNC Pulse Width
tSS
Soft-Start Period
SYNC tO
CONDITIONS
l
l
l
0.9
1.8
0.63
UNITS
V
1
MHz
3
MHz
100
ns
RUN↑
1
ms
SYNC Timeout
Delay from Removal of EXT CLK Until Fixed
Frequency Operation Begins (Note 7)
30
μs
RPFET
RDS(ON) of P-channel FET
ISW = 100mA, Wafer Level
ISW = 100mA, DD Package
0.33
0.35
Ω
Ω
RNFET
RDS(ON) of N-channel FET
ISW = 100mA, Wafer Level
ISW = 100mA, DD Package
0.22
0.25
Ω
Ω
ILSW
SW Leakage
VRUN = 0V, VSW = 0V or 5V, VIN = 5V
±0.1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3409AE is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3409AI is guaranteed to meet
specified performance over the full –40°C to 85°C operating temperature
range.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC3409A: TJ = TA + (PD)(43°C/W)
±3
μA
This IC includes overtemperature protection that is intended to protect the
device during momentary overload conditions. Overtemperature protection
becomes active at a junction temperature greater than the maximum
operating junction temperature. Continuous operation above the specified
maximum operating junction temperature may impair device reliability.
Note 4: The LTC3409A is tested in a proprietary test mode that connects
VFB to the output of the error amplifier.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 6: ΔVOVL is the amount VFB must exceed the regulated feedback
voltage.
Note 7: Determined by design, not production tested.
Note 8: Guaranteed by measurement at the wafer level and design,
characterization and correlation with statistical process controls.
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LTC3409A
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, from Typical Application on the front page except for the resistive divider resistor values)
Pulse-Skipping Efficiency/Power
Lost vs Load Current, VOUT = 1.8V
Efficiency vs Input Voltage,
VOUT = 1.2V, Burst Mode Operation
100
1
90
VIN = 3.6V
80
80
VIN = 4.2V
0.1
60
VIN = 2.5V
50
40
VIN = 4.2V 0.01
30
VIN = 2.5V
20
0
1
70
60
50
40
30
VIN = 3.6V
20
POWER LOST
10
0
EFFICIENCY (%)
70
POWER LOST (W)
EFFICIENCY (%)
100
EFFICIENCY
90
IOUT = 0.1mA
IOUT = 1mA
IOUT = 10mA
10
0
1.6
0.001
1000
10
100
LOAD CURRENT (mA)
IOUT = 100mA
IOUT = 600mA
2.6
3.6
4.6
INPUT VOLTAGE (VIN)
3409A G01
Efficiency vs Input Voltage
VOUT = 1.2V, Pulse-Skipping
Efficiency vs Load Current,
VOUT = 1.2V
100
100
90
IOUT = 600mA
60
IOUT = 10mA
50
40
IOUT = 1mA
30
80
EFFICIENCY (%)
70
60
3.6VIN
4.2VIN
50
40
30
2.7VIN
IOUT = 0.1mA
10
0
1.5
3.5
4.5
2.5
INPUT VOLTAGE (VIN)
0
0.1
5.5
1
10
100
LOAD CURRENT (mA)
0.616
OSCILLATOR FREQUENCY (MHz)
REFERENCE VOLTAGE (V)
0
0.1
0.613
0.612
0.611
0.610
0.609
90 110 125
3409A G06
BURST
PULSE-SKIPPING
1
10
100
LOAD CURRENT (mA)
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
–50
1000
3409A G05
Oscillator Frequency Shift
vs Input Voltage
Oscillator Frequency
vs Temperature
0.614
2.5VIN
1.6VIN
40
3409A G04
Reference Voltage
vs Temperature
0.608
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
50
10
1000
3409A G03
0.615
3.1VIN
3.1VIN
60
20
BURST
PULSE-SKIPPING
10
70
30
3.6VIN
20
20
1.6VIN
2.5VIN
80
4.2VIN
70
6
VIN = 2.7V
VIN = 1.6V
VIN = 4.2V
VIN = 4.2V
VIN = 1.6V
–25
OSC 2.6MHz
OSC 1.7MHz
VIN = 2.7V
50
25
75
0
TEMPERATURE (°C)
100
125
OSCILLATOR FREQUENCY SHIFT (%)
80
90
2.7VIN
EFFICIENCY (%)
IOUT = 100mA
90
EFFICIENCY (%)
3409A G02
Efficiency vs Load Current,
VOUT = 2.5V
100
5.5
4
2
0
–2
fLOW
1.7MHz
fHIGH
2.6MHz
–4
–6
–8
–10
1.5
2.5
3.5
4.5
5.5
INPUT VOLTAGE (V)
3409A G07
3409A G08
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LTC3409A
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, from Typical Application on the front page except for the resistive divider resistor values)
Output Voltage
vs Load Current VIN = 1.6V
RDS(ON) vs Input Voltage
RDS(ON) vs Temperature
0.55
0.45
1.210
0.50
0.40
RDS(0N) (Ω)
1.195
1.190
4.2VIN
0.40
0.30
1.2VOUT, PULSE-SKIPPING
1.6VIN
0.45
RDS(ON) (Ω)
1.200
MAIN
SWITCH
0.35
1.2VOUT, BURST
0.25
0.20
SYNCHRONOUS
SWITCH
0.15
2.7VIN
0.35
1.6VIN
0.30
2.7VIN
0.25
0.10
0.20
0.05
0.15
4.2VIN
1.185
10
100
LOAD CURRENT (mA)
1000
1.5
3409A G09
500
80
450
70
VFB = 1V
60
2000
50
1500
40
VOUT = 1.5V
IOUT = 0
1000
30
20
PULSE-SKIPPING
500
DYNAMIC SUPPLY CURRENT (μA)
2500
90
DYNAMIC SUPPLY CURRENT,
Burst Mode OPERATION (μA)
BURST
10
0
1.5
VFB = 1V
2.5
100
125
3409A G11
Dynamic Supply Current
vs Temperature, VIN = 3.6V,
VOUT = 1.5V, No Load
VOUT = 1.5V
IOUT = 0
3000
50
25
75
0
TEMPERATURE (°C)
3409A G10
Dynamic Input Current
vs Input Voltage
3500
5.5
2.5
4.5
3.5
INPUT VOLTAGE (V)
MAIN SWITCH
SYNCHRONOUS SWITCH
0.10
–50 –25
0
PULSE-SKIPPING
350
300
250
200
150
100
BURST
0
–50
0
5.5
4.5
3.5
INPUT VOLTAGE (V)
400
50
–25
25
50
75
0
TEMPERATURE (°C)
100
125
3409A G13
3409A G12
Switch Leakage
vs Temperature VIN = 5.5V
Switch Leakage vs Input Voltage
6000
45
40
5000
SWITCH LEAKAGE (nA)
1
DYNAMIC INPUT CURRENT,
PULSE-SKIPPING MODE (μA)
1.100
SWITCH LEAKAGE (nA)
OUTPUT VOLTAGE (V)
1.205
4000
3000
MAIN SWITCH
2000
SYNCHRONOUS SWITCH
35
30
25
MAIN SWITCH
20
15
10
1000
SYNCHRONOUS
SWITCH
5
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
3409A G14
0
0
4
2
INPUT VOLTAGE (V)
6
3409A G15
3409af
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LTC3409A
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, from Typical Application on the front page except for the resistive divider resistor values)
Load Step 0mA to 600mA PulseSkipping, VIN = 3.6V, VOUT = 1.8V
Start-Up from Shutdown, VIN = 3.6V,
VOUT = 1.8V, Load = 1kΩ
VOUT
100mV/DIV
RUN
2V/DIV
VOUT
1V/DIV
ILOAD
500mA/DIV
INDUCTOR
CURRENT
200mA/DIV
INDUCTOR
CURRENT
500mA/DIV
200μs/DIV
3409A G16
20μs/DIV
Burst Mode Operation, ILOAD = 35mA,
VIN = 3.6V, VOUT = 1.8V
Load Step 50mA to 600mA PulseSkipping, VIN = 3.6V, VOUT = 1.8V
VOUT
50mV/DIV
VOUT
20mV/DIV
ILOAD
500mA/DIV
VSWITCH
2V/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
20μs/DIV
3409A G17
3409A G18
4μs/DIV
Load Step 10mA to 600mA,
Burst Mode Operation, VIN = 3.6V,
VOUT = 1.8V
3409A G19
Load Step 50mA to 600mA,
Burst Mode Operation, VIN = 3.6V,
VOUT = 1.8V
VOUT
50mV/DIV
VOUT
100mV/DIV
ILOAD
500mA/DIV
ILOAD
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
20μs/DIV
3409A G20
20μs/DIV
3409A G21
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LTC3409A
PIN FUNCTIONS
VFB (Pin 1): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 2): Ground Pin.
VIN (Pins 3, 4): Main Supply Pins. Must be closely decoupled to GND, Pin 2 and Pin 9, with a 4.7μF or greater
ceramic capacitor.
SYNC (Pin 8): External CLK Input/Fixed Switching Frequency Selection. Forcing this pin above 1.1V for greater
than 30μs selects 2.6MHz switching frequency. Forcing
this pin below 0.3V for greater than 30μs selects 1.7MHz
switching frequency.
MODE (Pin 5): Mode Select Input. To select pulse-skipping
mode, force this pin above 1.1V. Forcing this pin below
0.3V selects Burst Mode operation. Do not leave MODE
floating.
External clock input, 1MHz to 3MHz frequency range.
When the SYNC pin is clocked in this frequency range
the SYNC threshold is nominally 0.63V. To allow for good
noise immunity, SYNC signal should swing at least 0.3V
below and above this nominal value (0.33V to 0.93V). Do
not leave SYNC floating.
SW (Pin 6): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchronous
power MOSFET switches.
Exposed Pad (Pin 9): The Exposed Pad is ground. It must
be soldered to PCB ground to provide both electrical contact
and optimum thermal performance.
RUN (Pin 7): Run Control Input. Forcing this pin above 1.1V
enables the part. Forcing this pin below 0.3V shuts down
the device. In shutdown, all functions are disabled drawing
<1μA supply current. Do not leave RUN floating.
FUNCTIONAL DIAGRAM
MODE
5
SLOPE
COMP
SYNC
8
0.65V
PLL
OSC
3, 4
VIN
–
VFB
+
–
–
0.4V
EA
EN
SLEEP
–
+
BURST
SOFTSTART
S
Q
R
Q
RS LATCH
VIN
RUN
7
+
REFERENCE
OVDET
0.675
SHUTDOWN
5Ω
+
ICOMP
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTISHOOTTHRU
6 SW
OV
–
IRCMP
2, 9
–
0.612V
+
+
1
GND
3409A FD
3409af
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LTC3409A
OPERATION
Main Control Loop
Burst Mode Operation
The LTC3409A uses a constant frequency, current mode stepdown architecture. Both the main (P-channel MOSFET) and
synchronous (N-channel MOSFET) switches are internal.
During normal operation, the internal top power MOSFET
is turned on each cycle when the oscillator sets the RS
latch, and turned off when the current comparator, ICOMP,
resets the RS latch. The peak inductor current at which
ICOMP resets the RS latch is controlled by the output of error
amplifier EA. The VFB pin, described in the Pin Functions
section, allows EA to receive an output feedback voltage
from an external resistive divider. When the load current
increases, it causes a slight decrease in the feedback voltage
relative to the 0.612V reference, which in turn, causes the
EA amplifier’s output voltage to increase until the average
inductor current matches the new load current. While the
top MOSFET is off, the bottom MOSFET is turned on until
either the inductor current starts to reverse, as indicated
by the current reversal comparator IRCMP, or the beginning
of the next clock cycle.
The LTC3409A is capable of Burst Mode operation in
which the internal power MOSFETs operate intermittently
based on load demand. To enable Burst Mode operation,
simply connect the MODE pin to GND. To disable Burst
Mode operation and enable PWM pulse-skipping mode,
connect the MODE pin to VIN or drive it with a logic high
(VMODE >1.1V). In this mode, the efficiency is lower at
light loads, but becomes comparable to Burst Mode operation when the output load exceeds 30mA. The advantage
of pulse-skipping mode is lower output ripple and less
interference to audio circuitry. When the converter is in
Burst Mode operation, the minimum peak current of the
inductor is set to approximately 200mA regardless of the
output load. Each burst event can last from a few cycles
at light loads to almost continuously cycling with short
sleep intervals at moderate loads. In between these burst
events, the power MOSFETs and any unneeded circuitry
are turned off, reducing the quiescent current to 65μA. In
this sleep state, the load current is being supplied solely
from the output capacitor. As the output voltage droops,
the EA amplifier’s output rises above the sleep threshold
signaling the BURST comparator to trip and turn the top
MOSFET on. This process repeats at a rate that is dependent on the load demand.
Comparator OVDET guards against transient overshoots
>10% by turning the main switch off and keeping it off
until the transient has ended.
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LTC3409A
OPERATION
Burst Mode Operation Near Dropout
Slope Compensation
With a light load the part will transition from Burst Mode
operation to 100% duty cycle as (VIN to VOUT) approaches
ILOAD • (RMAINSWITCH + RINDUCTOR). When (VIN to VOUT)
results in near 100% duty cycle the inductor up slope will
be quite shallow compared to the inductor down slope,
with low peak currents.
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally
by adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%.
The LTC3409A is a micropower part and the speed of the
comparator controlling the synchronous switch may allow
the inductor current to reverse in a low (VIN to VOUT) situation, resulting in CCM operation. Transition from CCM back
to Burst Mode operation will occur when (VIN to VOUT) is
sufficient for the average inductor current to exceed the
load current. This occurs when the average positive current in the inductor exceeds the average reverse current
caused by synchronous switch propagation delay. The
CCM to Burst Mode operation re-entry transition point will
be a function of VIN, VOUT, ILOAD, COUT and the inductor
used in the application.
Short-Circuit Protection
When the output is shorted to ground the LTC3409A limits
the synchronous switch current to 1.5A. If this limit is
exceeded, the top power MOSFET is inhibited from turning on until the current in the synchronous switch falls
below 1.5A.
Dropout Operation
As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases
toward the maximum on-time. Further reduction of the
supply voltage forces the main switch to remain on for
more than one cycle until it reaches 100% duty cycle.
The output voltage will then be determined by the input
voltage minus the voltage drop across the P-channel
MOSFET and the inductor.
User Controlled Switching Frequency
The internal oscillator of the LTC3409A can be synchronized
to a user-supplied external clock applied to the SYNC pin.
Alternately, when this pin is held at a fixed high or low
level for more than 30μs, the internal oscillator will revert
to fixed-frequency operation; where the frequency may
be selected as 1.7MHz (SYNC Low) or 2.6MHz (SYNC
High).
Internal Soft-Start
At start-up when the RUN pin is brought high, the internal
reference is linearly ramped from 0V to 0.612V in 1ms. The
regulated feedback voltage will follow this ramp resulting
in the output voltage ramping from 0% to 100% in 1ms.
The current in the inductor during soft-start will be defined
by the combination of the current needed to charge the
output capacitance and the current provided to the load
as the output voltage ramps up. The start-up waveform,
shown in the Typical Performance Characteristics, shows
the output voltage start-up from 0V to 1.8V with a 1kΩ
load and VIN = 3.6V. The 1kΩ load results in an output of
1.8mA at 1.8V.
3409af
9
LTC3409A
APPLICATIONS INFORMATION
The basic LTC3409A application circuit is shown on the
first page of this data sheet. External component selection is driven by the load requirement and begins with the
selection of L followed by CIN and COUT.
Inductor Selection
For most applications, the value of the inductor will fall
in the range of 1μH to 10μH. Its value is chosen based
on the desired ripple current. Large value inductors
lower ripple current and small value inductors result in
higher ripple currents. Higher VIN or VOUT also increases
the ripple current as shown in Equation 1. A reasonable
starting point for setting ripple current is ΔIL = 240mA
(40% of 600mA).
⎛ V ⎞
1
ΔIL =
VOUT ⎜ 1– OUT ⎟
f •L
VIN ⎠
⎝
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductor should be enough for most applications (600mA +
120mA). For better efficiency, choose a low DC resistance
inductor. The inductor value also has an effect on Burst
Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately
200mA. Lower inductor values (higher ΔIL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
Inductor Core Selection
Different core materials and shapes will change the
size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy, but
generally cost more than powdered iron core inductors
with similar electrical characteristics. The choice of which
style inductor to use often depends more on the price vs
size requirements and any radiated field/EMI requirements
than on what the LTC3409A requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3409A applications.
Table 1. Representative Surface Mount Inductors
PART NUMBER &
MANUFACTURER
VALUE MAX DCR
(μH)
(mΩ)
MAX DC
CURRENT
(A)
SIZE
W × L × H (mm3)
Sumida
CDRH2D18/HP
1.7
44
1.85
3.2 × 3.2 × 2.0
Sumida
CDRH2D18/LD
2.2
3.3
41
54
0.85
0.75
3.2 × 3.2 × 2.0
Sumida
CDRH2D11
1.5
2.2
68
98
0.90
0.78
3.2 × 3.2 × 1.2
Murata
LQH32C_33
1.0
2.2
60
97
1.00
0.79
2.5 × 3.2 × 2.0
TDK
VLF3010AT
1.5
2.2
78
120
1.20
1.00
2.6 × 2.8 × 1.0
TDK
VLF3012AT
1.5
2.2
68
100
1.20
1.00
2.6 × 2.8 × 1.2
Wurth WE-TPC
T/TH 74402800
1.0
2.2
85
155
1.50
1.00
2.8 × 2.8 × 1.1
Wurth 74402900
2.2
3.3
110
135
1.15
0.95
2.8 × 2.8 × 1.35
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum RMS
capacitor current is given by:
⎡ VOUT ( VIN – VOUT ) ⎤⎦
CIN Required IRMS ≅ IOUT(MAX) ⎣
VIN
1/ 2
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do
not offer much relief. Note that the capacitor manufacturer’s
ripple current ratings are often based on 2000 hours of
life. This makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Always consult the manufacturer if there is any
question. The selection of COUT is driven by the required
effective series resistance (ESR). Typically, once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
3409af
10
LTC3409A
APPLICATIONS INFORMATION
The output ripple ΔVOUT is determined by:
⎛
⎞
1
ΔVOUT = ΔIL ⎜ ESR +
8 • f • COUT ⎟⎠
⎝
where f = operating frequency, COUT = output capacitance
and ΔIL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ΔIL increases with input voltage. Aluminum
electrolytic and dry tantalum capacitors are both available
in surface mount configurations. In the case of tantalum,
it is critical that the capacitors are surge tested for use
in switching power supplies. An excellent choice is the
AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now available in smaller case sizes. Their high ripple current, high
voltage rating and low ESR make them ideal for switching
regulator applications. Because the LTC3409A’s control
loop does not depend on the output capacitor’s ESR for
stable operation, ceramic capacitors can be used to achieve
very low output ripple and small circuit size.
However, care must be taken when these capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at VIN, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
Output Voltage Programming
The output voltage is set by a resistive divider according
to Equation 2:
⎛ R1⎞
VOUT = 0.612V ⎜ 1+ ⎟
⎝ R2 ⎠
(2)
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 1.
VOUT
R1
VFB
LTC3409A
R2
GND
3409A F01
Figure 1
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses in LTC3409A circuits: VIN quiescent current
and I2R losses. The VIN quiescent current loss dominates
the efficiency loss at very low load currents whereas the
I2R loss dominates the efficiency loss at medium to high
load currents. In a typical efficiency plot, the efficiency
curve at very low load currents can be misleading since
the actual power lost is of no consequence as illustrated
in Figure 2.
3409af
11
LTC3409A
APPLICATIONS INFORMATION
Other losses including CIN and COUT ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total additional loss.
1.0000
VOUT = 1.8V
POWER LOSS (W)
0.1000
4.2VIN
Thermal Considerations
3.6VIN
2.5VIN
0.0100
2.5VIN
0.0010
4.2VIN
3.6VIN
0.0001
0.1
1
BURST
PULSE SKIP
100
10
LOAD CURRENT (mA)
1000
3409A F02
Figure 2. Power Loss
1. The VIN quiescent current is due to two components:
the DC bias current as given in the Electrical Characteristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate
is switched from high to low to high again, a packet
of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
IGATECHG = f(QT + QB) where QT and QB are the gate
charges of the internal top and bottom switches. Both
the DC bias and gate charge losses are proportional to
VIN and thus their effects will be more pronounced at
higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics.
Thus, to obtain I2R losses, simply add RSW to RL and
multiply the result by the square of the average output
current.
In most applications the LTC3409A does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3409A is running at high ambient temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
To avoid the LTC3409A from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3409A in dropout at an
input voltage of 1.6V, a load current of 600mA and an
ambient temperature of 75°C. From the typical performance graph of switch resistance, the RDS(ON) of the
P-channel switch at 75°C is approximately 0.48Ω. Therefore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 172.8mW
For the DD8 package, the θJA is 43°C/W. Thus, the junction
temperature of the regulator is:
TJ = 75°C + (0.1728)(43) = 82.4°C
which is well below the maximum junction temperature
of 125°C.
3409af
12
LTC3409A
APPLICATIONS INFORMATION
Note that at higher supply voltages, the junction temperature
is lower due to reduced switch resistance (RDS(ON)).
2. Are the COUT and L1 closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
Checking Transient Response
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground sense line
terminated near GND (Exposed Pad). The feedback
signals VFB should be routed away from noisy components and traces, such as the SW line (Pins 6), and its
trace should be minimized.
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (ΔILOAD • ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The
regulator loop then acts to return VOUT to its steady state
value. During this recovery time VOUT can be monitored
for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately
(25 • CLOAD). Thus, a 10μF capacitor charging to 3.3V
would require a 250μs rise time, limiting the charging
current to about 130mA.
4. The SW trace should be kept as small as possible. Keep
sensitive components away from the SW pins. The input
capacitor CIN and the resistors R1 and R2 should be
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
point. They should not share the high current path of
CIN or COUT.
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to VIN or GND (preferably).
VIN
CIN
VIN
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3409A. These items are also illustrated graphically
in the layout diagram of Figure 3. Check the following in
your layout.
1. Does the capacitor CIN connect to the power VIN
(Pins 3, 4) and GND (Exposed Pad) as close as possible? This capacitor provides the AC current to the
internal power MOSFETs and their drivers.
VIN
LTC3409A
RUN
SYNC
VFB
MODE
L1
VOUT
SW
SGND GND
C1
COUT
R2
R1
3409A F03
Figure 3
3409af
13
LTC3409A
APPLICATIONS INFORMATION
Design Example
As a design example, assume the LTC3409A is used in a
2-alkaline cell battery-powered application. The VIN will be
operating from a maximum of 3.2V down to about 1.8V.
The load current requirement is a maximum of 600mA
but most of the time it will be in standby mode, requiring
only 2mA. Efficiency at both low and high load currents is
important, so the minimum frequency setting of 1.7MHz
is chosen. Output voltage is 1.5V. With this information
we can calculate L using Equation 3:
⎛ V ⎞
1
L=
VOUT ⎜ 1– OUT ⎟
f • ΔIL
VIN ⎠
⎝
For best efficiency choose a 750mA or greater inductor
with less than 0.3Ω series resistance. CIN will require
an RMS current rating of at least 0.3A ≅ ILOAD(MAX) /2 at
temperature.
For the feedback resistors, choose R2 = 137k. R1 is then
calculated to be 200k from Equation 2. Figure 4 shows the
complete circuit along with its efficiency curve.
Table 2 below gives 1% resistor values for selected output
voltages.
(3)
Substituting VOUT = 1.5V, VIN = 3.2V, ΔIL = 240mA and
f = 1.7MHz in Equation 2 gives:
L=
VOUT
R1
R2
0.85V
53.6k
137k
1.2V
137k
143k
1.5V
200k
137k
1.8V
267k
137k
1
⎛ 1.5V ⎞
1.5V ⎜ 1–
≅ 2.2µH
⎝ 3.2V ⎟⎠
1.7MHz • 240mA
Burst Mode Efficiency, 1.5VOUT
100
CIN
4.7μF
R2
137k
90
LTC3409A
VFB
SYNC
GND
RUN
VIN
SW
VIN
R1
200k
1.8VIN
3.2VIN
80
L1
2.2μH
COUT
22μF
s2
MODE
3409A F04
VOUT
1.5V
0.6A
EFFICIENCY (%)
VIN
1.8V TO 3.2V
70
60
2.5VIN
50
40
30
20
L1: SUMIDA CDRH2D18/LD
10
0
0.1
C1
10pF
1
10
100
LOAD CURRENT (mA)
1000
3409A F04b
Figure 4
3409af
14
LTC3409A
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.115
TYP
5
0.38 ± 0.10
8
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD) DFN 1203
0.200 REF
0.75 ±0.05
0.00 – 0.05
4
0.25 ± 0.05
1
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3409af
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3409A
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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LTC1878
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LTC1879
1.20A (IOUT), 550kHz, Synchronous Step-Down
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LT3020
100mA, Low Voltage VLDO™
VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, Dropout Voltage = 0.15V,
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LTC3025
100mA, Low Voltage VLDO
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LTC3404
600mA (IOUT), 1.4MHz, Synchronous Step-Down
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ISD <1μA, MS8 Package
LTC3405A
300mA (IOUT), 1.5MHz, Synchronous Step-Down
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95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA,
ISD <1μA, ThinSOT™ Package
LTC3406A/
LTC3406AB
600mA (IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA,
ISD <1μA, ThinSOT Package
LTC3407A/
LTC3407A-2
Dual, 600mA/800mA (IOUT), 1.5MHz/2.25MHz,
Synchronous Step-Down DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA,
ISD <1μA, 10-Lead MSE Package
LTC3411A
1.25A (IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,
ISD <1μA, 10-Lead MS Package
VLDO and ThinSOT are trademarks of Linear Technology Corporation.
3409af
16 Linear Technology Corporation
LT 0509 • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
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