MAXIM MAX9685CPE

19-2398; Rev 1; 7/93
Ultra-Fast ECL-Output Comparator
with Latch Enable
____________________________Features
♦ 1.3ns Propagation Delay
♦ 0.5ns Latch Setup Time
♦ +5V, -5.2V Power Supplies
♦ Pin-Compatible with AD9685, Am6685
♦ Available in Commercial, Extended-Industrial,
and Military Temperature Ranges
♦ Available in Narrow SO Package
______________Ordering Information
PART
________________________Applications
High-Speed A/D Converters
High-Speed Line Receivers
Peak Detectors
Threshold Detectors
TEMP. RANGE
PIN-PACKAGE*
MAX9685CPE
0°C to +70°C
16 Plastic DIP
MAX9685CSE
MAX9685CJE
MAX9685CTW
MAX9685C/D
MAX9685EPE
MAX9685ESE
MAX9685MJE
MAX9685MTW
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
-55°C to +125°C
16 Narrow SO
16 CERDIP
10 TO-100
Dice**
16 Plastic DIP
16 Narrow SO
16 CERDIP
10 TO-100
* Contact factory for availability of 20-pin PLCC.
** Contact factory for dice specifications.
High-Speed Triggers
__________________________________________________________Pin Configurations
TOP VIEW
GND1
V+
1
IN+
IN-
GND1 1
GND2
10
9
2
8
3
7
4
LE
V+ 2
5
16 GND2
MAX9685
14 N.C.
IN- 4
13 N.C.
Q OUT
Q OUT
N.C. 5
12 Q OUT
LE 6
11 Q OUT
N.C. 7
6
N.C.
15 N.C.
IN+ 3
10 N.C.
V- 8
9
N.C.
V-
TO-100
DIP/SO
________________________________________________________________ Maxim Integrated Products
Call toll free 1-800-998-8800 for free samples or literature.
1
MAX9685
_______________General Description
The MAX9685 is an ultra-fast ECL comparator manufactured with a high-frequency bipolar process (fT = 6GHz)
capable of very short propagation delays. This design
maintains the excellent DC matching characteristics normally found only in slower comparators.
The device is pin-compatible with the AD9685 and
Am6685, but exceeds their AC characteristics.
The MAX9685 has differential inputs and complementary outputs that are fully compatible with ECL-logic levels. Output current levels are capable of driving 50Ω
terminated transmission lines. The ultra-fast operation
makes signal processing possible at frequencies in
excess of 600MHz.
A latch-enable (LE) function is provided to allow the
comparator to be used in a sample-hold mode. When
LE is ECL high, the comparator functions normally.
When LE is driven ECL low, the outputs are forced to an
unambiguous ECL-logic state, dependent on the input
conditions at the time of the latch input transition. If the
latch-enable function is not used, the LE pin must be
connected to ground.
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
ABSOLUTE MAXIMUM RATINGS
Supply Voltages.....................................................................±6V
Output Short-Circuit Duration .......................................Indefinite
Input Voltages........................................................................±5V
Differential Input Voltages .....................................................7.0V
Output Current ....................................................................30mA
Continuous Power Dissipation (TA = +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) ..........842mW
Narrow SO (derate 8.70mW/°C above +70°C) ............696mW
CERDIP (derate 10.00mW/°C above +70°C) ...............800mW
TO-100 (derate 6.67mW/°C above +70°C) ..................533mW
Operating Temperature Ranges
MAX9685C_ _ .....................................................0°C to +70°C
MAX9685E_ _ ..................................................-40°C to +85°C
MAX9685M_ _................................................-55°C to +125°C
Storage Temperature Range .............................-55°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = +5V, V- = -5.2V, RL = 50Ω, VT = -2V, TA = +25°C, unless otherwise noted.)
PARAMETER
Input Offset Voltage
SYMBOL
VOS
CONDITIONS
RS =100Ω
TA = +25°C
TA = TMIN to TMAX
MAX9685C/E
MIN
TYP MAX
-5
5
-7
7
MAX9685M
MIN
TYP MAX
-5
5
-8
8
10
15
Temperature Coefficient ∆VOS/∆T
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode
Rejection Ratio
Power-Supply
Rejection Ratio
IOS
IB
VCM
TA = +25°C
TA = TMIN to TMAX
TA = +25°C
TA = TMIN to TMAX
(Note 1)
CMRR
RIN
Input Capacitance
CIN
80
(Note 1)
MAX9685E
MAX9685C,
MAX9685M
VOL
MAX9685E
ICC
Negative Supply
Current
IEE
2
-2.5
60
-1.16
pF
-0.87
TA = TMAX
-0.89
-0.70
0.88
-0.69
TA = +25°C
-0.96
-0.81
-0.96
-0.81
TA = TMIN
-1.14
-0.88
TA = TMAX
-0.88
-0.70
TA = +25°C
-0.96
-0.81
TA = TMIN
-1.89
-1.69
-1.90
-1.65
TA = TMAX
-1.83
-1.57
-1.82
-1.55
TA = +25°C
-1.85
-1.65
-1.85
-1.65
TA = TMIN
-1.90
-1.65
TA = TMAX
-1.83
-1.57
TA = +25°C
-1.85
-0.89
V
V
-1.65
16
TA = TMIN to TMAX
TA = TMIN to TMAX
V
kΩ
3
-1.05
TA = +25°C
µA
dB
TA = TMIN
TA = +25°C
µA
dB
60
60
mV
µV/°C
5
12
20
40
+2.5
80
3
VOH
Positive Supply Current
10
60
MAX9685C,
MAX9685M
Logic Output Low
Voltage
-2.5
PSRR
Input Resistance
Logic Output High
Voltage
10
5
8
20
30
+2.5
UNITS
22
16
24
20
32
22
25
20
36
_______________________________________________________________________________________
32
36
mA
mA
Ultra-Fast ECL-Output Comparator
with Latch Enable
(V+ = 5V, V- = -5.2V, RL = 50Ω, VT = -2V, TA = +25°C, unless otherwise noted.)
PARAMETER
MAX9685C/E
MIN
TYP MAX
MAX9685M
MIN
TYP MAX
TA = +25°C
1.3
1.8
1.3
1.8
TA = 0°C to +70°C
1.5
2.0
1.7
2.4
1.3
1.8
1.7
2.4
1.2
1.7
2.0
3.0
1.2
1.7
2.0
3.0
SYMBOL
Input to Output High
(Notes 1, 2)
tpd+
CONDITIONS
ns
TA = -55°C to +125°C
Input to Output Low
(Notes 1, 2)
tpd-
TA = +25°C
1.3
1.8
TA = 0°C to +70°C
1.5
2.0
ns
TA = -55°C to +125°C
Latch-Enable to Output
High (Notes 1, 2)
tpd+(E)
TA = +25°C
1.2
1.7
TA = 0°C to +70°C
1.4
2.0
ns
TA = -55°C to +125°C
Latch-Enable to Output
High (Notes 1, 2)
tpd-(E)
TA = +25°C
1.2
1.7
TA = 0°C to +70°C
1.4
2.0
ns
TA = -55°C to +125°C
Latch-Enable Pulse
Width (Note 2)
tpw(E)
3.0
2.0
UNITS
3.0
2.0
ns
Minimum Setup Time
ts
0.5
1.0
0.5
1.0
ns
Minimum Hold Time
th
0.5
1.0
0.5
1.0
ns
Note 1: Not tested, guaranteed by design.
Note 2: VIN = 100mV, VOD = 10mV
__________Applications Information
Layout
Because of the MAX9685’s large gain-bandwidth characteristic, special precautions need to be taken if its
high-speed capabilities are to be used. A PC board
with a ground plane is mandatory. Mount all decoupling capacitors as close to the power-supply pins as
possible, and process the ECL outputs in microstrip
fashion, consistent with the load termination of 50Ω to
120Ω. For low-impedance applications, microstrip layout at the input may also be helpful. Pay close attention to the bandwidth of the decoupling and terminating
components. Chip components can be used to minimize lead inductance. An unused LE pin must be connected to ground.
Input Slew-Rate Requirements
As with all high-speed comparators, the high gainbandwidth product of these devices creates oscillation
problems when the input traverses through the linear
region. For clean switching without oscillation or steps
in the output waveform, the input must meet certain
minimum slew-rate requirements. The tendency of the
part to oscillate is a function of the layout and source
impedance of the circuit employed. Poor layout and
larger source impedance will increase the minimum
slew-rate requirement.
Figure 1 shows a high-speed receiver application with
50Ω input and output termination. With this configuration, in which a ground plane and microstrip PC board
were used, the minimum slew rate for clean output
switching is 1.6V/µs. Sine-wave inputs imply a minimum signal size of 360mV RMS at 500kHz and
90mVRMS at 4MHz.
E RMS =
Slew Rate
2 2nf
In many applications, the addition of regenerative feedback will assist the input signal through the linear
region, which will lower the minimum slew-rate requirement considerably. For example, with the addition of
positive feedback components R f = 1kΩ and C f =
10pF, the minimum slew-rate requirement can be
reduced by a factor of four.
_______________________________________________________________________________________
3
MAX9685
SWITCHING CHARACTERISTICS
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
INPUT
20mV/div
VIN
OUTPUT
500mV/div
2ns/div
50Ω
LE
INPUT
50Ω
-2V
50Ω
Rf
Cf
50Ω
OUTPUT
-0V
-0.9V
-1.7V
Figure 1. Regenerative Feedback. High-speed receiver with
50Ω input and output termination.
Figure 2. As a high-speed receiver, the MAX9685 is capable
of processing signals in excess of 600MHz. Figure 2 is a
100MHz example with an input signal level of 14mVRMS.
The timing diagram (Figure 3) illustrates the series of
events that complete the compare function, under
worst-case conditions.
The top line of the diagram illustrates two latch-enable
pulses. Each pulse is high for the compare function
and low for the latch function. The first pulse demonstrates the compare function; part of the input action
takes place during the compare mode. The second
pulse demonstrates a compare-function interval during
which there is no change in the input.
The leading edge of the input signal (illustrated as a
large-amplitude, small-overdrive pulse) switches the
comparator after time interval tpd. Output Q and Q
transistors are similar in timing. The input signal must
occur at time ts before the latch falling edge, and it
must be maintained for time th after the edge to be
acquired. After th, the output is no longer affected by
the input status until the latch is again strobed. A minimum latch pulse width of t pw (E) is needed for the
strobe operation, and the output transitions occur after
a time tpd(E).
tpd-
Definition of Terms
VOS
VIN
VOD
tpd+
4
Input Offset Voltage—The voltage required
between the input terminals to obtain 0V differential at the output.
Input Voltage Pulse Amplitude
Input Voltage Overdrive
Input to Output High Delay—The propagation
delay measured from the time the input signal
crosses the input offset voltage to the 50%
point of an output low-to-high transition.
Input to Output Low Delay—The propagation
delay measured from the time the input signal
crosses the input offset voltage to the 50%
point of an output high-to-low transition.
tpd+(E) Latch-Enable to Output High Delay—The
propagation delay measured from the 50%
point of the latch-enable signal low-to-high
transition to the 50% point of an output low-tohigh transition.
tpd-(E) Latch-Enable to Output Low Delay—The
propagation delay measured from the 50%
point of the latch-enable signal low-to-high
transition to the 50% point of an output highto-low transition.
tpw(E) Minimum Latch-Enable Pulse Width—The
minimum time the latch-enable signal must be
high to acquire and hold an input signal.
ts
Minimum Setup Time—The minimum time
before the negative transition of the latchenable pulse that an input signal must be present to be acquired and held at the outputs.
th
Minimum Hold Time—The minimum time after
the negative transition of the latch-enable signal
that an input signal must remain unchanged to
be acquired and held at the output.
_______________________________________________________________________________________
Ultra-Fast ECL-Output Comparator
with Latch Enable
MAX9685
COMPARE
LATCH
ENABLE
50%
LATCH
t pw (E)
ts
th
DIFFERENTIAL
INPUT
VOLTAGE
VIN
VOS
VOD
t pd
t pd (E)
Q
50%
Q
50%
Figure 3. Timing Diagram
_______________________________________________________________________________________
5
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
________________________________________________________Package Information
D
E
DIM
E1
A
A1
A2
A3
B
B1
C
D1
E
E1
e
eA
eB
L
A3
A A2
L A1
0° - 15°
C
e
B1
eA
B
eB
D1
Plastic DIP
PLASTIC
DUAL-IN-LINE
PACKAGE
(0.300 in.)
INCHES
MAX
MIN
0.200
–
–
0.015
0.175
0.125
0.080
0.055
0.022
0.016
0.065
0.045
0.012
0.008
0.080
0.005
0.325
0.300
0.310
0.240
–
0.100
–
0.300
0.400
–
0.150
0.115
PKG. DIM PINS
P
P
P
P
P
N
D
D
D
D
D
D
8
14
16
18
20
24
INCHES
MIN
MAX
0.348 0.390
0.735 0.765
0.745 0.765
0.885 0.915
1.015 1.045
1.14 1.265
MILLIMETERS
MIN
MAX
–
5.08
0.38
–
3.18
4.45
1.40
2.03
0.41
0.56
1.14
1.65
0.20
0.30
0.13
2.03
7.62
8.26
6.10
7.87
2.54
–
7.62
–
–
10.16
2.92
3.81
MILLIMETERS
MIN
MAX
8.84
9.91
18.67 19.43
18.92 19.43
22.48 23.24
25.78 26.54
28.96 32.13
21-0043A
DIM
D
0°-8°
A
0.101mm
0.004in.
e
B
A1
E
6
C
H
L
Narrow SO
SMALL-OUTLINE
PACKAGE
(0.150 in.)
A
A1
B
C
E
e
H
L
INCHES
MAX
MIN
0.069
0.053
0.010
0.004
0.019
0.014
0.010
0.007
0.157
0.150
0.050
0.244
0.228
0.050
0.016
DIM PINS
D
D
D
8
14
16
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
3.80
4.00
1.27
5.80
6.20
0.40
1.27
INCHES
MILLIMETERS
MIN MAX
MIN
MAX
0.189 0.197 4.80
5.00
0.337 0.344 8.55
8.75
0.386 0.394 9.80 10.00
_______________________________________________________________________________________
21-0041A
Ultra-Fast ECL-Output Comparator
with Latch Enable
DIM
E1
E
D
A
0°-15°
Q
L
L1
e
C
B1
B
S1
S
CERDIP
CERAMIC DUAL-IN-LINE
PACKAGE
(0.300 in.)
A
B
B1
C
E
E1
e
L
L1
Q
S
S1
INCHES
MIN
MAX
–
0.200
0.014
0.023
0.038
0.065
0.008
0.015
0.220
0.310
0.290
0.320
0.100
0.125
0.200
0.150
–
0.015
0.070
–
0.098
0.005
–
DIM PINS
D
D
D
D
D
D
8
14
16
18
20
24
MILLIMETERS
MIN
MAX
–
5.08
0.36
0.58
0.97
1.65
0.20
0.38
5.59
7.87
7.37
8.13
2.54
3.18
5.08
3.81
–
0.38
1.78
–
2.49
0.13
–
INCHES
MILLIMETERS
MIN
MAX MIN MAX
–
0.405
–
10.29
–
0.785
–
19.94
–
0.840
–
21.34
–
0.960
–
24.38
–
1.060
–
26.92
–
1.280
–
32.51
21-0045A
Q
φD
DIM
φD1
A
φb
φb1
φD
φD1
φD2
e
e1
F
k
k1
L
L1
L2
Q
α
β
F
L1
A
L2
L
BASE &
SEATING
PLANE
φb
φb1
e
e1
β
INCHES
MAX
MIN
0.185
0.165
0.019
0.016
0.021
0.016
0.375
0.335
0.335
0.305
0.160
0.110
0.230 BSC
0.115 BSC
0.040
0.034
0.027
0.045
0.027
0.750
0.500
0.050
0.250
0.045
0.010
36° BSC
36° BSC
MILLIMETERS
MIN
MAX
4.19
4.70
0.41
0.48
0.41
0.53
8.51
9.40
7.75
8.51
2.79
4.06
5.84 BSC
2.92 BSC
1.02
0.69
0.86
0.69
1.14
12.70
19.05
1.27
6.35
0.25
1.14
36° BSC
36° BSC
21-0023A
α
k1
k
φD2
10-PIN
TO-100 METAL CAN
PACKAGE
_______________________________________________________________________________________
7
MAX9685
___________________________________________Package Information (continued)
MAX9685
Ultra-Fast ECL-Output Comparator
with Latch Enable
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 ___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 1993
1994 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.