INTERSIL CA3256M

CA3256
T
UCT
ROD ACEMEN 47
P
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7
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REP 00-442-7
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Semiconductor
January 1999
[ /Title
(CA32
56)
/Subject
(25MH
z,
BiMO
S Analog
Video
Switch
and
Amplifier)
/Autho
r ()
/Keywords
(Harris
Semiconductor,
4x1,
video
crosspoint
switch,
multiplexer
multiplexor,
cable
driver,
5x1,
moni
tor output,
adjustable
gain,
25MHz, BiMOS Analog
Video Switch and Amplifier
Features
Description
• 5 Multiplex Video Channels
- 1 Independent Channel
- 4 Channels with Enable
The CA3256 BiMOS analog video switch has five channels
of CMOS multiplex switching for general-purpose videosignal control. One of four CMOS channels may be selected
in parallel with channel 5. The CMOS switches are inputs to
the video amplifier but may be used in bilateral switching
between channels 1 to 4 and channel 5. The analog
switches of channels 1 to 4 are digitally controlled with logic
level conversion and binary decoding to select 1 of 4
channels. The enable function controls channels 1 to 4 but
does not affect channel 5. LED output drivers are selected
with the channel 1-to-4 switch selection to indicate the ONchannel. Channel 5 may be used as a monitor output for
data or signal information on channels 1 to 4. The
transmission gate switches shown in the block diagram of
the CA3256 are configured in a “T” design to minimize
feedthrough. When the switch is off, the shunt or center of
the “T” is grounded.
• 4 LED Channel Indicator Outputs
• Wideband Video Amplifier . . . . . . . . 25MHz Unity Gain
• Adjustable Video Amplifier Gain
• High Signal-Drive Capability
Applications
• Video Multiplex Switch
• 75Ω Video Amplifier/Line Driver
• Video Signal-Level Control
• Monitor Switching Control
• TV/CATV Audio/Video Switch
• Video Signal Adder/Fader Control
Part Number Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
CA3256E
-40 to 85
18 Ld PDIP
E18.3
CA3256M
-40 to 85
20 Ld SOIC
M20.3
The amplifier has high input impedance to minimize the RON
transmission gate insertion loss. The amplifier output impedance is typically 5Ω in a complementary symmetry output.
The amplifier can directly drive a nominal 75Ω coaxial cable
to provide line-to-line video switching. The gain of the amplifier is programmable by different feedback resistor values
between pins 8 and 9. Compensation may also be used
between these pins for an optimally flat frequency response.
An internal regulated 5V bias reference with temperature
compensation permits stable direct-coupled output drive and
minimizes DC offset during signal switching.
Pinouts
CA3256
(PDIP)
TOP VIEW
CA3256
(SOIC)
TOP VIEW
IN 3
1
18 CONTROL B
LED 4
2
17 IN 2
IN 4
3
16 CONTROL A
GND
4
15 IN 1
V-
5
14 V+
ENABLE
6
13 IN/OUT 5
CONTROL C
7
12 LED 1
FEEDBACK
8
11 LED 2
AMP OUT
9
10 LED 3
IN3
1
LED4
2
19 IN2
IN4
3
18 CONTROL A
GND
4
17 NC
V-
5
16 IN1
ENABLE
6
15 V+
CONTROL C
7
14 IN/OUT5
FEEDBACK
8
13 NC
AMP OUT
9
12 LED1
LED3 10
11 LED2
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1999
8-1
20 CONTROL B
File Number
1769.5
CA3256
Block Diagram
5
4
3
13
3
1
FEED BACK
8
V+
IN/OUT
2
17
1
15
10K
BIAS
REG
4
-
AMPLIFIER
OUTPUT
9
+
VV+ 14
1K
10K
LED DRIVER
OUTPUTS
TG
12
CHANNEL 1
TG
11
ENABLE 6
BINARY
TO
1 OF 4
WITH
ENABLE
LOGIC
LEVEL
CONV.
CHANNEL 2
TG
10
CHANNEL 3
TG
A 16
B 18
2
CHANNEL 4
TG
V- 5
C
7
IN
TG
OUT
IN
IN
OUT
SW
SW
OPEN
CONTROL
OUT
SW
CLOSED
(DIP PIN OUT)
Switch Control Logic
CHANNEL
NUMBER
C
A
B
ENABLE
1
0
0
0
1
2
0
0
1
1
3
0
1
0
1
4
0
1
1
1
5 + (1-4) (Note)
1
Channel 1-4
1
5
1
Channel 5 Only
0
None
0
X
X
NOTE: For Maximum Video Bandwidth, Use Single Channel Selections
8-2
0
CA3256
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range (V+ to V-) . . . . . . . . . . . . . . . . . . . . . 18V
Control Input Voltage Range, All Inputs . . . . . . . . . . . . . . . . V+ to VSignal Input Voltage Range, Channel 1-5 . . . . . . . . . . . . . . . .3VP-P
Amplifier Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
DC LED Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, V+ = 12V; V- = GND
PARAMETER
SYMBOL
TYPICAL VALUES
UNITS
10 to 17
V
20
mA
Power Supply Voltage V+ to VPower Supply Current
ICC
SWITCH
AMPLIFIER
-
35
dB
Programmable Gain, FB Adjustment Range
-
-0.8 AOL
dB
Full Power Bandwidth
-
10
MHz
Unity Gain Bandwidth, 1kΩ, 7pF Compensation
-
25
MHz
Insertion Loss
-0.8
-
dB
Signal Feedthrough, 5MHz
-66
-
dB
ZIN
-
10
kΩ
ZOUT
-
5
Ω
Maximum Input Voltage
VI(MAX)
3
2.5
VP-P
Maximum Output Voltage, Clipped
VO(MAX)
-
7
VP-P
Reference Bias Output Voltage (V8 - V-)
-
5
V
Differential Gain
-
1
%
Differential Phase
-
1
Degree
-66
-
dB
LLC Switch Turn On/Off Time Delay
-
0.5
µs
Maximum LED Sink Current
-
30
mA
Typical Output Source Current
-
16
mA
Open Loop Gain
Input Impedance
Output Impedance
AOL
Off Isolation, Channel to Channel, ZIN = 75Ω
Channel Control Switch A, B, C and EN Threshold
(Notes 2, 3)
VTH
CAUTION: Connect the V- power supply voltage before or during the V+ turn-on.
NOTES:
2. Threshold value is referenced to GND.
3. VTH is restricted by the equation, VTH < V+ -1.
8-3
Approximately (V+ - V-)/2
V
CA3256
Electrical Specifications
TA = 25oC, V+ = 12V, VLED = 12V, V- = GND, Pin 4 = GND, Feedback Switch Closed, VHIGH = 9V, VLOW = 3V
(See Figure 1), Unless Otherwise Specified
INPUTS
CH 1
PARAMETERS
CH 2
CH 3
PIN 15 PIN 17 PIN 1
CHANNEL SWITCH CONTROL
CH 4
CH 5
A
B
C
PIN 3 PIN 13 PIN 16 PIN 18 PIN 7
ENABLE NOTE 6
TEST
PIN 6
PIN#
MIN
TYP MAX UNITS
Supply Current,
VLED = 0V
0V
0V
0V
0V
0V
3V
3V
3V
3V
14
10
16
22
mA
Dual Supply Current
V+ = +7V, V- = -5V
0V
0V
0V
0V
0V
0V
0V
0V
7V
14/5
10
20
26
mA
Amplifier Output
Voltage, Open Loop
VLED = 0V
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
6
8.5
10
V
Amplifier Output
Voltage, Closed Loop,
VLED = 0V
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
4.8
5.1
5.4
V
IOUT (MAX) (Source)
Open Loop
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
Note 4
-
-70
-25
mA
IOUT (MAX) (Sink)
Open Loop
0V
0V
0V
0V
0V
3V
3V
3V
3V
9
Note 5
10
16
-
mA
Input Leakage
Channel 1-5
3V
3V
3V
3V
3V
3V
3V
3V
3V
1, 3, 15,
17
-15
5
15
nA
Channel Control
Input A, B, C,
Enable Leakage
0V
0V
0V
0V
0V
Measure at 3V, 9V each;
Enable and Channel
Switching Control Inputs
6, 7, 16,
18
-20
10
20
nA
LED Off Voltage, VOFF
0V
0V
0V
0V
0V
Select Channel 0-5
2, 10,
11, 12
-
V
LED On Voltage, VON
0V
0V
0V
0V
0V
Select Channel 0-5
2, 10,
11, 12
±100µA Input Each Switch,
Channel 1-4 + 5
Switch Resistance,
RDS
RDS Match
Select Channel
1-4
9V
-
0.1
0.3
V
0.8
1.1
1.4
kΩ
-
-
3.6
5
%
9V
Calculation: (Max RDS - Min RDS)/Min RDS
11.97 11.99
Amplifier Output
Offset, VO , Feedback
Switch Closed
V+ = +7V, V- = -5V
0V
0V
0V
0V
0V
0V
0V
0V
7V
9
-100
45
100
mV
Closed Loop Gain
3V
0V
0V
0V
0V
3V
3V
3V
9V
9
-0.5
-0.1
0.5
dB
NOTES:
4. VOUT = +7V.
5. VOUT = +3V.
6. DIP Pinout.
8-4
CA3256
Test Circuits
V-
V+
+12 V
FEEDBACK
SWITCH
FEEDBACK
14
5
8
VBIAS
(V- +5V)
BIAS
REG
10K
1K
AMP
OUT
9
+
IN 1
15
10K
TG-1
OUTPUT
AMP
VLED
1.1K
IN 2
1
12
2
11
3
10
4
2
+12 V
TG-2
17
1.1K
IN 3
TG-3
1
1.1K
IN 4
TG-4
3
IN/OUT 5
LLC ENABLE
AND CHAN 1-4
SELECT
1.1K
TG-5
13
6 ENABLE
16 A
18 B
7 C
4
GND
CONTROL INPUTS (CHANNEL SELECT)
FIGURE 1. CA3256 TEST CIRCUIT (DIP PINOUT)
Application Information
CMOS analog switches are available in a wide variety of
forms, and have been known and used for some time. There
are a number of advantages to using the CMOS transmission gate as a switch:
•
•
•
•
•
•
•
•
•
Ideal Suitability to Series Cascade Arrangements
Simple Multiple Parallel Input Switching Arrangements
No Bipolar Junctions and, Hence, No Offset
Very Low Power Consumption
Wide Signal-Swing Capability
Fast Multiplexing and Video Switching
Wide Bandwidth
Low RON Channel Resistance
Bidirectional Signal Handling
An Integrated Video-Switch Amplifier
Commonly, integrated video-switch amplifiers have been fabricated in the bipolar technology using differential amplifiers in a
current-switching mode. In this form, two differential pairs are
needed for two input-signal sources. The handling of multiple
sources is very much more complex. The advantages of the
CMOS video-switch amplifier have already been noted. While
the bipolar video switch has high output drive and switching
speed as advantages, the price is high in voltage offset and current drain. The integrated device solution that is offered here is
in the use of the BiMOS technology, where both the CMOS and
bipolar processes complement each other to provide CMOS
switching with bipolar amplifiers. The BiMOS process allows
several CMOS switches to be coupled to a bipolar drive-amplifier in the same process to exploit the best of two technologies.
Other advantages are gained when the BiMOS process is
used for an IC video-switch amplifier design. The BiMOS
process calls for a P-substrate and, therefore, isolated N-epitaxial wells can be built for both N and P channel parts. The
boats provide for better isolation of the N and P channels.
The N and P wells in a transmission-gate cell can be
switched between source and rail; therefore, they have a
smaller body effect on both N and P devices, which results in
better gain linearity. Where desired, oxide capacitors are
available for bipolar amplifier compensation.
CA3256 Video-Switch Amplifier
The Block Diagram shows the functional diagram of the
CA3256, which consists of five MOS channels, each comprising a three-element T-switch. The output of the five
switches is made common and fed into the input of a bipolar
8-5
CA3256
selectable for use as a separate input or output in parallel
with any on channel, and may be used as a monitor, or for
pass-through, signal summing, or parallel distribution.
buffer amplifier. The T-switch, together with the input
impedance of the buffer, is typically 10kΩ, and has an insertion loss of approximately 0.8dB. The T-switch was designed
to handle up to 3VP-P input signal with low distortion. The
T-switches of the CA3256 conform to a break-before-make
format; hence, shorting to ground is eliminated.
In the application, the user has the option to specify V- = -5V
for the switch and a ground reference for the amplifier input
and output. Alternatively, the CA3256 may be used with a
single +12V supply. The logic select for channels 1 through 4
is controlled by the A, B and Inhibit lines with ground to V+
logic switching. The logic threshold is approximately
(V+ - V-)/2 referenced to ground. DC coupling may also be
used at the output (when V- is returned to a -5V supply). For
the circuit of Figure 3, AC coupling is used at the output and
input. The switching bias arrangement shown provides for
stable bias across each switch when in the off position to
minimize transients when the input is switched.
The amplifier is programmable for gain and, typically, can
provide a gain of 1 into a 75Ω load or a gain of 5 into a 1kΩ
load. The maximum output signal swing with linearity is
greater than 5VP-P for (V+ to V-) greater than or equal to
12V, while the maximum output current is approximately
20mA. The amplifier has base-current compensation to
reduce offset and a temperature compensated 5V zener referenced bias. Other features include LED-selector indicators
for channels 1 through 4. The fifth channel is independently
Typical Applications
V100K
V+
-5V
RF
+7V TO +12V
5
14
8
V- +5V
100K
BIAS
REG
100K
AMPLIFIER
TO CABLE
OUTPUT
1K
10K
-
9
+
10K
CHANNEL 1
INPUT
15
OUT
75Ω
75Ω
OUTPUT
AMP
TG-1
LED INDICATOR CHANNEL 1
VLED
12
1
17
TG-2
LED INDICATOR CHANNEL 2
2 OF 5
INPUTS
SHOWN
11
2
1
TG-3
LED INDICATOR CHANNEL 3
10
3
TG-4
3
CHANNEL 5
INPUT/
OUTPUT
LED INDICATOR CHANNEL 4
LLC
ENABLE
AND
CHAN 1-4
SELECT
2
4
WHERE AMPLIFIER GAIN:
13
R F + 1K
AV = 1 + ---------------------- x 0.9
10K
TG-5
i.e., FOR AV = 1.8
A
ENABLE
CHANNEL
1-4
16
6
4.7K
4.7K
B
18
SELECT
CHANNEL
1-4
RF = 9kΩ
C
SELECT
CHANNEL 7
5
4.7K
4
4.7K
GND
FIGURE 2. TYPICAL APPLICATION WITH DIRECT-COUPLED OUTPUT AND V- = -5V (DIP PINOUT)
8-6
CA3256
V-
V+ +12 TO +18V
RF
100K
0.1µF
0.047µF
0.047µF
2.2µF
2.2µF
CCOMP
100K
14
5
8
100K
V- +5V
BIAS
REG
75Ω
10K
2.2µF
CHANNEL 1
INPUT
220µF
OUTPUT
AMP
TG-1
VOUT 1
9
+
10K
15
VOUT 2
1K
75Ω
75Ω
LED INDICATOR CHANNEL 1
17
1
12
2
11
VLED
TG-2
LED INDICATOR CHANNEL 2
2 OF 5
INPUTS
SHOWN
TG-3
1
LED INDICATOR CHANNEL 3
3
TG-4
3
CHANNEL 5
INPUT/
OUTPUT
10
LED INDICATOR CHANNEL 4
LLC
ENABLE
AND
CHAN 1-4
SELECT
2.2µF
4
2
TG-5
13
WHERE AMPLIFIER GAIN:
R F + 1K
AV = 1 + ---------------------- x 0.9
10K
75Ω
ENABLE
CHANNEL
1-4
A
16
6
4.7K
4.7K
C
B
18
SELECT
CHANNEL
1-4
4.7K
4
7
SELECT
CHANNEL
5
4.7K
GND
FOR THIS CIRCUIT:
V+ = +12V
AV = 1.1
BW = 18MHz (SINEWAVE)
VOUT = 1VP-P
RF = 1K
Pulse Performance = 20ns tR for 0V to 2V Pulse. See Figure 4 for
frequency response.
VIN
V+ = +12V, RF = 1kΩ, CCOMP = 6pF.
VOUT
FIGURE 3. TYPICAL APPLICATION WITH AC-COUPLED INPUT AND OUTPUT, AND V- = GND (DIP PINOUT)
8-7
CA3256
VIN = 200mVP-P, AT LOW FREQUENCY 0dB REF. EQUAL
1.13 x GAIN, TA = 25oC
7pF
0
C COMP
8
-2
RF
1kΩ
GAIN (dB)
1kΩ
-4
VOUT
9
+
-6
220µF
VIN
TG
75Ω
OUTPUT
AMPLIFIER
-8
-10
0.01
0.1
1
FREQUENCY (MHz)
10
100
FIGURE 4A. CLOSED LOOP RESPONSE WITH
COMPENSATION CAPACITOR, CCOMP , AND RF ,
SEE FIGURE 4B
31
FIGURE 4B. TEST CIRCUIT FOR FIGURE 4A
VOUT = 200mVP-P , TA = 25oC
29
NO FEEDBACK
8
GAIN (dB)
27
25
VOUT
9
+
V IN
23
TG
220µF
150Ω
OUTPUT
AMPLIFIER
21
19
0.01
0.1
1
FREQUENCY (MHz)
10
100
FIGURE 4C. OPEN LOOP RESPONSE WITH NO FEEDBACK,
SEE FIGURE 4D
FIGURE 4D. TEST CIRCUIT FOR FIGURE 4C
FIGURE 4. FREQUENCY RESPONSE OF AC COUPLED CIRCUIT OF FIGURE 3
8-8
CA3256
10K (NOTE)
V+
VV+
V- = -5V
10K
OFF SET
ADJ.
15pF
5
14
RF
8
1K
V- +5V
BIAS
REG
VOUT = 2VP-P
10K
IN 1
9
+
10K
TG-1
15
GEN
1K
510Ω
OUTPUT
AMP
V-
75Ω
1
IN 2
75Ω
LED
TG-2
17
VLED
12
1.2K
75Ω
2
IN 3
1
11
TG-3
LED
1.2K
LED
1.2K
LED
1.2K
75Ω
3
TG-4
3
IN 4
LLC
ENABLE
AND
CHAN 1-4
SELECT
75Ω
IN 5
10
4
TG-5
13
75Ω
A
6
ENABLE
2
16
B
NOTE: Adjust offset for voltage at
pin 9 equal to 0V with no AC signal
and one channel “ON”. Dynamic
clamping may be accomplished by
error current feedback to pin 8.
C
18
4
7
GND
FIGURE 5. TYPICAL APPLICATION WITH DC-COUPLED INPUT AND OUTPUT, AND OFFSET ADJUST. OUTPUT VOLTAGE IS
FIXED BY THE V+ AND V- RANGE. (DIP PINOUT)
+1
0
-1
10
2VP-P
10V
0
1µs/DIV.
0.5V/DIV.
0.5V/DIV.
FIGURE 6A. GATED OUTPUT FOR V+ = +12V ENABLE = HIGH, CONTROL B = C = LOW, CONTROL A = 10V PULSE. THE BURST
OUTPUT IS DELAYED ~ 400ns AT tON, tOFF.
10µs/DIV.
10µs/DIV.
FIGURE 6B. STANDARD NTS COLOR BAR
FIGURE 6C. UNIFORM STEP SIGNAL WITH 3.58MHz MODULATION
FIGURE 6. PERFORMANCE OF CIRCUIT IN FIGURE 5
8-9
CA3256
7pF
2pF
AV = 1.1
BW = 18MHz
VOUT = 1VP-P
1K
11K
8
8
75Ω
9
AV = 2
BW = 15MHz
VOUT = 2VP-P
VOUT
9
VOUT
470Ω
75Ω
75Ω
NOTE: 470Ω added to increase source drive current.
FIGURE 7A.
FIGURE 7B.
2pF
8
1K
8
VOUT2
9
VOUT1
9
VOUT
75Ω
75Ω
AV = 1.1
BW = 40MHz (1.2X GAIN PEAK AT 25MHz)
VOUT = 200mVP-P
VOUT1
VOUT2
AV = 1.1
BW = 15MHz
VOUT = 200mVP-P
FIGURE 7C.
8
NO FEEDBACK
9
AV = 2
BW = 26MHz (UNITY GAIN)
VOUT = 400mVP-P
FIGURE 7D.
AOL = 30
BW = 250kHz
VOUT = 200mVP-P
7pF
30K
AV = 3.6
BW = 6MHz
VOUT = 200mVP-P
8
VOUT
VOUT
9
150Ω
FIGURE 7E.
FIGURE 7F.
100K
6pF
1K
-
AV = 1.1
BW = 28MHz
VOUT = 2VP-P
OFFSET ADJ.
(SETS DC OUT LEVEL)
+
200K
8
8
9
9
AV = 1.1
BW = 28MHz
VOUT = 2VP-P
10K
280Ω
RS
75Ω
ADJ.
VDC = 5V
150Ω
NOTE: Add RS to reduce high-frequency slewing.
FIGURE 7G.
FIGURE 7H.
FIGURE 7. OTHER TABULATED RESULTS FOR VARIATIONS OF LOAD AND FEEDBACK (V+ = +12V)
8-10
CA3256
Any combination of switch input circuits can be configured
with multiple, parallel, line-drive outputs. The video switch
amplifier circuit of Figure 8 illustrates how the CA3256 may
be configured in pairs to provide an 8-to-1 video switch
amplifier using a 3-bit address to select the input. It is also
possible to use the fifth channel input to tie signals to a
common bus line for distribution from the selected amplifier;
however, distributed capacitance loading will result in
reduced bandwidth. The 4 plus 1 combination of input-signal
switching provides for a wide assortment of video switch
circuit configurations.
While the BiMOS process does provide some compromises
for both the switch and the amplifier, the combined system is
capable of the performance needed in most high-quality,
switching applications. As an integrated system, many of the
problems in PC-board layout are simplified, and there is a
reduction in component count. In its simplest form, with
+12V and -5V supplies, the CA3256 may be DC connected
at the input and output; the LED indicators need not be
connected. Under these conditions, the circuit may be as
simple as the one in Figure 8.
A
B
C
A
B
C
EN1
+
VIN1 1
CH
1-4
-
VIN2 2
VIN3 3
VIN4 4
CH 5
5
V+
+12V
VOUT
GND
VCA3256
-5V
A
B
C
EN2
+
-
VIN5 1
VIN6 2
CH
5-8
VIN7 3
VIN8 4
NC
5
V+
+12V
GND
VCA3256
-5V
TRUTH TABLE
Summary
While each video-switch amplifier is designed for a specific
application and, to that end, is tailored as far as performance
to a given set of specifications, the circuit-designer’s goal is
generally the same in every case: to make the best possible
switch for the lowest cost. In this respect, the CA3256 IC
switch and amplifier discussed provide an excellent choice
for a cost-effective high-performance video-switch amplifier,
by taking advantage of the complementary features of both
high-speed CMOS and bipolar integrated circuits.
CH
C
A
B
1
0
0
0
2
0
0
1
3
0
1
0
4
0
1
1
5
1
0
0
6
1
0
1
7
1
1
0
8
1
1
1
FIGURE 8. AN 8-TO-1 VIDEO SWITCH AMPLIFIER USING TWO
CA3256 DEVICES
8-11