CD4014BM/CD4014BC 8-Stage Static Shift Register General Description The CD4014BM/CD4014BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages. Q outputs are available from the sixth, seventh and eighth stages. All outputs have equal source and sink current capabilities and conform to standard ‘‘B’’ series output drive. When the parallel/serial control input is in the logical ‘‘0’’ state, data is serially shifted into the register synchronously with the positive transition of the clock. When the parallel/ serial control input is in the logical ‘‘1’’ state, data is jammed into each stage of the register synchronously with the positive transition of the clock. Connection Diagram All inputs are protected against static discharge with diodes to VDD and VSS. Features Y Y Y Y Y Y Wide supply voltage range 3.0V to 15V High noise immunity 0.45 VDD (typ.) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 5V – 10V – 15V parametric ratings Symmetrical output characteristics Maximum input leakage: 1 mA at 15V over full temperature range Truth Table Dual-In-Line Package CL* L L L L L L K Parallel/ Serial Q1 Serial PI 1 PI n Qn Input (Internal) Control X X X X 0 1 X 1 1 1 1 0 0 X 0 1 0 1 X X X 0 0 1 1 X X X 0 1 0 1 0 1 Q1 0 0 1 1 Qnb1 Qnb1 Qn No Change *Level change X e Don’t care case Order Number CD4014B TL/F/5947 – 1 Top View Logic Diagram TL/F/5947 – 2 C1995 National Semiconductor Corporation TL/F/5947 RRD-B30M105/Printed in U. S. A. CD4014BM/CD4014BC 8-Stage Static Shift Register February 1988 Absolute Maximum Ratings (Notes 1 & 2) Recommended Operating Conditions (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) CD4014BM CD4014BC b 0.5V to a 18V b 0.5 to VDD a 0.5V b 65§ C to a 150§ C 3.0V to 15V 0 to VDD b 55§ C to a 125§ C b 40§ C to a 85§ C 700 mW 500 mW 260§ C DC Electrical Characteristics CD4014BM (Note 2) Symbol Parameter b 55§ C Conditions Min a 25§ C Max Min a 125§ C Min Units Typ Max Max 5 10 20 0.1 0.2 0.3 5 10 20 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V IDD Quiescent Device Current VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VOL Low Level Output Voltage VDD e 5V VDD e 10V VDD e 15V VOH High Level Output Voltage VDD e 5V VDD e 10V VDD e 15V VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 3 6 9 3.5 7.0 11.0 V V V IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.64 1.6 4.2 0.51 1.3 3.4 0.88 2.2 8 0.36 0.9 2.4 mA mA mA IOH High Level Output VDD e 5V, VO e 4.6V Current (Note 3) VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V b 0.64 b 1.6 b 4.2 b 0.51 b 1.3 b 3.4 b 0.88 b 2.2 b8 b 0.36 b 0.9 b 2.4 mA mA mA IIN Input Current ( (l lIOl k 1 mA 4.95 9.95 14.95 IOl k 1 mA 4.95 9.95 14.95 1.5 3.0 4.0 VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V 5 10 15 2 4 6 4.95 9.95 14.95 V V V 1.5 3.0 4.0 1.5 3.0 4.0 b 0.10 b 10 b 5 b 0.10 b 1.0 0.10 10b5 0.10 1.0 V V V mA mA DC Electrical Characteristics CD4014BC (Note 2) Symbol Parameter b 40§ C Conditions Min VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VDD e 5V VDD e 10V lIOl k 1 mA VDD e 15V Max a 25§ C Min a 85§ C Min Units Typ Max Max 20 40 80 0.1 0.2 0.3 20 40 80 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V IDD Quiescent Device Current VOL Low Level Output Voltage VOH High Level Output Voltage VDD e 5V VDD e 10V VDD e 15V VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 3 6 9 3.5 7.0 11.0 V V V IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 0.52 1.3 3.6 0.44 1.1 3.0 0.88 2.2 8 0.36 0.9 2.4 mA mA mA ( (l 4.95 9.95 14.95 IOl k 1 mA 2 4.95 9.95 14.95 1.5 3.0 4.0 5 10 15 2 4 6 4.95 9.95 14.95 1.5 3.0 4.0 V V V 1.5 3.0 4.0 V V V DC Electrical Characteristics CD4014BC (Note 2) (Continued) Symbol Parameter Conditions b 40§ C Min IOH High Level Output Current (Note 3) VDD e 5V, VO e 4.6V VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V a 25§ C Max b 0.52 b 1.3 b 3.6 Min Typ b 0.44 b 1.1 b 3.0 b 0.88 b 2.2 b8 a 85§ C Max Min Units Max b 0.36 b 0.90 b 2.4 mA mA mA b 0.3 b 10 b 5 b 0.3 b 1.0 0.3 10b5 0.3 1.0 mA mA AC Electrical Characteristics* TA e 25§ C, input tr, tf e 20 ns, CL e 50 pF, RL e 200 kX Typ Max Units tPHL, tPLH Symbol Propagation Delay Time Parameter VDD e 5V VDD e 10V VDD e 15V Conditions Min 200 80 60 320 160 120 ns ns ns tTHL, tTLH Transition Time VDD e 5V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns fCL Maximum Clock Input Frequency VDD e 5V VDD e 10V VDD e 15V tW Minimum Clock Pulse Width VDD e 5V VDD e 10V VDD e 15V trCL, tfCL Clock Rise and Fall Time (Note 4) VDD e 5V VDD e 10V VDD e 15V tS Minimum Set-Up Time (Note 6) Serial Input tH t 200 ns VDD e 5V VDD e 10V VDD e 15V Parallel Inputs tH t 200 ns 2.8 6 8 4 12 16 90 40 25 MHz MHz MHz 180 80 50 ns ns ns 15 15 15 ms ms ms 60 40 30 120 80 60 ns ns ns VDD e 5V VDD e 10V VDD e 15V 80 40 30 160 80 60 ns ns ns Parallel/Serial Control tH t 200 ns VDD e 5V VDD e 10V VDD e 15V 100 50 40 200 100 80 ns ns ns tH Minimum Hold Time Serial In, Parallel In, tS t 400 ns Parallel/Serial Control VDD e 5V VDD e 10V VDD e 15V 0 10 15 ns ns ns CI Average Input Capacitance (Note 5) Any Input 7.5 pF CPD Power Dissipation Capacitance (Note 5) 5 110 pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOL and IOH are tested one output at a time. Note 4: If more than one unit is cascaded trCL should be made less than or equal to the fixed propagation delay of the output of the driving stage for the estimated capacitive load. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C family characteristics application note AN-90. Note 6: Setup times are measured with reference to clock and a fixed hold time (tH) as specified. 3 Typical Performance Characteristics TL/F/5947–3 TL/F/5947 – 4 4 TL/F/5947 – 5 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4014BMJ or CD4014BCJ NS Package Number J16A 5 CD4014BM/CD4014BC 8-Stage Static Shift Register Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4014BMN or CD4014BCN NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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