CHR0100a 5.8GHz I/Q Mixer GaAs Monolithic Microwave IC Description I Vg The CHR0100a is a single chip MMIC including an I/Q mixer and a RF gain block that minimises the overall conversion loss of the receiver and provides the RF signal to the mixer through a power divider. The circuit is manufactured with the PHEMT process : 0.25µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in chip form or in ceramic leadless chip carrier. Q Vd RF LO Block diagram Main Features ■ 5.8GHz centre frequency ■ DC-50MHz IF bandwidth ■ Low noise figure ■ Low I/Q phase & amplitude unbalance ■ Chip size : 1.77 x 1.37 x 0.10 mm Conversion gain (RF to I; RF to Q) and phase unbalance Main Characteristics Tamb = +25°C Symbol Parameter Fop Operating frequency range Cg Conversion gain (RF to I; RF to Q) Plo LO input power Min. Typ. Max. Unit 5.725 5.8 5.875 GHz -4 -2.5 dB 6 dBm ESD Protections : Electrostatic discharge sensitive device observe handling precaution ! Ref. : DSCHR01000161 -9-Jun-00 1/6 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Route Départementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 5.8GHz Image rejection mixer CHR0100a Electrical Characteristics Tamb = +25°C Symbol Parameter Fop Operating frequency range BWif IF frequency band Test conditions Typ. Max. Unit 5.725 5.8 5.875 GHz 50 MHz DC Cg Conversion gain, RF to I or RF to Q NF Pif_1dB Min. (1) -4 -2.5 dB Noise figure (DSB), RF to I or RF to Q IF=10MHz 5 dB I or Q IF output power at 1dB compression gain -5 dBm 8 dBm Plo LO input power ∆ϕ I/Q phase unbalance 10 15 ° I/Q amplitude unbalance 0.5 1.0 dB ∆Cg 5 Vd Positive bias voltage 4 Id Bias current 15 V 25 (1) Conversion gain will be 3dB higher after I/Q combination. Absolute Maximum Ratings (1) Tamb = +25°C Symbol Parameter Values Unit Vd Positive supply voltage 6 V Vg Negative supply voltage -2 to 0 V Pin Maximum peak input power overdrive (2) 10 dBm Top Operating temperature range -50 to 70 °C Tstg Storage temperature range -55 to 155 °C (1) Operation of this device above anyone of these parameters may cause permanent damage (2) Duration < 1s. Ref. : DSCHR01000161 -9-Jun-00 2/6 Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Specifications subject to change without notice mA 5.8GHz Image Rejection Mixer CHR0100a Chip Pad Allocation VgI VgQ I Q CHR0100a LO Vd RF Q VgQ Input And Output Pin References Pin Description RF RF signal input LO LO signal input VgI I mixer negative supply voltage VgQ Q mixer negative supply voltage Vd Positive supply voltage I First IF output Q Second IF output (in quadrature) Connection of only one of the two VgQ and Q pads is necessary VgI, VgQ only necessary for low LO power Ref. : DSCHR01000161 -9-Jun-00 3/6 Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Specifications subject to change without notice 5.8GHz Image rejection mixer CHR0100a Typical Bias Configuration The typical bias voltage applied to the chip is Vd = 4V. If the LO power is low (ex: < 5dBm) one can apply a negative voltage (-0.3V) on Vg to improve and secure the conversion characteristic. Each Vg and Vd port should have a 10nF decoupling capacitor to the ground. Connection of only one of the two VgQ and Q pads is necessary VgI VgQ 10nF Vd 10nF I CHR0100a LO 10nF Q RF Q 10nF VgQ Chip Mechanical Data CHR0100a Chip size 1770 ± 20 µm x 1370 ± 20 µm Chip thickness 100 ± 10 µm Ref. : DSCHR01000161 -9-Jun-00 4/6 Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Specifications subject to change without notice 5.8GHz Image Rejection Mixer CHR0100a General tolerance Package Pin Allocation (SJ) Pin Number Description RF 20 RF signal input LO 11 LO signal input VgI 7 I mixer negative supply voltage VgQ 6 Q mixer negative supply voltage Vd 1 Positive supply voltage I 4 First IF output Q 3 Second IF output (in quadrature) 10,12,15,17, 19,21 GROUND 2,5,8,9,13,14, 16,18,22,23,24 Not connected Ref. : DSCHR01000161 -9-Jun-00 5/6 Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Specifications subject to change without notice 5.8GHz Image rejection mixer CHR0100a Ordering Information Chip form : CHR0100a99F/00 Package : CHR0100aSJF/24 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHR01000161 -9-Jun-00 6/6 Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Specifications subject to change without notice