SONY CXA2610AN

CXA2610AN
Preliminary
Laser Driver
Description
The CXA2610AN is a laser driver IC for optical
discs. This IC supports higher optical power output
speeds.
Features
• LD driver with excellent driving capability
• Write current of 250mA (max.) possible by setting
the IIN2 (Pin 2) and IIN3 (Pin 5) external resistors
• Rise time ≈ 3ns
• Fall time ≈ 4ns
• The oscillation frequency of the built-in oscillation
circuit can be set from 100 to 600MHz by
connecting the OSCFR (Pin 4) external resistor to
GND.
• The oscillator amplitude initial value of the built-in
oscillation circuit can be set by connecting the
OSCGA (Pin 12) external resistor to GND, and the
oscillator amplitude can be adjusted by the IINR
input current value.
• Oscillation ON/OFF can be set as desired.
• Single +5V power supply
• TTL/CMOS control for control system
16 pin SSOP (Plastic)
Absolute Maximum Ratings
• Supply voltage
Vcc
5.5
• Operating temperature
Topr –10 to +70
• Storage temperature
Tstg –65 to +150
Operating Conditions
Supply voltage
V
°C
°C
4.5 to 5.5
V
Applications
• CD-R driver
• CD-RW driver
• DVD driver
• Writable optical driver
• Laser diode current switching
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
PE00145-PS
CXA2610AN
Block Diagram
IINR
1
V-I
16 Vcc
IIN2
2
V-I
15 Vcc
GND
3
OSCFR
4
IIN3
5
CONTR
6
CONT2
7
CONT3
8
Current
SW
Driver
14 LD0
13 GND
OSC
V-I
12 OSCGA
11 ENABLE
Delay
TTL
10 OSCENA
9
Vcc
Pin Description
Pin
No.
Symbol
I/O
Description
1
IINR
I
Oscillation level adjustment.
2
IIN2
I
LD drive current setting input.
3
GND
—
4
OSCFR
I
Oscillation frequency adjustment.
5
IIN3
I
LD drive current setting input.
6
CONTR
I
LD drive current output setting.
7
CONT2
I
LD drive current output setting.
8
CONT3
I
LD drive current output setting.
9
Vcc
10
OSCENA
I
Oscillation ON for read/forced oscillation ON control.
11
ENABLE
I
LD drive current ON/OFF control. (High: ON, Low: OFF)
12
OSCGA
I
Oscillation level initial value setting.
13
GND
—
Ground.
14
LD0
O
LD anode side connection.
15
Vcc
—
VCC.
16
Vcc
—
VCC.
—
Ground.
VCC.
–2–
Current consumption 2
Current consumption 3
Pin voltage 1
Pin voltage 2
Output drive current
Output drive current
Output drive current
Input/output current gain
Input/output current gain
2
3
4
5
6
7
8
9
10
–3–
Fall time
Overshoot
CONT delay 1
CONT delay 2
LD delay 1
LD delay 2
Oscillation frequency
Oscillation level
13
14
15
16
17
18
19
20
Logic Low level
Logic High level
Input resistance
21
22
23
Logic
Rise time
12
AC items
Input/output current gain
Current consumption 1
1
11
Measurement item
Measurement No.
Electrical Characteristics
—
—
—
VTHH
ZIN
1.3
VTHL
OSCLE
OSCFR
—
—
—
—
—
—
—
—
—
—
—
—
2.0
2.0
60
Input impedance for IINR, IIN2 and IIN3
CONTR, CONT2, CONT3, OSCENA, ENABLE
1.3
85
175 252 375
2
77
Oscillation level when IINR = 2V
CONTR, CONT2, CONT3, OSCENA, ENABLE
189
Oscillation frequency
2.2
Time from 50% of ENABLE (High → Low) to 50% of output final value
H→L
LDELAY2
2.0
2.0
4.4
Time from 50% of ENABLE (Low → High) to 50% of output final value
L→H
2.0
LDELAY1
1.3
3.4
Time from 50% of CONT3 (Low → High) to 50% of output final value
3.1
H→L
1.3
CDELAY2
CDELAY1
Time from 50% of CONT3 (High → Low) to 50% of output final value
—
4
3
120 136 145
120 133 145
H→L
2.0
1.3
IOUT = 40mA (CONTR) + 40mA (CONT2), settling 10 to 90%
IOUT = 40mA (CONTR) + 40mA (CONT2)
2.0
Current gain measurement for IIN3 (∆IOUT/∆IIN)
H→L
2.0
95
Current gain measurement for IINR (∆IOUT/∆IIN)
OVS
2.0
145 163 175
Output current for IIN3 pin input 5V
Current gain measurement for IIN2 (∆IOUT/∆IIN)
145 157 175
Output current for IIN2 pin input 5V
104 115
115 125 145
Output current for IINR pin input 5V
IOUT = 40mA (CONTR) + 40mA (CONT2), settling 10 to 90%
H→L
1.3
2.0
1.3
80
103 120
1.21 1.257 1.3
Pin voltage measurement
Pin voltage measurement
83
60
Current consumption for IINR input voltage where oscillation level =
47mAp-p
Current consumption when CONTR = Low for ICC2 (OSC: ON)
40
Min. Typ. Max.
OSC: L (write mode). LD: OFF
L→H
1.3
2.0
2.0
1.3
2.0
2.0
2.0
2.0
1.3
1.3
1.3
Measurement condition and method
TF
TR
IGAIN3
1.3
2.0
IGAIN2
1.3
2.0
2.0
IOUT2
2.0
2.0
1.3
1.3
IOUT1
—
—
IGAIN1
—
VLE
—
2.0
—
2.0
—
VFR
2.0
IOUT3
1.3
2.0
CONT3 OSCENA ENABLE
Control status
CONTR CONT2
ICC3
ICC2
ICC1
Symbol
Ω
V
V
mAp-p
MHz
ns
ns
ns
ns
%
ns
ns
—
—
—
mA
mA
mA
mV
V
mA
mA
mA
Unit
(Ta = 25°C, Vcc = 5V)
CXA2610AN
CXA2610AN
Electrical Characteristics Measurement Circuit
Vcc
22µ
0.1µ
GND
V1 3.9kΩ
IINR
1
V-I
16
2
V-I
15
V2 3.9kΩ
IIN2
Current
SW
3
4.3kΩ
10Ω
Driver
14
13
4
20Ω
V5 3.9kΩ
5
IIN3
OSC
V-I
12
V11
V6
V10
V7
7
CONT2
TTL
Delay
10
V8
CONT3
ENABLE
11
6
CONTR
9
8
–4–
OSCENA
CXA2610AN
Description of Functions
(1) LD drive current value setting
The current controlled by the current setting pins IINR, IIN2 and IIN3 is output from the LD0 pin.
The current flowing to the LD0 pin can be set independently for IINR, IIN2 and IIN3 by CONTR, CONT2 and
CONT3.
(2) LD drive current forced OFF
Forced OFF is enabled by setting the ENABLE pin Low.
(3) Oscillation circuit
The oscillation circuit is turned ON forcibly by setting the OSCENA pin Low.
(OSCENA × CONTR × (CONT2 + CONT3))
The oscillation circuit is turned ON by setting the OSCENA pin High only for read.
(OSCENA × CONTR × CONT2 × CONT3)
(4) Oscillation frequency adjustment
The oscillation frequency can be varied by the external resistance value connected to the OSCFR pin.
(5) Oscillation level adjustment
The oscillation level initial value can be set by the external resistance value connected to the OSCGA pin.
The oscillation level can be adjusted by varying the IINR input current value.
In addition, the read block DC compensation current IR that flows when oscillation is OFF is independent of
the OSCGA pin external resistance value, and is constant.
Level adjustment
0
IINR input current [µA]
For large OSCGA
external resistance
(Io ≈ 0mA)
For small OSCGA
external resistance
Initial setting
Oscillator amplitude [mAp-p]
IR – Output current [mA]
IO – Oscillator amplitude [mAp-p]
Oscillator OFF
12
2k
IO
IR < IO
IO
IR > IO
IINR input current [µA]
OSCGA pin voltage
40
×
OSCGA external resistance
9
[mAp-p]
(6) Logic
The logic table for the CONTR, CONT2, CONT3 and ENABLE pins is shown below.
Be sure to also check the timing chart on page 7.
ENABLE
CONTR
CONT2
CONT3
LD0
L
X
X
X
OFF
H
H
H
H
OFF
H
L
H
H
IINR
H
L
L
H
IINR + IIN2
H
L
H
L
IINR + IIN3
H
L
L
L
IINR + IIN2 + IIN3
–5–
IO + 2 (IR – IO)
IR
OSCGA external resistance [Ω]
IO ≈
2IR
CXA2610AN
Notes on Operation
• Locate the external resistors connected to the IINR, IIN2 and IIN3 pins close to the IC package to prevent the
effect from other signal lines.
• Make the wiring distance between the output LD0 pin and the laser diode as short as possible.
If this wiring is longer, the output waveform characteristics show that the rise and fall times (Tr and Tf)
become slower as the ringing becomes larger.
• The external resistor connected to Pin 10 (OSCGA) should be within the range from 12Ω to 2kΩ.
In addition, this resistance value should be set in consideration of the laser diode Ith so that the oscillation
level at IINR = 0V does not exceed the read power.
• Temperature assurance
The junction temperature for the CXA2610AN laser driver should not exceed 150°C. In addition, the power
consumption (PO) should be the allowable power dissipation (PD) or less, and the IC should be used with a
lowered thermal resistance (θj-a) for board mounting so that normal operation is possible at the maximum
operating temperature of 70°C.
Widening the GND area on the set board and other heat radiation countermeasures within the set are
necessary in order to lower θj-a.
This is because the CXA2610AN thermal resistance (θj-a) differs according to the board, and the power
consumption (PO) is also difficult to predict with future increases in power.
Obtain the thermal resistance (θj-a) and power consumption (PO) of the package by the following method.
Power consumption (PO): Oscillator ON state (OSC level = 47mAp-p)
PO = (ICC2 + (total of each input current × 10)) × VCC + (IOP × (VCC – VOP))
ICC2: See page 3 of this Data Sheet.
IOP: Output drive current flowing from the LD0 pin to the laser diode
VOP: Laser diode operating voltage
or, the power consumption can also be obtained as follows.
PO = (ICC × VCC) – (IOP × VOP)
ICC: Device current consumption (including IOP) during operation
Thermal resistance (θj-a) when mounted on a board
The diode temperature coefficient is –2.27mV/°C
(1) ENABLE pin voltage – VCC pin voltage after applying 0V to the IINR, IIN2 and IIN3 pins = V1
(2) ENABLE pin voltage – VCC pin voltage immediately after applying 3V to IINR = V2
(3) ENABLE pin voltage – VCC pin voltage after applying 3V to the IINR pin and reaching a
thermally balanced state = V3
The change in current consumption between (1) and (2) ∆ICC = (3V/(Rext + 250Ω)) × 104.
This ∆ICC causes the ENABLE pin internal forward protective diode connection VCC voltage to vary
(∆VCC) due to the effects of the wiring resistance from the VCC pin voltage which is used as the
reference.
The voltage fall coefficient (VR) used to correct this ∆VCC can be obtained by VR = (V1 – V2)/∆ICC.
Using VR to apply correction to V3 yields the equation:
(∆ICC × VR) + V3 = V4.
From this, ∆Tj = (V4 – V2) mV/–2.27mV/°C, and θj-a = ∆Tj/PO [°C/W].
• Allowable power dissipation (PD) ≥ PO [W]
PD = (150°C – ambient temperature)/θj-a
• Maximum operating temperature 70 °C
(150°C – ∆Tj) ≥ 70°C
Thus, if θj-a can be lowered from these two conditions, the maximum operating temperature can also
be raised.
VCC
Diode measurement point
1MΩ
ENABLE
VCC
11
10V
10
5V
9
5V
5V
Thermal Resistance Measurement Circuit
–6–
CXA2610AN
Timing Chart
LD0
ENABLE
CONTR
CONT2
CONT3
OSCENA
Application Circuit
1
IINR
Vcc 16
2
IIN2
Vcc 15
3
GND
LD0 14
4
OSCFR
5
IIN3
TTL/CMOS
6
CONTR
ENABLE 11
TTL/CMOS
TTL/CMOS
7
CONT2
OSCENA 10
TTL/CMOS
TTL/CMOS
8
CONT3
Vcc
Voltage
DAC
GND 13
LD
OSCGA 12
9
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
–7–
CXA2610AN
Example of Representative Characteristics
High frequency oscillator amplitude vs. Read current characteristics
250
150
100
OSCGA external resistance value
20Ω
2kΩ
50
0
0
200
400
600
800
1000
1200
1400
IINR input current [µA]
High frequency oscillator amplitude frequency dependence (OSCGA = 20Ω)
200
180
160
Oscillator amplitude [mAp-p]
Oscillator amplitude [mAp-p]
200
140
120
100
80
60
Approximately 200MHz
Approximately 400MHz
40
20
0
0
200
400
600
800
IINR input current [µA]
–8–
1000
1200
1400
CXA2610AN
High frequency oscillator frequency vs. External resistance
700
600
Oscillator frequency [MHz]
500
Oscillator frequency
400
300
200
100
0
10
1
OSCFR pin external resistance value [kΩ]
IIN3 input/output current characteristics
350
300
Output current [mA]
250
200
Supply voltage
4.5V
5V
5.5V
150
100
50
0
0
500
1000
1500
Input current [µA]
–9–
2000
2500
3000
CXA2610AN
Package Outline
Unit: mm
16PIN SSOP (PLASTIC)
+ 0.2
1.25 – 0.1
∗5.0 ± 0.1
0.1
9
16
6.4 ± 0.2
∗4.4 ± 0.1
A
8
1
0.65
b
0.13 M
(0.15)
(0.22)
b=0.22 ± 0.03
+ 0.03
0.15 – 0.01
+ 0.1
b=0.22 – 0.05
+ 0.05
0.15 – 0.02
B
0.5 ± 0.2
0.1 ± 0.1
DETAIL B : SOLDER
DETAIL B : PALLADIUM
NOTE: Dimension “∗” does not include mold protrusion.
0° to 10°
PACKAGE STRUCTURE
DETAIL A
PACKAGE MATERIAL
EPOXY RESIN
SOLDER / PALLADIUM
PLATING
SONY CODE
SSOP-16P-L01
LEAD TREATMENT
EIAJ CODE
SSOP016-P-0044
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.1g
JEDEC CODE
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
– 10 –