CXA3556N IF Down Converter for Digital Broadcast Description The CXA3556N is a one-chip integrated IC that processes IF signals of a digital broadcast tuner and includes an AGC amplifier circuit, a mixer circuit, a local oscillator circuit and an output amplifier circuit. The package utilizes a 24-pin SSOP suitable for surface mounting. Features • AGC control width that has a 56dB variable range • Low noise characteristics • Low distortion characteristics (in particular, during AGC gain reduction) • Includes switching function between down converter mode and linear amplifier mode • Variable output amplifier gain by changing external resistance • Includes RF AGC output pin • Variable RF AGC settings • AGC control curve characteristics with excellent linearity 24 pin SSOP (Plastic) Absolute Maximum Rating (Ta = 25°C) • Supply voltage Vcc –0.3 to +12 • Operating temperature Topr –55 to +150 V °C Operating Conditions • Supply voltage Vcc • Operating temperature Topr V °C 4.75 to 5.25 –25 to +75 Applications Digital broadcast tuners Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E02426-PS CXA3556N Block Diagram and Pin Configuration IFIN1 1 24 AGCIN IFIN2 2 23 MODESEL RFAGC 3 Comparator IREG 4 REG VREG 5 22 AGCGND 21 AO2 20 AO1 AGC Amp. Output Amp. LOB1 6 19 GND LOC1 7 18 AGCREF LOC2 8 LOB2 9 OSC Mixer 17 E2 16 E1 VCC1 10 15 AIN2 MO1 11 14 AIN1 MO2 12 13 VCC2 –2– CXA3556N Pin Description and Equivalent Circuit Pin No. 1 Symbol IFIN1 Pin voltage Equivalent circuit Pin description VCC1 10 1.4V 1 IF inputs. 2 5k 2 IFIN2 5k 1.4V 22 AGCGND 3 3 RFAGC RF AGC voltage output. Comparator output. Low level: 0.4V or less High level: 8V or more — 22 AGCGND VCC1 10 4 IREG 2.6V Connects external resistance 27kΩ. 4 22 AGCGND VCC1 10 5 VREG Connects external capacitance 1µF. 3.3V 5 22 AGCGND 6 LOB1 2.9V 6 8 LOC1 9 VCC1 10 7 7 3.7V Connects external capacitance and crystal oscillator. 8 LOC2 3.7V 9 LOB2 2.9V 19 GND –3– CXA3556N Pin No. 10 Symbol VCC1 Pin voltage Equivalent circuit 5V Power supply. VCC1 10 11 MO1 Pin description 2.3V Mixer output pin. 11 12 12 MO2 2.3V 19 GND 13 VCC2 5V 14 AIN1 1.3V Power supply. VCC1 10 200 15 AIN2 1.3V 14 Output amplifier circuit inputs. Gain of output amplifier circuit can be changed by connecting external resistance between Pins 16 and 17. 200 15 16 E1 0.6V 17 E2 0.6V 10k 10k 19 17 16 VCC1 10 90µA 18 18 AGCREF — 22 19 GND 0V 20 AO1 2.7V AO2 2.7V RF AGC setting voltage adjustment pin. Connect external resistance between Pin 18 and GND and change the value to change RF AGC output voltage. AGCGND GND 10 VCC1 20 21 21 GND 19 GND –4– Output amplifier output. CXA3556N Pin No. Symbol Pin voltage 22 AGCGND 0V AGC circuit GND. — Selects either IF down converter mode or linear amplifier mode. When the voltage applied to this pin is 0.3V or less, the mode is down converter mode. When the voltage is 4.75 to 5.25V, the mode is linear amplifier mode. Equivalent circuit Pin description 20k 23 MODESEL 23 22 GND VCC1 10 24 AGCIN AGC control. Input voltage range is 0 to 2.2V. — 24 22 AGCGND –5– CXA3556N Electrical Characteristics (VCC = 5V, Ta = 25°C) (1) IF down converter mode (fvco = 49.38MHz) Item Measurement conditions Symbol Current ICCA consumption A Min. Typ. Max. Unit Input signal = no signal AGC_IN voltage = 0V 44 63 77 mA Gain 1 G1 Input signal = 1 wave (43.5MHz), AGC_IN voltage = 2.2V Output signal = 1Vp-p 65 68.5 73 dB Gain 2 G2 Input signal = 1 wave (43.5MHz), AGC_IN voltage = 0V Output signal = 1Vp-p 10 12.2 15 dB Gain width G3 G3 = G1 – G2 54 56 58 dB IM3_1 DIS1 Input signal = 2 waves (43.5MHz, 43.6MHz)/–26dBm Output signal = 1Vp-p –44 –51 — dBc IM3_2 DIS2 Input signal = 2 waves (43.5MHz, 43.6MHz)/–21dBm Output signal = 1Vp-p –42 –51 — dBc Output noise 1 NF1 Input signal = –60dBm (43.5MHz) Output signal = 1Vp-p — –100 –96 dBc/Hz Output noise 2 NF2 Input signal = –20dBm (43.5MHz) Output signal = 1Vp-p — –120 –111 dBc/Hz Min. Typ. Max. Unit (2) Linear amplifier mode Item Symbol Measurement conditions Current ICCB consumption B Input signal = no signal AGC_IN voltage = 0V 44 63 77 mA Gain 4 G4 Input signal = 1 wave (43.5MHz), AGC_IN voltage = 2.2V Output signal = 1Vp-p 65 68.5 73 dB Gain 5 G5 Input signal = 1 wave (43.5MHz), AGC_IN voltage = 0V Output signal = 1Vp-p 10 12.7 15 dB Gain width G6 G6 = G4 – G5 54 56 58 dB IM3_3 DIS3 Input signal = 2 waves (43.5MHz, 43.6MHz)/–26dBm Output signal = 1Vp-p –44 –51 — dBc IM3_4 DIS4 Input signal = 2 waves (43.5MHz, 43.6MHz)/–21dBm Output signal = 1Vp-p –42 –51 — dBc Output noise 3 NF3 Input signal = –60dBm (43.5MHz) Output signal = 1Vp-p — –100 –96 dBc/Hz Output noise 4 NF4 Input signal = –20dBm (43.5MHz) Output signal = 1Vp-p — –120 –111 dBc/Hz Min. Typ. Max. Unit (3) Output amplifier characteristics Item F characteristics Symbol F Measurement conditions Input signal = 60MHz Short between Pins 16 and 17 –6– –3 –1.5 0 dB CXA3556N Measurement circuit 1 IF down converter mode AGCIN 0 to 2.2V ∗3 5V (ICC2) Output 1µ 51 51 470 470 R 10n 1n 1k 10n 680 AO1 GND E1 AIN2 AIN1 VCC2 MO2 AO2 MO1 AGCGND VCC1 MODESEL LOB2 13 E2 14 LOC2 15 AGCREF 16 LOC1 17 LOB1 18 VREG 19 IREG 20 RFAGC 21 IFIN2 22 IFIN1 23 AGCIN 51p 24 1 2 3 4 5 6 7 8 9 10 11 12 1n 1n 200 1n 1µ 2p 47k ∗1 SG input 2p 10p 6.8µH 6.8µH 51p 100p 27k 1n 51p 51p 300 300 10n 10n 1µH 1µ 27p 49.38MHz ∗2 100p 27p 5V (ICC1) ∗3 9V –7– ∗1 Toko 617DB-1018 ∗2 3rd overtone crystal oscillator (49.381MHz) ∗3 ICCA = ICC1 + ICC2 CXA3556N Measurement circuit 2 Linear mode AGCIN 0 to 2.2V 5V (ICC1) ∗4 5V (ICC2) Output 1µ 51 51 470 470 R 1n 1n MO1 MO2 4 5 6 7 8 9 10 11 12 1n 1n 200 1n 100p 27k 1n 1µ 300 300 1n 1n 1k 2k 2k 47k 5V 100p 1µ SG input VCC2 VCC1 3 AIN1 E1 LOB2 2 AIN2 E2 1 MODESEL LOC2 13 AGCREF 14 LOC1 15 GND 16 LOB1 17 AO1 18 VREG 19 AO2 20 IREG 21 RFAGC AGCGND 22 IFIN2 AGCIN 23 IFIN1 24 680 1n ∗4 ICCB = ICC1 + ICC2 5V (ICC1) ∗4 9V –8– CXA3556N Measurement circuit 3 Output amplifier F characteristics AGCIN 0 to 2.2V 5V (ICC2) Output 1µ 51 51 470 470 ∗1 50k 1n 1n IF input 5V (ICC2) 200 1n MO1 MO2 5 6 7 8 9 10 11 12 1n 1n 100p 1µ 1n 1k 2k 2k 47k 5V 100p 1µ 9V 5V (ICC1) –9– VCC2 VCC1 4 AIN1 E1 LOB2 3 AIN2 E2 LOC2 2 AGCIN AGCREF 13 1 27k 1n 14 LOC1 15 GND 16 LOB1 17 AO1 AGCGND 18 VREG 19 AO2 20 IREG 21 RFAGC 22 IFIN2 23 1n IFIN1 24 MODESEL 1n CXA3556N Application circuit IF down converter mode AGCIN 0 to 2.2V VCC Output 1µ 27k 1k 10k 10n 1k 10n 680 1µ AO1 GND E1 AIN2 AIN1 VCC2 MO2 AO2 MO1 AGCGND VCC1 MODESEL LOB2 13 E2 14 LOC2 15 AGCREF 16 LOC1 17 LOB1 18 VREG 19 IREG 20 RFAGC 21 IFIN2 22 IFIN1 23 AGCIN 47p 24 1 2 3 4 5 6 7 8 9 10 11 12 1n 1n 1µ 1n 2p 10p 2p 6.8µH 6.8µH 47p 27k 1n 47p 47p 330 330 10n 10n 1µH IF input 47k 1µ 27p 49.38MHz ∗2 RFAGC 9V 1µ 27p VCC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. – 10 – CXA3556N Description of Functions The CXA3556N is an IF down converter IC for digital broadcasts. This IC contains a mixer circuit, a local oscillator circuit and an AGC circuit that standardizes IF signals in response to levels of input signals. It can also operate in a mode other than down converter (linear amplifier mode) and making possible use in a wide variety of digital broadcast tuners. (Control using Pin 23 bias voltage.) 1. AGC Circuit This is a variable gain amplifier circuit that standardizes output in response to levels of input signals. This circuit has especially excellent low distortion and noise characteristics even when the input level is large. It also has a variable width of 56dB as the gain control range with excellent linearity of the gain control curve. 2. Local Oscillator Circuit This circuit has a structure that uses a crystal oscillator and oscillates at 3rd overtone frequency. The circuit sets the parallel frequency of the parallel LC resonator between Pins 7 and 8 close to a tertiary overtone frequency (FVCO). This oscillator circuit can also use an LC resonance circuit in place of the crystal oscillator to form an oscillator circuit. 3. Output Amplifier Circuit Adding a resistor between Pins 16 and 17 allows the gain to be changed in proportion to that resistance. (Refer to characteristic graph Fig. 5 Gain vs. resistance between E1 and E2.) The output stage of this amplifier is also designed to be 500Ω load/1Vp-p. 4. Mixer Circuit This circuit outputs the frequency difference between the signal input to IF IN and the local oscillator signal. 5. RF AGC Circuit This circuit has high image quality in both strong and weak electric fields. In particular, it controls the RF IC gain existing in the first stage of the CXA3556N to delay the characteristics related to S/N to the maximum limits. The circuit controls the RF IC gain using RF AGC voltage (Pin 3) in order that signals input to IF IN (Pins 1, 2) grow larger in weak electric fields. The RF AGC voltage at Pin 3 is obtained from results of a comparison between the AGC control voltage (Pin 24 input voltage) that detects output signals and the voltage at Pin 18 that can be freely set using the resistance value. When the control voltage is low, the RF IC gain decreases and when the control voltage is high, the RF IC gain increases. – 11 – CXA3556N IF down converter mode characteristics Fig. 1. Gain vs. AGCIN voltage Fig. 2. Output noise vs. input level 80 –60 70 –70 Output noise [dBc/Hz] 60 Gain [dB] 50 40 30 20 –80 –90 –100 –110 –120 10 0 –130 –70 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 –60 –50 AGCIN voltage [V] –40 –30 –20 –10 0 Input level [dBm] Fig. 3. IM3 vs. input level Fig. 4. REFAGC voltage vs. AGCIN voltage 0 10 9 –10 8 REFAGC voltage [V] IM3 [dBc] –20 –30 –40 –50 7 6 5 4 3 R = 30kΩ 2 –60 1 –70 –70 0 –60 –50 –40 –30 –20 –10 0 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 Input level [dBm] AGCIN voltage [V] Fig. 5. Gain vs. resistance between E1 and E2 Fig. 6. Input characteristics 16 70MHz 109Ω –625Ω 3.6pF 30MHz 488.44Ω –1.3237kΩ 4.0079pF j50 14 12 j25 j100 Gain [dB] 10 8 6 4 30MHz 0 2 50 0 70MHz –2 –4 1 10 100 1000 10000 100000 1E+06 –j100 –j25 Resistance between E1 and E2 [Ω] ∗ Gain when 1kΩ is connected between E1 and E2 is 0dB. – 12 – Start 30MHz –j50 Stop 70MHz CXA3556N Package Outline Unit: mm 24PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗7.8 ± 0.1 0.1 24 13 ∗5.6 ± 0.1 7.6 ± 0.2 A 1 12 b 0.13 M b=0.22 ± 0.03 0.5 ± 0.2 0.1 ± 0.1 + 0.03 0.15 – 0.01 0.65 B DETAIL B : PALLADIUM 0˚ to 10˚ NOTE: Dimension "∗" does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SSOP-24P-L01 LEAD TREATMENT PALLADIUM PLATING EIAJ CODE P-SSOP24-7.8x5.6-0.65 LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.1g JEDEC CODE – 13 – Sony Corporation