CXA2039M Base Band Hue/Color Control Description The CXA2039M is a bipolar color difference signal processing IC for color TVs. This chip enables base band hue and color control for color difference signals. Features • 2 UV inputs, 1 UV output • 3 Y inputs, 2 Y outputs (1 of the 2 outputs outputs either of 2 inputs.) • Built-in color difference signal delay line circuit Applications Color TVs Absolute Maximum Ratings • Supply voltage VCC 12 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 780 mW Operating Conditions Supply voltage VCC 9 ± 0.5 24 pin SOP (Plastic) Structure Bipolar silicon monolithic IC V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E96X26C1Y-PS 12 11 10 9 8 7 6 5 4 ATT ATT 3 B-Y R-Y 2 Y2 IN VCC ATT Delay Line TV 1 CLAMP RY2 IN BY2 IN Y Y1 IN Y1 R-Y1 B-Y1 YUV SW RY1 IN Y2 R-Y2 B-Y2 CLAMP BY1 IN CLAMP GND GND Delay SW Y SW 18 CLAMP Y SW TV IN 19 YUV SW 20 LEVEL 21 Y OUT 22 RY OUT 23 BY OUT 24 VCC Block Diagram TV OUT –2– 17 HUE ATT 15 DRIVE IREF ATT HUE COLOR 16 COLOR DLY LEVEL DLY SW 13 GND 14 CXA2039M CXA2039M Pin Description Pin No. Symbol Pin voltage Equivalent circuit VCC Description VCC VCC 1 1 2 3 Y1 IN RY1 IN BY1 IN 4 14 20 GND 2 1.5k 3 70k Y1, R-Y1 and B-Y1 signal inputs. Input the signals via capacitors. GND. VCC VCC 5 CLAMP Clamp pulse (positive polarity) input. VILMAX = 2.5V VIHMIN = 3.5V 8k 5 20p VCC 60k VCC 6 YUV SW 6 1.5k YUV SW control. YUV SW ≤ 0.4V → Y2 IN, RY2 IN, and BY2 IN signals selected. YUV SW ≥ 1.0V → Y1 IN, RY1 IN, and BY1 IN signals selected. VCC RY OUT, BY OUT and TV OUT output level control. VILMAX = 6.0V VIHMIN = 6.8V 56k 7 LEVEL 7 36k VCC VCC VCC 8 Y OUT 20k 8 4k –3– Y signal output. Outputs the signals input to Pins 1 and 23 attenuated by –6dB. CXA2039M Pin No. Symbol Pin voltage Equivalent circuit Description VCC VCC VCC 9 RY OUT 30k 9 R-Y signal output. 4k VCC VCC VCC 10 BY OUT 30k B-Y signal output. 10 4k 11 24 VCC 9V Power supply. VCC 1k VCC 12 TV OUT Y signal output. 30k 12 3k VCC 13 DLY SW Delay on/off switching signal input. DLY SW ≤ 1.4V → Delay off DLY SW ≥ 2.2V → Delay on DLY Delay line reference current setting. Connect to GND via a resistor. When 10kΩ is connected, the delay time is 600ns. Increasing the resistance value increases the delay time and vice versa. 60k 13 VCC 15 40k 15 18k –4– CXA2039M Pin No. Symbol Pin voltage Equivalent circuit Description VCC 60k 16 16 COLOR 20k 8k 8k 4.5V Color control. Control is performed by applying a voltage of 0 to 9V. VCC 60k 17 17 HUE 20k 8k 8k Hue control. Control is performed by applying a voltage of 0 to 9V. 4.5V Y SW control. DLY SW ≤ 1.4V → TV IN signal selected. DLY SW ≥ 2.2V → Y1 IN or Y2 IN signal selected (selected by YUV SW). VCC VCC 18 1.5k Y SW 18 VCC VCC VCC 19 19 1.5k TV IN 70k VCC Y signal input. Input the signal via a capacitor. VCC VCC 21 21 22 23 BY2 IN RY2 IN Y2 IN 22 23 1.5k 70k –5– Y2, R-Y2 and B-Y2 signal inputs. Input the signals via capacitors. CXA2039M Electrical Characteristics Setting conditions • Ta = 25°C VCC = 9V • Set initially to: YUV SW = 0V, LEVEL = 0V, DLY SW = 0V, COLOR = 4.5V, HUE = 4.5V, Y SW = 0V. (when inputting the signals from Y2 IN, RY2 IN and BY2 IN) Mea- No. Item Symbol surement Input signal pin 1 Current ICC consumption 11 24 2 TV OUT output gain 12 3 TV OUT output gain VTV2 12 4 Y OUT output gain VY 8 5 RY OUT output gain VRY1 9 6 RY OUT output gain VRY2 9 7 BY OUT output gain VBY1 10 8 BY OUT output gain VBY2 9 Color variable Cmax. range 1 9 10 Color variable Cmin. range 2 9 11 Hue variable Hmax. range 1 10 12 Hue variable Hmin. range 2 10 13 RY OUT Delay RYDLY 9 14 BY OUT Delay BYDLY 10 fY 8 Y OUT 15 frequency response RY OUT 16 frequency response BY OUT 17 frequency response TV OUT 18 frequency response VTV1 Measurement conditions and contents Y: 1.4Vp-p R-Y, B-Y: 0.7Vp-p 0.7Vp-p Y signal mA –7.0 –6.2 –5.0 dB 0 1.0 dB –7.0 –6.2 –5.0 dB –7.0 –5.3 –4.0 dB Gain SW = High MODE –6.6 LEVEL ≥ 6.8V –4.7 –4.0 dB Gain SW = Low MODE LEVEL ≤ 6V –4.7 –3.1 –1.7 dB Gain SW = High MODE –4.3 LEVEL ≥ 6.8V –2.3 –1.3 dB 6.1 6.8 dB –40 –30 dB Gain SW = High MODE –1.0 LEVEL ≥ 6.8V I/O gain 200kHz, 5MHz R-Y and B-Y signal Set the output when COLOR = 4.5V to 0dB and measure the output when COLOR = 9V. Set the output when COLOR = 4.5V to 0dB and measure the output when COLOR = 0 V. Output level during RY signal input only –1 tan = Output level during BY signal input only when HUE = 9V Output level during RY signal input only –1 tan = Output level during BY signal input only when HUE = 0V 5.3 40 Max. Unit 48 Deg. –48 –40 Deg. DLY SW = 3V. Measure the I/O delay. 530 600 680 ns DLY SW = 3V. Measure the I/O delay. 530 600 680 ns –1.0 0 1.0 dB –6.0 –3.5 0 dB –8.0 –5.0 –1.0 dB –1.0 0 1.0 dB 1.4Vp-p 9 12 24 Gain SW = Low MODE LEVEL ≤ 6V B-Y = 0.7Vp-p R-Y = 0.5Vp-p fTV 19 I/O gain 10 10 14 Gain SW = Low MODE LEVEL ≤ 6V I/O gain fBY Typ. Vcc pin inflow current I/O gain fRY Min. 1.4Vp-p Y SW = 3V. Measure the 200kHz gain with respect to 5MHz. 200kHz, 5MHz –6– CXA2039M Electrical Characteristics Measurement Circuit 0.01µ 47µ 1 Y1 IN 2 RY1 IN 9V VCC 24 0.1µ Y2 IN 23 0.1µ 0.1µ 3 BY1 IN RY2 IN 22 0.1µ 0.1µ 4 GND BY2 IN 21 0.1µ 0/3V 5 CLAMP GND 20 6 YUV SW TV IN 19 0.1µ 0/9V 7 LEVEL Y SW 18 Y output 8 Y OUT HUE 17 R-Y output 9 RY OUT COLOR 16 B-Y output 10 BY OUT DLY 15 0/3V 0V to 9V 0V to 9V 10k 0.01µ 11 VCC GND 14 0/3V Main Y output 12 DLY SW 13 TV OUT ∗ When performing measurements with signals input from Y1 IN, RY1 IN and BY1 IN: YUV SW = 3V When performing measurements with signals input from Y2 IN, RY2 IN and BY2 IN: YUV SW = 0V –7– CXA2039M Description of Operation The Y, R-Y and B-Y signals input from Pins 1, 2, 3, 21, 22 and 23 are clamped by the clamp circuit and sent to the YUV SW circuit. The Y signal input from Pin 19 is clamped by the clamp circuit and then sent to the Y SW circuit. The YUV SW circuit receives the switching signal from Pin 6 and selects either the signals from Pins 1, 2 and 3 or from Pins 21, 22 and 23. The R-Y and B-Y signals output from the YUV SW circuit are attenuated and sent to the delay line and delay switch circuits. The delay time at the delay line circuit can be set as desired in the range of 500 to 700ns according to the resistance value connected between Pin 15 and GND. After passing through the delay line circuit, the signals are sent to the delay switch circuit where the Pin 13 control voltage is received and delay on/off switching is performed. The signals output from the delay switch circuit are input to the base band hue and color control circuits where the Pins 16 and 17 control voltages are received and hue and color control is performed. Then, the signals are amplified by the drive circuit and output from Pins 9 and 10. The drive circuit gain can be switched between two values according to the voltage applied to Pin 7. Two types of Y signals, 0dB and –6dB with respect to the input level, are output from the YUV SW circuit. The 0dB signal is sent as is to the Y SW circuit, and the –6dB signal is output from Pin 8. The Y SW circuit receives the switching signal from Pin 18 and selects the Pin 19 signal and either the Pin 1 or Pin 23 signal selected by YUV SW. Two types of Y signals, an unadjusted signal and a signal attenuated by –6dB, are output from the Y SW circuit. These signals are sent to the level switch circuit where one of them is selected according to the voltage applied to Pin 7 and output from Pin 12. Curve Data Hue Color 10 40 Output gain [dB] 0 Hue [deg] 20 0 –20 –10 –20 –30 –40 –40 –50 0 2 4 6 Hue control voltage [V] 0 8 I/O delay 750 700 Delay [ns] 650 600 550 500 450 400 350 6 7 8 10 9 IREF resistance [kΩ] 11 12 –8– 2 4 6 Color control voltage [V] 8 CXA2039M Application Circuit 0.01µ Y1 input R-Y1 input B-Y1 input 1 Y1 IN 2 RY1 IN 47µ VCC 24 9V 0.1µ Y2 IN 23 0.1µ 0.1µ 3 BY1 IN RY2 IN 22 0.1µ 0.1µ 4 GND BY2 IN 21 0.1µ 5 CLAMP 6 YUV SW Clamp Pulse input Y/B-Y/R-Y switching signal input Y2 input R-Y2 input B-Y2 input GND 20 TV IN 19 0.1µ 7 LEVEL Y SW 18 Y output 8 Y OUT HUE 17 R-Y output 9 RY OUT COLOR 16 B-Y output 10 BY OUT DLY 15 Main Y input Y switching signal input (TV IN and Y1 IN/Y2 IN switching) Control DC (0 to 9V) 10k Delay = 600ns Delay increases as resistance increases 0.01µ 11 VCC Main Y output GND 14 DLY SW 13 12 TV OUT Delay on/off signal input Pin 7 (Pins 9, 10 and 12 output level switching) 9V = Output High MODE [RYOUT: –2.3dB (Typ.)/BYOUT: –4.7dB (Typ.)] 0V = Output Low MODE [RYOUT: –3.1dB (Typ.)/BYOUT: –5.3dB (Typ.)] Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –9– CXA2039M Package Outline Unit: mm 24PIN SOP (PLASTIC) + 0.4 15.0 – 0.1 24 + 0.4 1.85 – 0.15 13 6.9 + 0.2 0.1 – 0.05 12 0.45 ± 0.1 1.27 + 0.1 0.2 – 0.05 0.5 ± 0.2 1 7.9 ± 0.4 + 0.3 5.3 – 0.1 0.15 ± 0.12 M PACKAGE STRUCTURE SONY CODE SOP-24P-L01 EIAJ CODE ∗SOP024-P-0300-A JEDEC CODE MOLDING COMPOUND EPOXY/PHENOL RESIN LEAD TREATMENT SOLDER PLATING LEAD MATERIAL COPPER ALLOY / 42ALLOY PACKAGE WEIGHT 0.3g – 10 – CXA2039M Package Outline Unit: mm 24PIN SOP (PLASTIC) + 0.4 15.0 – 0.1 + 0.4 1.85 – 0.15 24 13 6.9 + 0.2 0.1 – 0.05 12 0.45 ± 0.1 1.27 + 0.1 0.2 – 0.05 0.5 ± 0.2 1 7.9 ± 0.4 + 0.3 5.3 – 0.1 0.15 ± 0.12 M PACKAGE STRUCTURE SONY CODE SOP-24P-L01 EIAJ CODE ∗SOP024-P-0300-A JEDEC CODE MOLDING COMPOUND EPOXY/PHENOL RESIN LEAD TREATMENT SOLDER PLATING LEAD MATERIAL COPPER ALLOY / 42ALLOY PACKAGE WEIGHT 0.3g LEAD PLATING SPECIFICATIONS ITEM SPEC. LEAD MATERIAL COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18µm – 11 – Sony Corporation