Revised March 2000 DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs General Description Features The DM74123 is a dual retriggerable monostable multivibrator capable of generating output pulses from a few nano-seconds to extremely long duration up to 100% duty cycle. Each device has three inputs permitting the choice of either leading-edge or trailing edge triggering. Pin (A) is an active-LOW transition trigger input and pin (B) is an activeHIGH transition trigger input. A LOW at the clear (CLR) input terminates the output pulse: which also inhibits triggering. An internal connection from CLR to the input gate makes it possible to trigger the circuit by a positive-going signal on CLR as shown in the Truth Table. ■ DC triggered from active-HIGH transition or active-LOW transition inputs ■ Retriggerable to 100% duty cycle ■ Direct reset terminates output pulse ■ Compensated for VCC and temperature variations ■ DTL, TTL compatible ■ Input clamp diodes To obtain the best and trouble free operation from this device please read the Operating Rules as well as the One–Shot Application Notes carefully and observe recommendations. Ordering Code: Order Number DM74123N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Triggering Truth Table Inputs B X L No Trigger L X No Trigger H Trigger X No Trigger Trigger X H L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial H H CLR Response A H Trigger Functional Description The basic output pulse width is determined by selection of an external resistor (RX) and capacitor (CX). Once triggered, the basic pulse width may be extended by retriggering the gated active-LOW transition or active-HIGH transition inputs or be reduced by use of the active-LOW © 2000 Fairchild Semiconductor Corporation DS006539 transition clear input. Retriggering to 100% duty cycle is possible by application of an input pulse train whose cycle time is shorter than the output cycle time such that a continuous “HIGH” logic state is maintained at the “Q” output. www.fairchildsemi.com DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs August 1986 DM74123 Operating Rules 5. 1. An external resistor (RX) and external capacitor (CX) are required for proper operation. The value of CX may vary from 0 to any necessary value. For small time constants high-grade mica, glass, polypropylene, polycarbonate, or polystyrene material capacitors may be used. For large time constants use tantalum or special aluminum capacitors. If the timing capacitors have leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equations may not represent the pulse width the device generates. 2. When an electrolytic capacitor is used for CX a switching diode is often required for standard TTL one-shots to prevent high inverse leakage current (Figure 1). However, its use in general is not recommended with retriggerable operation. 3. To obtain variable pulse width by remote trimming, the following circuit is recommended: Note: “Rremote” should be as close to the one-shot as possible. FIGURE 3. 6. The retriggerable pulse width is calculated as shown below: T = TW + tPLH = K× RX × CX + tPLH The retriggered pulse width is equal to the pulse width plus a delay time period (Figure 4). The output pulse width (TW) for CX > 1000 pF is defined as follows: TW = K RX CX(1 + 0.7/RX) 1. where: [RX is in Kilo-ohm] [CX is in pico Farad] [TW is in nano second] 7. [K ≈ 0.28] FIGURE 1. 4. For CX < 1000 pF see Figure 2 for TW vs. CX family curves with RX as a parameter: Pulse Width vs. RX and CX 8. FIGURE 4. Under any operating condition CX and RX must be kept as close to the one-shot device pins as possible to minimize stray capacitance, to reduce noise pick-up, and to reduce I × R and Ldi/dt voltage developed along their connecting paths. If the lead length from CX to pins (6) and (7) or pins (14) and (15) is greater than 3 cm, for example, the output pulse width might be quite different from values predicted from the appropriate equations. A non-inductive and low capacitive path is necessary to ensure complete discharge of CX in each cycle of its operation so that the output pulse width will be accurate. VCC and ground wiring should conform to good high-frequency standards and practices so that switching transients on the V CC and ground return leads do not cause interaction between one-shots. A 0.01 µF to 0.10 µF bypass capacitor (disk ceramic or monolithic type) from VCC to ground is necessary on each device. Furthermore, the bypass capacitor should be located as close to the VCC pin as space permits. Note: For further detailed device characteristics and output performance please refer to the One-Shot Application Note, AN-366. FIGURE 2. www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 5.5V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.75 5 5.25 V LOW Level Input Voltage 0.8 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL 2 V IOH HIGH Level Output Current −0.8 mA IOL LOW Level Output Current 16 mA tW Pulse Width A or B HIGH (Note 2) A or B LOW 40 Clear LOW 40 TWQ Minimum Width of (Min) Pulse at Q (Note 2) 40 ns A or B REXT External Timing Resistor CEXT External Timing Capacitance 5 CWIRE Wiring Capacitance ns 50 kΩ µF No Restriction at REXT/CEXT Terminal (Note 2) TA 65 Free Air Operating Temperature 0 50 pF 70 °C Note 2: TA = 25°C and VCC = 5V. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −12 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max, VIH = Min LOW Level VCC = Min, IOL = Max Output Voltage VIH = Min, VIL = Max VOL Min 2.5 Typ (Note 3) Max Units −1.5 V 3.4 0.2 V 0.4 V 1 mA II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V IIH HIGH Level VCC = Max Data 40 Input Current VI = 2.4V Clear 80 Low Level VCC = Max, VI = 0.4V Clear −3.2 Data −1.6 IIL Input Current IOS Short Circuit Output Current VCC = Max (Note 4) ICC Supply Current VCC = Max (Note 5)(Note 6) −10 46 µA mA −40 mA 66 mA Note 3: All typicals are at VCC = 5V, TA = 25°C. Note 4: Not more than one output should be shorted at a time. Note 5: Quiescent ICC is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs OPEN, CEXT = 0.02 µF, and REXT = 25 KΩ. Note 6: ICC is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs OPEN, CEXT = 0.02 µF, and REXT = 25 kΩ. 3 www.fairchildsemi.com DM74123 Absolute Maximum Ratings(Note 1) DM74123 Switching Characteristics at VCC = 5V and TA = 25°C CL = 15 pF, RL = 400Ω Symbol Parameter From (Input) To (Output) tPLH Propagation Delay Time LOW-to-HIGH Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tW(out) Output Pulse Width (Note 7) Min Units Max A to Q 33 ns B to Q 28 ns A to Q 40 ns B to Q 36 ns Clear to Q 40 ns Clear to Q 27 ns 3.76 µs A or B to Q Note 7: CECT = 1000 pF, REXT = 10 kΩ www.fairchildsemi.com CEXT = 1000 pF, REXT = 10 KΩ 4 3.08 DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com